diff options
Diffstat (limited to 'llvm/test')
26 files changed, 51 insertions, 51 deletions
diff --git a/llvm/test/CodeGen/Hexagon/loop-idiom/memmove-rt-check.ll b/llvm/test/CodeGen/Hexagon/loop-idiom/memmove-rt-check.ll index ce2c17e4198..299a910dd51 100644 --- a/llvm/test/CodeGen/Hexagon/loop-idiom/memmove-rt-check.ll +++ b/llvm/test/CodeGen/Hexagon/loop-idiom/memmove-rt-check.ll @@ -3,7 +3,7 @@ ; Make sure that we generate correct runtime checks. ; CHECK: b7.old: -; CHECK: [[LEN:%[0-9]+]] = shl i32 %len, 3 +; CHECK: [[LEN:%[0-9]+]] = shl nuw i32 %len, 3 ; CHECK: [[SRC:%[0-9]+]] = ptrtoint i8* %src to i32 ; CHECK: [[DST:%[0-9]+]] = ptrtoint i8* %dst to i32 ; CHECK: [[ULT:%[0-9]+]] = icmp ult i32 [[DST]], [[SRC]] diff --git a/llvm/test/Transforms/IRCE/bad_expander.ll b/llvm/test/Transforms/IRCE/bad_expander.ll index bc98456a31b..5dd9ab2752c 100644 --- a/llvm/test/Transforms/IRCE/bad_expander.ll +++ b/llvm/test/Transforms/IRCE/bad_expander.ll @@ -89,7 +89,7 @@ define void @test_03(i64* %p1, i64* %p2, i1 %maybe_exit) { ; CHECK: entry: ; CHECK-NEXT: %num = load i64, i64* %p1, align 4 ; CHECK-NEXT: [[DIV:%[^ ]+]] = udiv i64 %num, 13 -; CHECK-NEXT: [[DIV_MINUS_1:%[^ ]+]] = add i64 [[DIV]], -1 +; CHECK-NEXT: [[DIV_MINUS_1:%[^ ]+]] = add nsw i64 [[DIV]], -1 ; CHECK-NEXT: [[COMP1:%[^ ]+]] = icmp sgt i64 [[DIV_MINUS_1]], 0 ; CHECK-NEXT: %exit.mainloop.at = select i1 [[COMP1]], i64 [[DIV_MINUS_1]], i64 0 ; CHECK-NEXT: [[COMP2:%[^ ]+]] = icmp slt i64 0, %exit.mainloop.at diff --git a/llvm/test/Transforms/IRCE/conjunctive-checks.ll b/llvm/test/Transforms/IRCE/conjunctive-checks.ll index 8711c1b00e8..672c5c4aa79 100644 --- a/llvm/test/Transforms/IRCE/conjunctive-checks.ll +++ b/llvm/test/Transforms/IRCE/conjunctive-checks.ll @@ -5,7 +5,7 @@ define void @f_0(i32 *%arr, i32 *%a_len_ptr, i32 %n, i1* %cond_buf) { ; CHECK-LABEL: @f_0( ; CHECK: loop.preheader: -; CHECK: [[len_sub:[^ ]+]] = add i32 %len, -4 +; CHECK: [[len_sub:[^ ]+]] = add nsw i32 %len, -4 ; CHECK: [[exit_main_loop_at_hiclamp_cmp:[^ ]+]] = icmp slt i32 %n, [[len_sub]] ; CHECK: [[exit_main_loop_at_hiclamp:[^ ]+]] = select i1 [[exit_main_loop_at_hiclamp_cmp]], i32 %n, i32 [[len_sub]] ; CHECK: [[exit_main_loop_at_loclamp_cmp:[^ ]+]] = icmp sgt i32 [[exit_main_loop_at_hiclamp]], 0 diff --git a/llvm/test/Transforms/IRCE/decrementing-loop.ll b/llvm/test/Transforms/IRCE/decrementing-loop.ll index 2994a432a71..e729955e1e5 100644 --- a/llvm/test/Transforms/IRCE/decrementing-loop.ll +++ b/llvm/test/Transforms/IRCE/decrementing-loop.ll @@ -33,7 +33,7 @@ define void @decrementing_loop(i32 *%arr, i32 *%a_len_ptr, i32 %n) { ; CHECK: [[len_hiclamp:[^ ]+]] = select i1 [[len_hiclamp_cmp]], i32 %len, i32 %n ; CHECK: [[not_exit_preloop_at_cmp:[^ ]+]] = icmp sgt i32 [[len_hiclamp]], 0 ; CHECK: [[not_exit_preloop_at:[^ ]+]] = select i1 [[not_exit_preloop_at_cmp]], i32 [[len_hiclamp]], i32 0 -; CHECK: %exit.preloop.at = add i32 [[not_exit_preloop_at]], -1 +; CHECK: %exit.preloop.at = add nsw i32 [[not_exit_preloop_at]], -1 } ; Make sure that we can eliminate the range check when the loop looks like: diff --git a/llvm/test/Transforms/IRCE/ranges_of_different_types.ll b/llvm/test/Transforms/IRCE/ranges_of_different_types.ll index 46bd94ce687..f275c67792b 100644 --- a/llvm/test/Transforms/IRCE/ranges_of_different_types.ll +++ b/llvm/test/Transforms/IRCE/ranges_of_different_types.ll @@ -23,7 +23,7 @@ define void @test_01(i32* %arr, i32* %a_len_ptr) #0 { ; CHECK-NOT: preloop ; CHECK: entry: ; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0 -; CHECK-NEXT: [[SUB1:%[^ ]+]] = add i32 %len, -13 +; CHECK-NEXT: [[SUB1:%[^ ]+]] = add nsw i32 %len, -13 ; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp slt i32 [[SUB1]], 101 ; CHECK-NEXT: [[SMAX:%[^ ]+]] = select i1 [[CMP1]], i32 [[SUB1]], i32 101 ; CHECK-NEXT: [[CMP2:%[^ ]+]] = icmp sgt i32 [[SMAX]], 0 @@ -79,10 +79,10 @@ define void @test_02(i32* %arr, i32* %a_len_ptr) #0 { ; CHECK-LABEL: test_02( ; CHECK: entry: ; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0 -; CHECK-NEXT: [[LEN_MINUS_SMAX:%[^ ]+]] = add i32 %len, -2147483647 +; CHECK-NEXT: [[LEN_MINUS_SMAX:%[^ ]+]] = add nuw nsw i32 %len, -2147483647 ; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp sgt i32 [[LEN_MINUS_SMAX]], -13 ; CHECK-NEXT: [[SMAX1:%[^ ]+]] = select i1 [[CMP1]], i32 [[LEN_MINUS_SMAX]], i32 -13 -; CHECK-NEXT: [[SUB1:%[^ ]+]] = sub i32 %len, [[SMAX1]] +; CHECK-NEXT: [[SUB1:%[^ ]+]] = sub nuw nsw i32 %len, [[SMAX1]] ; CHECK-NEXT: [[CMP2:%[^ ]+]] = icmp slt i32 [[SUB1]], 101 ; CHECK-NEXT: [[SMAX2:%[^ ]+]] = select i1 [[CMP2]], i32 [[SUB1]], i32 101 ; CHECK-NEXT: [[CMP3:%[^ ]+]] = icmp sgt i32 [[SMAX2]], 0 @@ -202,7 +202,7 @@ define void @test_04(i32* %arr, i32* %a_len_ptr) #0 { ; CHECK-LABEL: test_04( ; CHECK: entry: ; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0 -; CHECK-NEXT: [[SUB1:%[^ ]+]] = add i32 %len, 13 +; CHECK-NEXT: [[SUB1:%[^ ]+]] = add nuw i32 %len, 13 ; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp ult i32 [[SUB1]], 101 ; CHECK-NEXT: %exit.mainloop.at = select i1 [[CMP1]], i32 [[SUB1]], i32 101 ; CHECK-NEXT: br i1 true, label %loop.preloop.preheader @@ -245,7 +245,7 @@ define void @test_05(i32* %arr, i32* %a_len_ptr) #0 { ; CHECK-NOT: preloop ; CHECK: entry: ; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0 -; CHECK-NEXT: [[SUB1:%[^ ]+]] = add i32 %len, -13 +; CHECK-NEXT: [[SUB1:%[^ ]+]] = add nsw i32 %len, -13 ; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp slt i32 [[SUB1]], 101 ; CHECK-NEXT: [[SMAX:%[^ ]+]] = select i1 [[CMP1]], i32 [[SUB1]], i32 101 ; CHECK-NEXT: [[CMP2:%[^ ]+]] = icmp sgt i32 [[SMAX]], 0 @@ -286,10 +286,10 @@ define void @test_06(i32* %arr, i32* %a_len_ptr) #0 { ; CHECK-LABEL: test_06( ; CHECK: entry: ; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0 -; CHECK-NEXT: [[LEN_MINUS_SMAX:%[^ ]+]] = add i32 %len, -2147483647 +; CHECK-NEXT: [[LEN_MINUS_SMAX:%[^ ]+]] = add nuw nsw i32 %len, -2147483647 ; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp sgt i32 [[LEN_MINUS_SMAX]], -13 ; CHECK-NEXT: [[SMAX1:%[^ ]+]] = select i1 [[CMP1]], i32 [[LEN_MINUS_SMAX]], i32 -13 -; CHECK-NEXT: [[SUB1:%[^ ]+]] = sub i32 %len, [[SMAX1]] +; CHECK-NEXT: [[SUB1:%[^ ]+]] = sub nuw nsw i32 %len, [[SMAX1]] ; CHECK-NEXT: [[CMP2:%[^ ]+]] = icmp slt i32 [[SUB1]], 101 ; CHECK-NEXT: [[SMAX2:%[^ ]+]] = select i1 [[CMP2]], i32 [[SUB1]], i32 101 ; CHECK-NEXT: [[CMP3:%[^ ]+]] = icmp sgt i32 [[SMAX2]], 0 @@ -375,7 +375,7 @@ define void @test_08(i32* %arr, i32* %a_len_ptr) #0 { ; CHECK-LABEL: test_08( ; CHECK: entry: ; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0 -; CHECK-NEXT: [[SUB1:%[^ ]+]] = add i32 %len, 13 +; CHECK-NEXT: [[SUB1:%[^ ]+]] = add nuw i32 %len, 13 ; CHECK-NEXT: [[CMP1:%[^ ]+]] = icmp ult i32 [[SUB1]], 101 ; CHECK-NEXT: %exit.mainloop.at = select i1 [[CMP1]], i32 [[SUB1]], i32 101 ; CHECK-NEXT: br i1 true, label %loop.preloop.preheader diff --git a/llvm/test/Transforms/IRCE/rc-negative-bound.ll b/llvm/test/Transforms/IRCE/rc-negative-bound.ll index d226bffeaae..c4efb5bd81b 100644 --- a/llvm/test/Transforms/IRCE/rc-negative-bound.ll +++ b/llvm/test/Transforms/IRCE/rc-negative-bound.ll @@ -115,7 +115,7 @@ define void @test_03(i32 *%arr, i32 %n, i32 %bound) { ; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[BOUND:%.*]], -2147483647 ; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[TMP0]], 0 ; CHECK-NEXT: [[SMIN:%.*]] = select i1 [[TMP1]], i32 [[TMP0]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[BOUND]], [[SMIN]] +; CHECK-NEXT: [[TMP2:%.*]] = sub nsw i32 [[BOUND]], [[SMIN]] ; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[BOUND]], 0 ; CHECK-NEXT: [[SMAX:%.*]] = select i1 [[TMP3]], i32 [[BOUND]], i32 0 ; CHECK-NEXT: [[TMP4:%.*]] = icmp sgt i32 [[SMAX]], -1 @@ -403,7 +403,7 @@ define void @test_07(i32 *%arr, i32 %n, i32 %bound) { ; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[BOUND:%.*]], -2147483647 ; CHECK-NEXT: [[TMP1:%.*]] = icmp sgt i32 [[TMP0]], 0 ; CHECK-NEXT: [[SMIN:%.*]] = select i1 [[TMP1]], i32 [[TMP0]], i32 0 -; CHECK-NEXT: [[TMP2:%.*]] = sub i32 [[BOUND]], [[SMIN]] +; CHECK-NEXT: [[TMP2:%.*]] = sub nsw i32 [[BOUND]], [[SMIN]] ; CHECK-NEXT: [[TMP3:%.*]] = icmp slt i32 [[BOUND]], 0 ; CHECK-NEXT: [[SMAX:%.*]] = select i1 [[TMP3]], i32 [[BOUND]], i32 0 ; CHECK-NEXT: [[TMP4:%.*]] = icmp sgt i32 [[SMAX]], -1 diff --git a/llvm/test/Transforms/IRCE/single-access-no-preloop.ll b/llvm/test/Transforms/IRCE/single-access-no-preloop.ll index 7bf36f7c254..a8282131241 100644 --- a/llvm/test/Transforms/IRCE/single-access-no-preloop.ll +++ b/llvm/test/Transforms/IRCE/single-access-no-preloop.ll @@ -86,7 +86,7 @@ define void @single_access_no_preloop_with_offset(i32 *%arr, i32 *%a_len_ptr, i3 ; CHECK-LABEL: @single_access_no_preloop_with_offset( ; CHECK: loop.preheader: -; CHECK: [[safe_range_end:[^ ]+]] = add i32 %len, -4 +; CHECK: [[safe_range_end:[^ ]+]] = add nsw i32 %len, -4 ; CHECK: [[exit_main_loop_at_hiclamp_cmp:[^ ]+]] = icmp slt i32 %n, [[safe_range_end]] ; CHECK: [[exit_main_loop_at_hiclamp:[^ ]+]] = select i1 [[exit_main_loop_at_hiclamp_cmp]], i32 %n, i32 [[safe_range_end]] ; CHECK: [[exit_main_loop_at_loclamp_cmp:[^ ]+]] = icmp sgt i32 [[exit_main_loop_at_hiclamp]], 0 diff --git a/llvm/test/Transforms/IRCE/single-access-with-preloop.ll b/llvm/test/Transforms/IRCE/single-access-with-preloop.ll index bd235aa4a73..67cb58cfd5c 100644 --- a/llvm/test/Transforms/IRCE/single-access-with-preloop.ll +++ b/llvm/test/Transforms/IRCE/single-access-with-preloop.ll @@ -34,23 +34,23 @@ define void @single_access_with_preloop(i32 *%arr, i32 *%a_len_ptr, i32 %n, i32 ; CHECK: [[check_min_sint_offset:[^ ]+]] = icmp sgt i32 %offset, -2147483647 ; CHECK: [[safe_offset_preloop:[^ ]+]] = select i1 [[check_min_sint_offset]], i32 %offset, i32 -2147483647 ; If Offset was a SINT_MIN, we could have an overflow here. That is why we calculated its safe version. -; CHECK: [[safe_start:[^ ]+]] = sub i32 0, [[safe_offset_preloop]] +; CHECK: [[safe_start:[^ ]+]] = sub nsw i32 0, [[safe_offset_preloop]] ; CHECK: [[exit_preloop_at_cond_loclamp:[^ ]+]] = icmp slt i32 %n, [[safe_start]] ; CHECK: [[exit_preloop_at_loclamp:[^ ]+]] = select i1 [[exit_preloop_at_cond_loclamp]], i32 %n, i32 [[safe_start]] ; CHECK: [[exit_preloop_at_cond:[^ ]+]] = icmp sgt i32 [[exit_preloop_at_loclamp]], 0 ; CHECK: [[exit_preloop_at:[^ ]+]] = select i1 [[exit_preloop_at_cond]], i32 [[exit_preloop_at_loclamp]], i32 0 -; CHECK: [[len_minus_sint_max:[^ ]+]] = add i32 %len, -2147483647 +; CHECK: [[len_minus_sint_max:[^ ]+]] = add nuw nsw i32 %len, -2147483647 ; CHECK: [[check_len_min_sint_offset:[^ ]+]] = icmp sgt i32 %offset, [[len_minus_sint_max]] ; CHECK: [[safe_offset_mainloop:[^ ]+]] = select i1 [[check_len_min_sint_offset]], i32 %offset, i32 [[len_minus_sint_max]] ; If Offset was a SINT_MIN, we could have an overflow here. That is why we calculated its safe version. -; CHECK: [[safe_upper_end:[^ ]+]] = sub i32 %len, [[safe_offset_mainloop]] +; CHECK: [[safe_upper_end:[^ ]+]] = sub nsw i32 %len, [[safe_offset_mainloop]] ; CHECK: [[exit_mainloop_at_cond_loclamp:[^ ]+]] = icmp slt i32 %n, [[safe_upper_end]] ; CHECK: [[exit_mainloop_at_loclamp:[^ ]+]] = select i1 [[exit_mainloop_at_cond_loclamp]], i32 %n, i32 [[safe_upper_end]] ; CHECK: [[check_offset_mainloop_2:[^ ]+]] = icmp sgt i32 %offset, 0 ; CHECK: [[safe_offset_mainloop_2:[^ ]+]] = select i1 [[check_offset_mainloop_2]], i32 %offset, i32 0 -; CHECK: [[safe_lower_end:[^ ]+]] = sub i32 2147483647, [[safe_offset_mainloop_2]] +; CHECK: [[safe_lower_end:[^ ]+]] = sub nsw i32 2147483647, [[safe_offset_mainloop_2]] ; CHECK: [[exit_mainloop_at_cond_hiclamp:[^ ]+]] = icmp slt i32 [[exit_mainloop_at_loclamp]], [[safe_lower_end]] ; CHECK: [[exit_mainloop_at_hiclamp:[^ ]+]] = select i1 [[exit_mainloop_at_cond_hiclamp]], i32 [[exit_mainloop_at_loclamp]], i32 [[safe_lower_end]] ; CHECK: [[exit_mainloop_at_cmp:[^ ]+]] = icmp sgt i32 [[exit_mainloop_at_hiclamp]], 0 diff --git a/llvm/test/Transforms/IRCE/stride_more_than_1.ll b/llvm/test/Transforms/IRCE/stride_more_than_1.ll index 8aaecac7d30..f8306948d6f 100644 --- a/llvm/test/Transforms/IRCE/stride_more_than_1.ll +++ b/llvm/test/Transforms/IRCE/stride_more_than_1.ll @@ -254,7 +254,7 @@ define void @test_05(i32* %arr, i32* %a_len_ptr) { ; CHECK: @test_05( ; CHECK: entry: ; CHECK-NEXT: %len = load i32, i32* %a_len_ptr -; CHECK-NEXT: %exit.preloop.at = add i32 %len, -1 +; CHECK-NEXT: %exit.preloop.at = add nsw i32 %len, -1 ; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp sgt i32 100, %exit.preloop.at ; CHECK-NEXT: br i1 [[COND1]], label %loop.preloop.preheader, label %preloop.pseudo.exit ; CHECK: loop.preloop.preheader: @@ -320,7 +320,7 @@ define void @test_06(i32* %arr, i32* %a_len_ptr) { ; CHECK: @test_06( ; CHECK: entry: ; CHECK-NEXT: %len = load i32, i32* %a_len_ptr -; CHECK-NEXT: %exit.preloop.at = add i32 %len, -1 +; CHECK-NEXT: %exit.preloop.at = add nsw i32 %len, -1 ; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp ugt i32 2147483640, %exit.preloop.at ; CHECK-NEXT: br i1 [[COND1]], label %loop.preloop.preheader, label %preloop.pseudo.exit ; CHECK: loop.preloop.preheader: @@ -415,7 +415,7 @@ define void @test_08(i32* %arr, i32* %a_len_ptr) { ; CHECK: @test_08( ; CHECK: entry: ; CHECK-NEXT: %len = load i32, i32* %a_len_ptr -; CHECK-NEXT: %exit.preloop.at = add i32 %len, -1 +; CHECK-NEXT: %exit.preloop.at = add nsw i32 %len, -1 ; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp ugt i32 2147483647, %exit.preloop.at ; CHECK-NEXT: br i1 [[COND1]], label %loop.preloop.preheader, label %preloop.pseudo.exit ; CHECK: loop.preloop.preheader: diff --git a/llvm/test/Transforms/IRCE/unsigned_comparisons_ugt.ll b/llvm/test/Transforms/IRCE/unsigned_comparisons_ugt.ll index 3451d65c7bb..117f5e5fa63 100644 --- a/llvm/test/Transforms/IRCE/unsigned_comparisons_ugt.ll +++ b/llvm/test/Transforms/IRCE/unsigned_comparisons_ugt.ll @@ -59,7 +59,7 @@ define void @test_02(i32* %arr, i32* %a_len_ptr) #0 { ; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0 ; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp ugt i32 %len, 1 ; CHECK-NEXT: [[UMIN:%[^ ]+]] = select i1 [[COND1]], i32 %len, i32 1 -; CHECK-NEXT: %exit.preloop.at = add i32 [[UMIN]], -1 +; CHECK-NEXT: %exit.preloop.at = add nsw i32 [[UMIN]], -1 ; CHECK-NEXT: [[COND2:%[^ ]+]] = icmp ugt i32 100, %exit.preloop.at ; CHECK-NEXT: br i1 [[COND2]], label %loop.preloop.preheader, label %preloop.pseudo.exit ; CHECK: mainloop: @@ -150,7 +150,7 @@ define void @test_04(i32* %arr, i32* %a_len_ptr) #0 { ; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0 ; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp ugt i32 %len, 1 ; CHECK-NEXT: [[UMIN:%[^ ]+]] = select i1 [[COND1]], i32 %len, i32 1 -; CHECK-NEXT: %exit.preloop.at = add i32 [[UMIN]], -1 +; CHECK-NEXT: %exit.preloop.at = add nsw i32 [[UMIN]], -1 ; CHECK-NEXT: [[COND2:%[^ ]+]] = icmp ugt i32 -2147483648, %exit.preloop.at ; CHECK-NEXT: br i1 [[COND2]], label %loop.preloop.preheader, label %preloop.pseudo.exit ; CHECK: mainloop: diff --git a/llvm/test/Transforms/IRCE/unsigned_comparisons_ult.ll b/llvm/test/Transforms/IRCE/unsigned_comparisons_ult.ll index aca3c3d192e..2e36b97a58e 100644 --- a/llvm/test/Transforms/IRCE/unsigned_comparisons_ult.ll +++ b/llvm/test/Transforms/IRCE/unsigned_comparisons_ult.ll @@ -62,7 +62,7 @@ define void @test_02(i32* %arr, i32* %a_len_ptr) #0 { ; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0 ; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp ugt i32 %len, 1 ; CHECK-NEXT: [[UMIN:%[^ ]+]] = select i1 [[COND1]], i32 %len, i32 1 -; CHECK-NEXT: %exit.preloop.at = add i32 [[UMIN]], -1 +; CHECK-NEXT: %exit.preloop.at = add nsw i32 [[UMIN]], -1 ; CHECK-NEXT: [[COND2:%[^ ]+]] = icmp ugt i32 100, %exit.preloop.at ; CHECK-NEXT: br i1 [[COND2]], label %loop.preloop.preheader, label %preloop.pseudo.exit ; CHECK: mainloop: @@ -195,7 +195,7 @@ define void @test_05(i32* %arr, i32* %a_len_ptr) #0 { ; CHECK-NEXT: %len = load i32, i32* %a_len_ptr, !range !0 ; CHECK-NEXT: [[COND1:%[^ ]+]] = icmp ugt i32 %len, 1 ; CHECK-NEXT: [[UMIN:%[^ ]+]] = select i1 [[COND1]], i32 %len, i32 1 -; CHECK-NEXT: %exit.preloop.at = add i32 [[UMIN]], -1 +; CHECK-NEXT: %exit.preloop.at = add nsw i32 [[UMIN]], -1 ; CHECK-NEXT: [[COND2:%[^ ]+]] = icmp ugt i32 -2147483648, %exit.preloop.at ; CHECK-NEXT: br i1 [[COND2]], label %loop.preloop.preheader, label %preloop.pseudo.exit ; CHECK: mainloop: diff --git a/llvm/test/Transforms/IndVarSimplify/lftr.ll b/llvm/test/Transforms/IndVarSimplify/lftr.ll index ae50f5a33e2..114e4ae8e88 100644 --- a/llvm/test/Transforms/IndVarSimplify/lftr.ll +++ b/llvm/test/Transforms/IndVarSimplify/lftr.ll @@ -202,7 +202,7 @@ define void @test_udiv_as_shift(i8* %a, i8 %n) nounwind uwtable ssp { ; CHECK: loop.preheader: ; CHECK-NEXT: [[TMP0:%.*]] = add i8 [[N]], 3 ; CHECK-NEXT: [[TMP1:%.*]] = lshr i8 [[TMP0]], 2 -; CHECK-NEXT: [[TMP2:%.*]] = add i8 [[TMP1]], 1 +; CHECK-NEXT: [[TMP2:%.*]] = add nuw nsw i8 [[TMP1]], 1 ; CHECK-NEXT: br label [[LOOP:%.*]] ; CHECK: loop: ; CHECK-NEXT: [[I1:%.*]] = phi i8 [ [[I1_INC:%.*]], [[LOOP]] ], [ 0, [[LOOP_PREHEADER]] ] diff --git a/llvm/test/Transforms/IndVarSimplify/loop_evaluate_1.ll b/llvm/test/Transforms/IndVarSimplify/loop_evaluate_1.ll index 5d2c8c7209f..3e2e0451375 100644 --- a/llvm/test/Transforms/IndVarSimplify/loop_evaluate_1.ll +++ b/llvm/test/Transforms/IndVarSimplify/loop_evaluate_1.ll @@ -25,7 +25,7 @@ loopexit: ; preds = %loopentry ; CHECK-LABEL: @test2 ; CHECK: [[VAR1:%.+]] = add i32 %arg, -11 ; CHECK: [[VAR2:%.+]] = lshr i32 [[VAR1]], 1 -; CHECK: [[VAR3:%.+]] = add i32 [[VAR2]], 1 +; CHECK: [[VAR3:%.+]] = add nuw i32 [[VAR2]], 1 ; CHECK: [[VAR4:%.+]] = phi i32 [ 0, %bb ], [ [[VAR3]], %bb1.preheader ] ; CHECK: ret i32 [[VAR4]] define i32 @test2(i32 %arg) { diff --git a/llvm/test/Transforms/LoopIdiom/X86/unordered-atomic-memcpy.ll b/llvm/test/Transforms/LoopIdiom/X86/unordered-atomic-memcpy.ll index d52378b864f..1e0be23443e 100644 --- a/llvm/test/Transforms/LoopIdiom/X86/unordered-atomic-memcpy.ll +++ b/llvm/test/Transforms/LoopIdiom/X86/unordered-atomic-memcpy.ll @@ -282,7 +282,7 @@ for.end: ; preds = %for.body, %entry ;; memcpy.atomic formation (atomic load & store) -- element size 2 define void @test6(i64 %Size) nounwind ssp { ; CHECK-LABEL: @test6( -; CHECK: [[Sz:%[0-9]+]] = shl i64 %Size, 1 +; CHECK: [[Sz:%[0-9]+]] = shl nuw i64 %Size, 1 ; CHECK: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 2 %Dest{{[0-9]*}}, i8* align 2 %Base{{[0-9]*}}, i64 [[Sz]], i32 2) ; CHECK-NOT: store ; CHECK: ret void @@ -308,7 +308,7 @@ for.end: ; preds = %for.body, %entry ;; memcpy.atomic formation (atomic load & store) -- element size 4 define void @test7(i64 %Size) nounwind ssp { ; CHECK-LABEL: @test7( -; CHECK: [[Sz:%[0-9]+]] = shl i64 %Size, 2 +; CHECK: [[Sz:%[0-9]+]] = shl nuw i64 %Size, 2 ; CHECK: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 4 %Dest{{[0-9]*}}, i8* align 4 %Base{{[0-9]*}}, i64 [[Sz]], i32 4) ; CHECK-NOT: store ; CHECK: ret void @@ -334,7 +334,7 @@ for.end: ; preds = %for.body, %entry ;; memcpy.atomic formation (atomic load & store) -- element size 8 define void @test8(i64 %Size) nounwind ssp { ; CHECK-LABEL: @test8( -; CHECK: [[Sz:%[0-9]+]] = shl i64 %Size, 3 +; CHECK: [[Sz:%[0-9]+]] = shl nuw i64 %Size, 3 ; CHECK: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 8 %Dest{{[0-9]*}}, i8* align 8 %Base{{[0-9]*}}, i64 [[Sz]], i32 8) ; CHECK-NOT: store ; CHECK: ret void @@ -360,7 +360,7 @@ for.end: ; preds = %for.body, %entry ;; memcpy.atomic formation rejection (atomic load & store) -- element size 16 define void @test9(i64 %Size) nounwind ssp { ; CHECK-LABEL: @test9( -; CHECK: [[Sz:%[0-9]+]] = shl i64 %Size, 4 +; CHECK: [[Sz:%[0-9]+]] = shl nuw i64 %Size, 4 ; CHECK: call void @llvm.memcpy.element.unordered.atomic.p0i8.p0i8.i64(i8* align 16 %Dest{{[0-9]*}}, i8* align 16 %Base{{[0-9]*}}, i64 [[Sz]], i32 16) ; CHECK-NOT: store ; CHECK: ret void diff --git a/llvm/test/Transforms/LoopIdiom/basic.ll b/llvm/test/Transforms/LoopIdiom/basic.ll index 7c491b357c7..076e0224b81 100644 --- a/llvm/test/Transforms/LoopIdiom/basic.ll +++ b/llvm/test/Transforms/LoopIdiom/basic.ll @@ -46,7 +46,7 @@ for.end: ; preds = %for.body, %entry ret void ; CHECK-LABEL: @test1_i16( ; CHECK: %[[BaseBC:.*]] = bitcast i16* %Base to i8* -; CHECK: %[[Sz:[0-9]+]] = shl i64 %Size, 1 +; CHECK: %[[Sz:[0-9]+]] = shl nuw i64 %Size, 1 ; CHECK: call void @llvm.memset.p0i8.i64(i8* align 2 %[[BaseBC]], i8 0, i64 %[[Sz]], i1 false) ; CHECK-NOT: store } @@ -92,7 +92,7 @@ for.end: ; preds = %for.body, %entry ret void ; CHECK-LABEL: @test2( ; CHECK: br i1 %cmp10, -; CHECK: %0 = shl i64 %Size, 2 +; CHECK: %0 = shl nuw i64 %Size, 2 ; CHECK: call void @llvm.memset.p0i8.i64(i8* align 4 %Base1, i8 1, i64 %0, i1 false) ; CHECK-NOT: store } @@ -212,7 +212,7 @@ for.end: ; preds = %for.body, %entry ; CHECK-LABEL: @test6_dest_align( ; CHECK: %[[Dst:.*]] = bitcast i32* %Dest to i8* ; CHECK: %[[Src:.*]] = bitcast i32* %Base to i8* -; CHECK: %[[Sz:[0-9]+]] = shl i64 %Size, 2 +; CHECK: %[[Sz:[0-9]+]] = shl nuw i64 %Size, 2 ; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %[[Dst]], i8* align 1 %[[Src]], i64 %[[Sz]], i1 false) ; CHECK-NOT: store ; CHECK: ret void @@ -238,7 +238,7 @@ for.end: ; preds = %for.body, %entry ; CHECK-LABEL: @test6_src_align( ; CHECK: %[[Dst]] = bitcast i32* %Dest to i8* ; CHECK: %[[Src]] = bitcast i32* %Base to i8* -; CHECK: %[[Sz:[0-9]+]] = shl i64 %Size, 2 +; CHECK: %[[Sz:[0-9]+]] = shl nuw i64 %Size, 2 ; CHECK: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 1 %[[Dst]], i8* align 4 %[[Src]], i64 %[[Sz]], i1 false) ; CHECK-NOT: store ; CHECK: ret void @@ -653,7 +653,7 @@ loop.ph: br label %loop.body ; CHECK: loop.ph: ; CHECK-NEXT: %[[ZEXT_SIZE:.*]] = zext i32 %size to i64 -; CHECK-NEXT: %[[SCALED_SIZE:.*]] = shl i64 %[[ZEXT_SIZE]], 3 +; CHECK-NEXT: %[[SCALED_SIZE:.*]] = shl nuw nsw i64 %[[ZEXT_SIZE]], 3 ; CHECK-NEXT: call void @llvm.memset.p0i8.i64(i8* align 8 %{{.*}}, i8 0, i64 %[[SCALED_SIZE]], i1 false) loop.body: @@ -685,7 +685,7 @@ loop.ph: br label %loop.body ; CHECK: loop.ph: ; CHECK-NEXT: %[[ZEXT_SIZE:.*]] = zext i32 %size to i64 -; CHECK-NEXT: %[[SCALED_SIZE:.*]] = shl i64 %[[ZEXT_SIZE]], 3 +; CHECK-NEXT: %[[SCALED_SIZE:.*]] = shl nuw nsw i64 %[[ZEXT_SIZE]], 3 ; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 8 %{{.*}}, i8* align 8 %{{.*}}, i64 %[[SCALED_SIZE]], i1 false) loop.body: diff --git a/llvm/test/Transforms/LoopIdiom/memcpy-debugify-remarks.ll b/llvm/test/Transforms/LoopIdiom/memcpy-debugify-remarks.ll index 40a11395026..f66af1b5e3c 100644 --- a/llvm/test/Transforms/LoopIdiom/memcpy-debugify-remarks.ll +++ b/llvm/test/Transforms/LoopIdiom/memcpy-debugify-remarks.ll @@ -13,7 +13,7 @@ define void @test6_dest_align(i32* noalias align 1 %Base, i32* noalias align 4 % ; CHECK-NEXT: bb.nph: ; CHECK-NEXT: [[DEST1:%.*]] = bitcast i32* [[DEST:%.*]] to i8* ; CHECK-NEXT: [[BASE2:%.*]] = bitcast i32* [[BASE:%.*]] to i8* -; CHECK-NEXT: [[TMP0:%.*]] = shl i64 [[SIZE:%.*]], 2, !dbg !18 +; CHECK-NEXT: [[TMP0:%.*]] = shl nuw i64 [[SIZE:%.*]], 2, !dbg !18 ; CHECK-NEXT: call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 [[DEST1]], i8* align 1 [[BASE2]], i64 [[TMP0]], i1 false), !dbg !19 ; CHECK-NEXT: br label [[FOR_BODY:%.*]], !dbg !18 ; CHECK: for.body: diff --git a/llvm/test/Transforms/LoopReroll/basic.ll b/llvm/test/Transforms/LoopReroll/basic.ll index b415b2653ac..daaff29e030 100644 --- a/llvm/test/Transforms/LoopReroll/basic.ll +++ b/llvm/test/Transforms/LoopReroll/basic.ll @@ -745,7 +745,7 @@ define void @pointer_bitcast_baseinst(i16* %arg, i8* %arg1, i64 %arg2) { ; CHECK-LABEL: @pointer_bitcast_baseinst( ; CHECK: bb3: ; CHECK-NEXT: %indvar = phi i64 [ %indvar.next, %bb3 ], [ 0, %bb ] -; CHECK-NEXT: %4 = shl i64 %indvar, 3 +; CHECK-NEXT: %4 = shl nuw i64 %indvar, 3 ; CHECK-NEXT: %5 = add i64 %4, 1 ; CHECK-NEXT: %tmp5 = shl nuw i64 %5, 1 ; CHECK-NEXT: %tmp6 = getelementptr i8, i8* %arg1, i64 %tmp5 diff --git a/llvm/test/Transforms/LoopReroll/complex_reroll.ll b/llvm/test/Transforms/LoopReroll/complex_reroll.ll index 7dea5b7b3f8..60c04c909f3 100644 --- a/llvm/test/Transforms/LoopReroll/complex_reroll.ll +++ b/llvm/test/Transforms/LoopReroll/complex_reroll.ll @@ -104,7 +104,7 @@ while.body: ; preds = %while.body.preheade ;CHECK-NEXT: %indvar = phi i64 [ %indvar.next, %while.body ], [ 0, %while.body.preheader ] ;CHECK-NEXT: %S.012 = phi i32 [ %add, %while.body ], [ undef, %while.body.preheader ] ;CHECK-NEXT: %4 = trunc i64 %indvar to i32 -;CHECK-NEXT: %5 = mul i64 %indvar, -1 +;CHECK-NEXT: %5 = mul nsw i64 %indvar, -1 ;CHECK-NEXT: %scevgep = getelementptr i32, i32* %buf, i64 %5 ;CHECK-NEXT: %6 = load i32, i32* %scevgep, align 4 ;CHECK-NEXT: %add = add nsw i32 %6, %S.012 diff --git a/llvm/test/Transforms/LoopReroll/nonconst_lb.ll b/llvm/test/Transforms/LoopReroll/nonconst_lb.ll index d52cc1211b8..46a5805d637 100644 --- a/llvm/test/Transforms/LoopReroll/nonconst_lb.ll +++ b/llvm/test/Transforms/LoopReroll/nonconst_lb.ll @@ -52,7 +52,7 @@ for.end: ; preds = %for.body, %entry ; CHECK: %0 = add i32 %n, -1 ; CHECK: %1 = sub i32 %0, %m ; CHECK: %2 = lshr i32 %1, 2 -; CHECK: %3 = shl i32 %2, 2 +; CHECK: %3 = shl nuw i32 %2, 2 ; CHECK: %4 = add i32 %3, 3 ; CHECK: br label %for.body @@ -131,7 +131,7 @@ for.end: ; preds = %for.body, %entry ; CHECK: %0 = add i32 %n, -1 ; CHECK: %1 = sub i32 %0, %rem ; CHECK: %2 = lshr i32 %1, 2 -; CHECK: %3 = shl i32 %2, 2 +; CHECK: %3 = shl nuw i32 %2, 2 ; CHECK: %4 = add i32 %3, 3 ; CHECK: br label %for.body diff --git a/llvm/test/Transforms/LoopReroll/ptrindvar.ll b/llvm/test/Transforms/LoopReroll/ptrindvar.ll index 0a319ad3525..ce60ea7dec6 100644 --- a/llvm/test/Transforms/LoopReroll/ptrindvar.ll +++ b/llvm/test/Transforms/LoopReroll/ptrindvar.ll @@ -52,7 +52,7 @@ while.body: ;CHECK-LABEL: while.body: ;CHECK-NEXT: %indvar = phi i64 [ %indvar.next, %while.body ], [ 0, %while.body.preheader ] ;CHECK-NEXT: %S.011 = phi i32 [ %add, %while.body ], [ undef, %while.body.preheader ] -;CHECK-NEXT: %4 = mul i64 %indvar, -1 +;CHECK-NEXT: %4 = mul nsw i64 %indvar, -1 ;CHECK-NEXT: %scevgep = getelementptr i32, i32* %buf, i64 %4 ;CHECK-NEXT: %5 = load i32, i32* %scevgep, align 4 ;CHECK-NEXT: %add = add nsw i32 %5, %S.011 diff --git a/llvm/test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll b/llvm/test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll index a35aa9f36fe..db5bbf9c48f 100644 --- a/llvm/test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll +++ b/llvm/test/Transforms/LoopStrengthReduce/2011-10-06-ReusePhi.ll @@ -12,8 +12,8 @@ target datalayout = "n8:16:32:64" ; CHECK-LABEL: @test( ; multiplies are hoisted out of the loop ; CHECK: while.body.lr.ph: -; CHECK: shl i64 -; CHECK: shl i64 +; CHECK: shl nsw i64 +; CHECK: shl nsw i64 ; GEPs are ugly ; CHECK: while.body: ; CHECK: phi diff --git a/llvm/test/Transforms/LoopStrengthReduce/X86/lsr-expand-quadratic.ll b/llvm/test/Transforms/LoopStrengthReduce/X86/lsr-expand-quadratic.ll index deca954fea7..fbc767040a3 100644 --- a/llvm/test/Transforms/LoopStrengthReduce/X86/lsr-expand-quadratic.ll +++ b/llvm/test/Transforms/LoopStrengthReduce/X86/lsr-expand-quadratic.ll @@ -29,7 +29,7 @@ target triple = "x86_64-apple-macosx" ; CHECK-LABEL: for.end: ; CHECK: %tobool.us = icmp eq i32 %lsr.iv.next, 0 ; CHECK: %sub.us = select i1 %tobool.us, i32 0, i32 0 -; CHECK: %0 = sub i32 0, %sub.us +; CHECK: %0 = sub nuw nsw i32 0, %sub.us ; CHECK: %1 = sub i32 %0, %lsr.iv.next ; CHECK: %sext.us = mul i32 %lsr.iv.next2, %1 ; CHECK: %f = ashr i32 %sext.us, 24 diff --git a/llvm/test/Transforms/LoopStrengthReduce/X86/nested-loop.ll b/llvm/test/Transforms/LoopStrengthReduce/X86/nested-loop.ll index b9af5a0c68a..c7eadca8547 100644 --- a/llvm/test/Transforms/LoopStrengthReduce/X86/nested-loop.ll +++ b/llvm/test/Transforms/LoopStrengthReduce/X86/nested-loop.ll @@ -14,7 +14,7 @@ define void @foo(i32 %size, i32 %nsteps, i32 %hsize, i32* %lined, i8* %maxarray) ; CHECK-NEXT: [[CMP215:%.*]] = icmp sgt i32 [[SIZE:%.*]], 1 ; CHECK-NEXT: [[T0:%.*]] = zext i32 [[SIZE]] to i64 ; CHECK-NEXT: [[T1:%.*]] = sext i32 [[NSTEPS:%.*]] to i64 -; CHECK-NEXT: [[TMP0:%.*]] = add i64 [[T0]], -1 +; CHECK-NEXT: [[TMP0:%.*]] = add nsw i64 [[T0]], -1 ; CHECK-NEXT: br label [[FOR_BODY:%.*]] ; CHECK: for.body: ; CHECK-NEXT: [[LSR_IV1:%.*]] = phi i64 [ [[LSR_IV_NEXT2:%.*]], [[FOR_INC:%.*]] ], [ 1, [[ENTRY:%.*]] ] diff --git a/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll b/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll index 6d670c84c48..79a0e79b439 100644 --- a/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll +++ b/llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll @@ -8,7 +8,7 @@ ; CHECK: [[r2:%[a-z0-9\.]+]] = lshr exact i64 [[r1]], 1 ; CHECK: [[r3:%[a-z0-9\.]+]] = bitcast i64 [[r2]] to i64 ; CHECK: for.body.lr.ph: -; CHECK: [[r4:%[a-z0-9]+]] = shl i64 [[r3]], 1 +; CHECK: [[r4:%[a-z0-9]+]] = shl nuw i64 [[r3]], 1 ; CHECK: br label %for.body ; CHECK: for.body: ; CHECK: %lsr.iv2 = phi i64 [ %lsr.iv.next, %for.body ], [ [[r4]], %for.body.lr.ph ] diff --git a/llvm/test/Transforms/LoopVectorize/AArch64/pr36032.ll b/llvm/test/Transforms/LoopVectorize/AArch64/pr36032.ll index c51c6c98ddf..9841a9d6019 100644 --- a/llvm/test/Transforms/LoopVectorize/AArch64/pr36032.ll +++ b/llvm/test/Transforms/LoopVectorize/AArch64/pr36032.ll @@ -29,7 +29,7 @@ define void @_Z1dv() local_unnamed_addr #0 { ; CHECK-NEXT: [[MIN_ITERS_CHECK:%.*]] = icmp ult i64 [[TMP1]], 4 ; CHECK-NEXT: br i1 [[MIN_ITERS_CHECK]], label [[SCALAR_PH:%.*]], label [[VECTOR_SCEVCHECK:%.*]] ; CHECK: vector.scevcheck: -; CHECK-NEXT: [[TMP2:%.*]] = sub i64 3, [[TMP0]] +; CHECK-NEXT: [[TMP2:%.*]] = sub nsw i64 3, [[TMP0]] ; CHECK-NEXT: [[TMP3:%.*]] = add i32 [[G_0]], [[CONV]] ; CHECK-NEXT: [[TMP4:%.*]] = trunc i64 [[TMP2]] to i32 ; CHECK-NEXT: [[MUL:%.*]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 1, i32 [[TMP4]]) diff --git a/llvm/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll b/llvm/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll index 683e857e5f2..43c834ed808 100644 --- a/llvm/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll +++ b/llvm/test/Transforms/LoopVectorize/X86/illegal-parallel-loop-uniform-write.ll @@ -27,7 +27,7 @@ define void @foo(i32* nocapture %a, i32* nocapture %b, i32 %k, i32 %m) #0 { ; CHECK: for.body3.lr.ph.us.preheader: ; CHECK-NEXT: [[TMP0:%.*]] = add i32 [[M]], -1 ; CHECK-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64 -; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], 1 +; CHECK-NEXT: [[TMP2:%.*]] = add nuw nsw i64 [[TMP1]], 1 ; CHECK-NEXT: [[TMP3:%.*]] = zext i32 [[K:%.*]] to i64 ; CHECK-NEXT: br label [[FOR_BODY3_LR_PH_US:%.*]] ; CHECK: for.end.us: |
