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-rw-r--r--llvm/test/MC/ARM/basic-arm-instructions.s4
-rw-r--r--llvm/test/MC/ARM/basic-thumb2-instructions.s4
-rw-r--r--llvm/test/MC/ARM/csdb-errors.s6
-rw-r--r--llvm/test/MC/ARM/csdb.s8
-rw-r--r--llvm/test/MC/ARM/speculation-barriers-errors.s34
-rw-r--r--llvm/test/MC/ARM/speculation-barriers.s22
-rw-r--r--llvm/test/MC/Disassembler/ARM/basic-arm-instructions.txt4
-rw-r--r--llvm/test/MC/Disassembler/ARM/thumb2.txt4
8 files changed, 64 insertions, 22 deletions
diff --git a/llvm/test/MC/ARM/basic-arm-instructions.s b/llvm/test/MC/ARM/basic-arm-instructions.s
index d4d79364b3d..e58f2926c20 100644
--- a/llvm/test/MC/ARM/basic-arm-instructions.s
+++ b/llvm/test/MC/ARM/basic-arm-instructions.s
@@ -926,11 +926,11 @@ Lforward:
@ CHECK: dsb nsh @ encoding: [0x47,0xf0,0x7f,0xf5]
@ CHECK: dsb nshst @ encoding: [0x46,0xf0,0x7f,0xf5]
@ CHECK: dsb #0x5 @ encoding: [0x45,0xf0,0x7f,0xf5]
-@ CHECK: dsb #0x4 @ encoding: [0x44,0xf0,0x7f,0xf5]
+@ CHECK: pssbb @ encoding: [0x44,0xf0,0x7f,0xf5]
@ CHECK: dsb osh @ encoding: [0x43,0xf0,0x7f,0xf5]
@ CHECK: dsb oshst @ encoding: [0x42,0xf0,0x7f,0xf5]
@ CHECK: dsb #0x1 @ encoding: [0x41,0xf0,0x7f,0xf5]
-@ CHECK: dsb #0x0 @ encoding: [0x40,0xf0,0x7f,0xf5]
+@ CHECK: ssbb @ encoding: [0x40,0xf0,0x7f,0xf5]
@ CHECK: dsb #0x8 @ encoding: [0x48,0xf0,0x7f,0xf5]
@ CHECK: dsb nsh @ encoding: [0x47,0xf0,0x7f,0xf5]
diff --git a/llvm/test/MC/ARM/basic-thumb2-instructions.s b/llvm/test/MC/ARM/basic-thumb2-instructions.s
index 6f81f00350d..4226b8092cf 100644
--- a/llvm/test/MC/ARM/basic-thumb2-instructions.s
+++ b/llvm/test/MC/ARM/basic-thumb2-instructions.s
@@ -657,11 +657,11 @@ _func:
@ CHECK: dsb nsh @ encoding: [0xbf,0xf3,0x47,0x8f]
@ CHECK: dsb nshst @ encoding: [0xbf,0xf3,0x46,0x8f]
@ CHECK: dsb #0x5 @ encoding: [0xbf,0xf3,0x45,0x8f]
-@ CHECK: dsb #0x4 @ encoding: [0xbf,0xf3,0x44,0x8f]
+@ CHECK: pssbb @ encoding: [0xbf,0xf3,0x44,0x8f]
@ CHECK: dsb osh @ encoding: [0xbf,0xf3,0x43,0x8f]
@ CHECK: dsb oshst @ encoding: [0xbf,0xf3,0x42,0x8f]
@ CHECK: dsb #0x1 @ encoding: [0xbf,0xf3,0x41,0x8f]
-@ CHECK: dsb #0x0 @ encoding: [0xbf,0xf3,0x40,0x8f]
+@ CHECK: ssbb @ encoding: [0xbf,0xf3,0x40,0x8f]
@ CHECK: dsb sy @ encoding: [0xbf,0xf3,0x4f,0x8f]
@ CHECK: dsb st @ encoding: [0xbf,0xf3,0x4e,0x8f]
diff --git a/llvm/test/MC/ARM/csdb-errors.s b/llvm/test/MC/ARM/csdb-errors.s
deleted file mode 100644
index af74a46b27c..00000000000
--- a/llvm/test/MC/ARM/csdb-errors.s
+++ /dev/null
@@ -1,6 +0,0 @@
-// RUN: not llvm-mc -triple armv8a-none-eabi %s 2>&1 | FileCheck %s
-// RUN: not llvm-mc -triple thumbv8a-none-eabi %s 2>&1 | FileCheck %s
-
- it eq
- csdbeq
-// CHECK: error: instruction 'csdb' is not predicable, but condition code specified
diff --git a/llvm/test/MC/ARM/csdb.s b/llvm/test/MC/ARM/csdb.s
deleted file mode 100644
index 4d78be40fa0..00000000000
--- a/llvm/test/MC/ARM/csdb.s
+++ /dev/null
@@ -1,8 +0,0 @@
-@ RUN: llvm-mc -triple armv8a-none-eabi -show-encoding %s | FileCheck %s --check-prefix=ARM
-@ RUN: llvm-mc -triple thumbv8a-none-eabi -show-encoding %s | FileCheck %s --check-prefix=THUMB
-@ RUN: not llvm-mc -triple thumbv6m-none-eabi -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
-
- csdb
-@ ARM: csdb @ encoding: [0x14,0xf0,0x20,0xe3]
-@ THUMB: csdb @ encoding: [0xaf,0xf3,0x14,0x80]
-@ ERROR: error: instruction requires: thumb2
diff --git a/llvm/test/MC/ARM/speculation-barriers-errors.s b/llvm/test/MC/ARM/speculation-barriers-errors.s
new file mode 100644
index 00000000000..9ef89d4af9a
--- /dev/null
+++ b/llvm/test/MC/ARM/speculation-barriers-errors.s
@@ -0,0 +1,34 @@
+// RUN: not llvm-mc -triple armv8a-none-eabi %s 2>&1 | FileCheck %s
+// RUN: not llvm-mc -triple thumbv8a-none-eabi %s 2>&1 | FileCheck %s -check-prefix=THUMB
+
+ it eq
+ csdbeq
+
+ it eq
+ ssbbeq
+
+ it eq
+ pssbbeq
+
+ it eq
+ hinteq #20
+
+ it eq
+ dsbeq #0
+
+ it eq
+ dsbeq #4
+
+// CHECK: error: instruction 'csdb' is not predicable, but condition code specified
+// CHECK: error: instruction 'ssbb' is not predicable, but condition code specified
+// CHECK: error: instruction 'pssbb' is not predicable, but condition code specified
+// CHECK: error: instruction 'csdb' is not predicable, but condition code specified
+// CHECK: error: instruction 'dsb' is not predicable, but condition code specified
+// CHECK: error: instruction 'dsb' is not predicable, but condition code specified
+
+// THUMB: error: instruction 'csdb' is not predicable, but condition code specified
+// THUMB: error: instruction 'ssbb' is not predicable, but condition code specified
+// THUMB: error: instruction 'pssbb' is not predicable, but condition code specified
+// THUMB: error: instruction 'csdb' is not predicable, but condition code specified
+// THUMB: error: instruction 'ssbb' is not predicable, but condition code specified
+// THUMB: error: instruction 'pssbb' is not predicable, but condition code specified
diff --git a/llvm/test/MC/ARM/speculation-barriers.s b/llvm/test/MC/ARM/speculation-barriers.s
new file mode 100644
index 00000000000..c9d143ab44f
--- /dev/null
+++ b/llvm/test/MC/ARM/speculation-barriers.s
@@ -0,0 +1,22 @@
+@ RUN: llvm-mc -triple armv8a-none-eabi -show-encoding %s | FileCheck %s --check-prefix=ARM
+@ RUN: llvm-mc -triple thumbv8a-none-eabi -show-encoding %s | FileCheck %s --check-prefix=THUMB
+@ RUN: not llvm-mc -triple thumbv6m-none-eabi -show-encoding %s 2>&1 | FileCheck %s --check-prefix=ERROR
+
+csdb
+ssbb
+pssbb
+
+@ ARM: csdb @ encoding: [0x14,0xf0,0x20,0xe3]
+@ ARM: ssbb @ encoding: [0x40,0xf0,0x7f,0xf5]
+@ ARM: pssbb @ encoding: [0x44,0xf0,0x7f,0xf5]
+
+@ THUMB: csdb @ encoding: [0xaf,0xf3,0x14,0x80]
+@ THUMB: ssbb @ encoding: [0xbf,0xf3,0x40,0x8f]
+@ THUMB: pssbb @ encoding: [0xbf,0xf3,0x44,0x8f]
+
+@ ERROR: error: instruction requires: thumb2
+@ ERROR-NEXT: csdb
+@ ERROR: error: instruction requires: thumb2
+@ ERROR-NEXT: ssbb
+@ ERROR: error: instruction requires: thumb2
+@ ERROR-NEXT: pssbb
diff --git a/llvm/test/MC/Disassembler/ARM/basic-arm-instructions.txt b/llvm/test/MC/Disassembler/ARM/basic-arm-instructions.txt
index 335e69fe241..dc2247a1e36 100644
--- a/llvm/test/MC/Disassembler/ARM/basic-arm-instructions.txt
+++ b/llvm/test/MC/Disassembler/ARM/basic-arm-instructions.txt
@@ -553,11 +553,11 @@
# DSB
#------------------------------------------------------------------------------
-# CHECK: dsb #0x0
+# CHECK: ssbb
# CHECK: dsb #0x1
# CHECK: dsb oshst
# CHECK: dsb osh
-# CHECK: dsb #0x4
+# CHECK: pssbb
# CHECK: dsb #0x5
# CHECK: dsb nshst
# CHECK: dsb nsh
diff --git a/llvm/test/MC/Disassembler/ARM/thumb2.txt b/llvm/test/MC/Disassembler/ARM/thumb2.txt
index c8b40803133..986dbd52c2e 100644
--- a/llvm/test/MC/Disassembler/ARM/thumb2.txt
+++ b/llvm/test/MC/Disassembler/ARM/thumb2.txt
@@ -401,11 +401,11 @@
#CHECK: dsb nsh
#CHECK: dsb nshst
#CHECK: dsb #0x5
-#CHECK: dsb #0x4
+#CHECK: pssbb
#CHECK: dsb osh
#CHECK: dsb oshst
#CHECK: dsb #0x1
-#CHECK: dsb #0x0
+#CHECK: ssbb
0xbf 0xf3 0x4f 0x8f
0xbf 0xf3 0x4e 0x8f
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