diff options
Diffstat (limited to 'llvm/test')
39 files changed, 126 insertions, 115 deletions
diff --git a/llvm/test/CodeGen/AArch64/global-merge-1.ll b/llvm/test/CodeGen/AArch64/global-merge-1.ll index b5a28a18718..e6ea6620881 100644 --- a/llvm/test/CodeGen/AArch64/global-merge-1.ll +++ b/llvm/test/CodeGen/AArch64/global-merge-1.ll @@ -23,9 +23,9 @@ define void @f1(i32 %a1, i32 %a2) { ;CHECK: .type .L_MergedGlobals,@object // @_MergedGlobals ;CHECK: .local .L_MergedGlobals ;CHECK: .comm .L_MergedGlobals,8,8 -;CHECK: m = .L_MergedGlobals -;CHECK: n = .L_MergedGlobals+4 +;CHECK: .set m, .L_MergedGlobals +;CHECK: .set n, .L_MergedGlobals+4 ;CHECK-APPLE-IOS: .zerofill __DATA,__bss,__MergedGlobals,8,3 ; @_MergedGlobals -;CHECK-APPLE-IOS-NOT: _m = l__MergedGlobals -;CHECK-APPLE-IOS-NOT: _n = l__MergedGlobals+4 +;CHECK-APPLE-IOS-NOT: .set _m, l__MergedGlobals +;CHECK-APPLE-IOS-NOT: .set _n, l__MergedGlobals+4 diff --git a/llvm/test/CodeGen/AArch64/global-merge-2.ll b/llvm/test/CodeGen/AArch64/global-merge-2.ll index 6cd3f558043..fdb29d26390 100644 --- a/llvm/test/CodeGen/AArch64/global-merge-2.ll +++ b/llvm/test/CodeGen/AArch64/global-merge-2.ll @@ -32,21 +32,21 @@ define void @g1(i32 %a1, i32 %a2) { ;CHECK: .comm .L_MergedGlobals,12,8 ;CHECK: .globl x -;CHECK: x = .L_MergedGlobals +;CHECK: .set x, .L_MergedGlobals ;CHECK: .size x, 4 ;CHECK: .globl y -;CHECK: y = .L_MergedGlobals+4 +;CHECK: .set y, .L_MergedGlobals+4 ;CHECK: .size y, 4 ;CHECK: .globl z -;CHECK: z = .L_MergedGlobals+8 +;CHECK: .set z, .L_MergedGlobals+8 ;CHECK: .size z, 4 ;CHECK-APPLE-IOS: .zerofill __DATA,__common,__MergedGlobals_x,12,3 ;CHECK-APPLE-IOS: .globl _x -;CHECK-APPLE-IOS: = __MergedGlobals_x +;CHECK-APPLE-IOS: .set {{.*}}, __MergedGlobals_x ;CHECK-APPLE-IOS: .globl _y -;CHECK-APPLE-IOS: _y = __MergedGlobals_x+4 +;CHECK-APPLE-IOS: .set _y, __MergedGlobals_x+4 ;CHECK-APPLE-IOS: .globl _z -;CHECK-APPLE-IOS: _z = __MergedGlobals_x+8 +;CHECK-APPLE-IOS: .set _z, __MergedGlobals_x+8 ;CHECK-APPLE-IOS: .subsections_via_symbols diff --git a/llvm/test/CodeGen/AArch64/global-merge-3.ll b/llvm/test/CodeGen/AArch64/global-merge-3.ll index 6418f019f74..106d6da4a4a 100644 --- a/llvm/test/CodeGen/AArch64/global-merge-3.ll +++ b/llvm/test/CodeGen/AArch64/global-merge-3.ll @@ -36,16 +36,16 @@ define void @f1(i32 %a1, i32 %a2, i32 %a3) { ;CHECK-APPLE-IOS: .zerofill __DATA,__common,__MergedGlobals_y,4000,4 -;CHECK: z = .L_MergedGlobals +;CHECK: .set z, .L_MergedGlobals ;CHECK: .globl x -;CHECK: x = .L_MergedGlobals+4 +;CHECK: .set x, .L_MergedGlobals+4 ;CHECK: .size x, 4000 ;CHECK: .globl y -;CHECK: y = .L_MergedGlobals.1 +;CHECK: .set y, .L_MergedGlobals.1 ;CHECK: .size y, 4000 -;CHECK-APPLE-IOS-NOT: _z = __MergedGlobals_x +;CHECK-APPLE-IOS-NOT: .set _z, __MergedGlobals_x ;CHECK-APPLE-IOS:.globl _x -;CHECK-APPLE-IOS: _x = __MergedGlobals_x+4 +;CHECK-APPLE-IOS:.set _x, __MergedGlobals_x+4 ;CHECK-APPLE-IOS:.globl _y -;CHECK-APPLE-IOS: _y = __MergedGlobals_y +;CHECK-APPLE-IOS:.set _y, __MergedGlobals_y diff --git a/llvm/test/CodeGen/ARM/alias_store.ll b/llvm/test/CodeGen/ARM/alias_store.ll index 48f21fc03ec..1509cb78f8c 100644 --- a/llvm/test/CodeGen/ARM/alias_store.ll +++ b/llvm/test/CodeGen/ARM/alias_store.ll @@ -13,4 +13,4 @@ entry: ; CHECK: ldr r{{.*}}, [[L:.*]] ; CHECK: [[L]]: ; CHECK-NEXT: .long XA -; CHECK: XA = X+1 +; CHECK: .set XA, X+1 diff --git a/llvm/test/CodeGen/ARM/aliases.ll b/llvm/test/CodeGen/ARM/aliases.ll index 665ffe902c8..74694f39221 100644 --- a/llvm/test/CodeGen/ARM/aliases.ll +++ b/llvm/test/CodeGen/ARM/aliases.ll @@ -6,30 +6,30 @@ ; CHECK: .size .Lstructvar, 8 ; CHECK: .globl foo1 -; CHECK: foo1 = bar +; CHECK: .set foo1, bar ; CHECK-NOT: .size foo1 ; CHECK: .globl foo2 -; CHECK: foo2 = bar +; CHECK: .set foo2, bar ; CHECK-NOT: .size foo2 ; CHECK: .weak bar_f -; CHECK: bar_f = foo_f +; CHECK: .set bar_f, foo_f ; CHECK-NOT: .size bar_f -; CHECK: bar_i = bar +; CHECK: .set bar_i, bar ; CHECK-NOT: .size bar_i ; CHECK: .globl A -; CHECK: A = bar +; CHECK: .set A, bar ; CHECK-NOT: .size A ; CHECK: .globl elem0 -; CHECK: elem0 = .Lstructvar +; CHECK: .set elem0, .Lstructvar ; CHECK: .size elem0, 4 ; CHECK: .globl elem1 -; CHECK: elem1 = .Lstructvar+4 +; CHECK: .set elem1, .Lstructvar+4 ; CHECK: .size elem1, 4 @bar = global i32 42 diff --git a/llvm/test/CodeGen/ARM/global-merge-dllexport.ll b/llvm/test/CodeGen/ARM/global-merge-dllexport.ll index 7415320cb4c..d9bbaf9e065 100644 --- a/llvm/test/CodeGen/ARM/global-merge-dllexport.ll +++ b/llvm/test/CodeGen/ARM/global-merge-dllexport.ll @@ -14,8 +14,8 @@ define void @f1(i32 %a1, i32 %a2) { ; CHECK: .lcomm .L_MergedGlobals,8,4 ; CHECK: .globl x -; CHECK: x = .L_MergedGlobals +; CHECK: .set x, .L_MergedGlobals ; CHECK: .globl y -; CHECK: y = .L_MergedGlobals+4 +; CHECK: .set y, .L_MergedGlobals+4 ; CHECK: .section .drectve,"yn" ; CHECK: .ascii " /EXPORT:y,DATA" diff --git a/llvm/test/CodeGen/ARM/global-merge-external.ll b/llvm/test/CodeGen/ARM/global-merge-external.ll index 25bbd086958..9834836d2b7 100644 --- a/llvm/test/CodeGen/ARM/global-merge-external.ll +++ b/llvm/test/CodeGen/ARM/global-merge-external.ll @@ -45,18 +45,18 @@ define void @g1(i32 %a1, i32 %a2) { ;CHECK-WIN32: .lcomm .L_MergedGlobals,12,4 ;CHECK-MERGE: .globl x -;CHECK-MERGE: x = .L_MergedGlobals +;CHECK-MERGE: .set x, .L_MergedGlobals ;CHECK-MERGE: .size x, 4 ;CHECK-MERGE: .globl y -;CHECK-MERGE: y = .L_MergedGlobals+4 +;CHECK-MERGE: .set y, .L_MergedGlobals+4 ;CHECK-MERGE: .size y, 4 ;CHECK-MERGE: .globl z -;CHECK-MERGE: z = .L_MergedGlobals+8 +;CHECK-MERGE: .set z, .L_MergedGlobals+8 ;CHECK-MERGE: .size z, 4 ;CHECK-WIN32: .globl x -;CHECK-WIN32: x = .L_MergedGlobals +;CHECK-WIN32: .set x, .L_MergedGlobals ;CHECK-WIN32: .globl y -;CHECK-WIN32: y = .L_MergedGlobals+4 +;CHECK-WIN32: .set y, .L_MergedGlobals+4 ;CHECK-WIN32: .globl z -;CHECK-WIN32: z = .L_MergedGlobals+8 +;CHECK-WIN32: .set z, .L_MergedGlobals+8 diff --git a/llvm/test/CodeGen/Mips/hf16call32_body.ll b/llvm/test/CodeGen/Mips/hf16call32_body.ll index 49ce181b015..84be154de58 100644 --- a/llvm/test/CodeGen/Mips/hf16call32_body.ll +++ b/llvm/test/CodeGen/Mips/hf16call32_body.ll @@ -24,7 +24,7 @@ entry: ; stel: addiu $25, $25, %lo(v_sf) ; stel: mfc1 $4, $f12 ; stel: jr $25 -; stel: __fn_local_v_sf = v_sf +; stel: .set $__fn_local_v_sf, v_sf ; stel: .end __fn_stub_v_sf declare i32 @printf(i8*, ...) #1 @@ -46,7 +46,7 @@ entry: ; stel: mfc1 $4, $f12 ; stel: mfc1 $5, $f13 ; stel: jr $25 -; stel: __fn_local_v_df = v_df +; stel: .set $__fn_local_v_df, v_df ; stel: .end __fn_stub_v_df ; Function Attrs: nounwind @@ -70,7 +70,7 @@ entry: ; stel: mfc1 $4, $f12 ; stel: mfc1 $5, $f14 ; stel: jr $25 -; stel: __fn_local_v_sf_sf = v_sf_sf +; stel: .set $__fn_local_v_sf_sf, v_sf_sf ; stel: .end __fn_stub_v_sf_sf ; Function Attrs: nounwind @@ -95,7 +95,7 @@ entry: ; stel: mfc1 $6, $f14 ; stel: mfc1 $7, $f15 ; stel: jr $25 -; stel: __fn_local_v_sf_df = v_sf_df +; stel: .set $__fn_local_v_sf_df, v_sf_df ; stel: .end __fn_stub_v_sf_df ; Function Attrs: nounwind @@ -120,7 +120,7 @@ entry: ; stel: mfc1 $5, $f13 ; stel: mfc1 $6, $f14 ; stel: jr $25 -; stel: __fn_local_v_df_sf = v_df_sf +; stel: .set $__fn_local_v_df_sf, v_df_sf ; stel: .end __fn_stub_v_df_sf ; Function Attrs: nounwind @@ -146,7 +146,7 @@ entry: ; stel: mfc1 $6, $f14 ; stel: mfc1 $7, $f15 ; stel: jr $25 -; stel: __fn_local_v_df_df = v_df_df +; stel: .set $__fn_local_v_df_df, v_df_df ; stel: .end __fn_stub_v_df_df ; Function Attrs: nounwind @@ -174,7 +174,7 @@ entry: ; stel: addiu $25, $25, %lo(sf_sf) ; stel: mfc1 $4, $f12 ; stel: jr $25 -; stel: __fn_local_sf_sf = sf_sf +; stel: .set $__fn_local_sf_sf, sf_sf ; stel: .end __fn_stub_sf_sf @@ -196,7 +196,7 @@ entry: ; stel: mfc1 $4, $f12 ; stel: mfc1 $5, $f13 ; stel: jr $25 -; stel: __fn_local_sf_df = sf_df +; stel: .set $__fn_local_sf_df, sf_df ; stel: .end __fn_stub_sf_df ; Function Attrs: nounwind @@ -221,7 +221,7 @@ entry: ; stel: mfc1 $4, $f12 ; stel: mfc1 $5, $f14 ; stel: jr $25 -; stel: __fn_local_sf_sf_sf = sf_sf_sf +; stel: .set $__fn_local_sf_sf_sf, sf_sf_sf ; stel: .end __fn_stub_sf_sf_sf ; Function Attrs: nounwind @@ -247,7 +247,7 @@ entry: ; stel: mfc1 $6, $f14 ; stel: mfc1 $7, $f15 ; stel: jr $25 -; stel: __fn_local_sf_sf_df = sf_sf_df +; stel: .set $__fn_local_sf_sf_df, sf_sf_df ; stel: .end __fn_stub_sf_sf_df ; Function Attrs: nounwind @@ -273,7 +273,7 @@ entry: ; stel: mfc1 $5, $f13 ; stel: mfc1 $6, $f14 ; stel: jr $25 -; stel: __fn_local_sf_df_sf = sf_df_sf +; stel: .set $__fn_local_sf_df_sf, sf_df_sf ; stel: .end __fn_stub_sf_df_sf ; Function Attrs: nounwind @@ -300,7 +300,7 @@ entry: ; stel: mfc1 $6, $f14 ; stel: mfc1 $7, $f15 ; stel: jr $25 -; stel: __fn_local_sf_df_df = sf_df_df +; stel: .set $__fn_local_sf_df_df, sf_df_df ; stel: .end __fn_stub_sf_df_df attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/Mips/mips16ex.ll b/llvm/test/CodeGen/Mips/mips16ex.ll index b2521ae872a..fe16fee94fa 100644 --- a/llvm/test/CodeGen/Mips/mips16ex.ll +++ b/llvm/test/CodeGen/Mips/mips16ex.ll @@ -2,7 +2,7 @@ ;16: main: ;16-NEXT: [[TMP:.*]]: -;16-NEXT: $func_begin0 = ([[TMP]]) +;16-NEXT: .set $func_begin0, ([[TMP]]) ;16-NEXT: .cfi_startproc ;16-NEXT: .cfi_personality @.str = private unnamed_addr constant [7 x i8] c"hello\0A\00", align 1 diff --git a/llvm/test/CodeGen/PowerPC/asm-printer-topological-order.ll b/llvm/test/CodeGen/PowerPC/asm-printer-topological-order.ll index 27132c7f2bc..30ab35fce60 100644 --- a/llvm/test/CodeGen/PowerPC/asm-printer-topological-order.ll +++ b/llvm/test/CodeGen/PowerPC/asm-printer-topological-order.ll @@ -10,6 +10,6 @@ entry: } ; CHECK-LABEL: TestD: -; CHECK: TestC = TestD -; CHECK-DAG: TestB = TestC -; CHECK-DAG: TestA = TestC +; CHECK: .set TestC, TestD +; CHECK-DAG: .set TestB, TestC +; CHECK-DAG: .set TestA, TestC diff --git a/llvm/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll b/llvm/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll index 65b577b1e7d..52e83a177bf 100644 --- a/llvm/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll +++ b/llvm/test/CodeGen/X86/2007-09-06-ExtWeakAliasee.ll @@ -10,4 +10,4 @@ define weak i32 @pthread_once(i32*, void ()*) { ; CHECK: pthread_once: ; CHECK: .weak __gthrw_pthread_once -; CHECK: __gthrw_pthread_once = pthread_once +; CHECK: .set __gthrw_pthread_once, pthread_once diff --git a/llvm/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll b/llvm/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll index 9f36a283387..14fd0acd1fd 100644 --- a/llvm/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll +++ b/llvm/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll @@ -65,15 +65,15 @@ attributes #1 = { nounwind readnone } ; CHECK-NEXT: [[CLOBBER:Ltmp[0-9]*]] ; CHECK: Ldebug_loc0: -; CHECK-NEXT: [[SET1:.*]] = Lfunc_begin0-Lfunc_begin0 +; CHECK-NEXT: .set [[SET1:.*]], Lfunc_begin0-Lfunc_begin0 ; CHECK-NEXT: .quad [[SET1]] -; CHECK-NEXT: [[SET2:.*]] = [[LABEL]]-Lfunc_begin0 +; CHECK-NEXT: .set [[SET2:.*]], [[LABEL]]-Lfunc_begin0 ; CHECK-NEXT: .quad [[SET2]] ; CHECK-NEXT: .short 1 ## Loc expr size ; CHECK-NEXT: .byte 85 -; CHECK-NEXT: [[SET3:.*]] = [[LABEL]]-Lfunc_begin0 +; CHECK-NEXT: .set [[SET3:.*]], [[LABEL]]-Lfunc_begin0 ; CHECK-NEXT: .quad [[SET3]] -; CHECK-NEXT: [[SET4:.*]] = [[CLOBBER]]-Lfunc_begin0 +; CHECK-NEXT: .set [[SET4:.*]], [[CLOBBER]]-Lfunc_begin0 ; CHECK-NEXT: .quad [[SET4]] ; CHECK-NEXT: .short 1 ## Loc expr size ; CHECK-NEXT: .byte 83 diff --git a/llvm/test/CodeGen/X86/alias-gep.ll b/llvm/test/CodeGen/X86/alias-gep.ll index 5ecf20ba78e..9b038d08e40 100644 --- a/llvm/test/CodeGen/X86/alias-gep.ll +++ b/llvm/test/CodeGen/X86/alias-gep.ll @@ -3,17 +3,17 @@ ;MACHO: .globl _offsetSym0 ;MACHO-NOT: .alt_entry -;MACHO: _offsetSym0 = _s +;MACHO: .set _offsetSym0, _s ;MACHO: .globl _offsetSym1 ;MACHO: .alt_entry _offsetSym1 -;MACHO: _offsetSym1 = _s+8 +;MACHO: .set _offsetSym1, _s+8 ;ELF: .globl offsetSym0 ;ELF-NOT: .alt_entry -;ELF: offsetSym0 = s +;ELF: .set offsetSym0, s ;ELF: .globl offsetSym1 ;ELF-NOT: .alt_entry -;ELF: offsetSym1 = s+8 +;ELF: .set offsetSym1, s+8 %struct.S1 = type { i32, i32, i32 } diff --git a/llvm/test/CodeGen/X86/aliases.ll b/llvm/test/CodeGen/X86/aliases.ll index 50c7b929c82..d69b820a916 100644 --- a/llvm/test/CodeGen/X86/aliases.ll +++ b/llvm/test/CodeGen/X86/aliases.ll @@ -48,16 +48,16 @@ define i32 @foo_f() { ; CHECK-DAG: .protected bar_p @bar_p = protected alias i32, i32* @bar -; CHECK-DAG: test2 = bar+4 +; CHECK-DAG: .set test2, bar+4 @test2 = alias i32, getelementptr(i32, i32* @bar, i32 1) -; CHECK-DAG: test3 = 42 +; CHECK-DAG: .set test3, 42 @test3 = alias i32, inttoptr(i32 42 to i32*) -; CHECK-DAG: test4 = bar +; CHECK-DAG: .set test4, bar @test4 = alias i32, inttoptr(i64 ptrtoint (i32* @bar to i64) to i32*) -; CHECK-DAG: test5 = test2-bar +; CHECK-DAG: .set test5, test2-bar @test5 = alias i32, inttoptr(i32 sub (i32 ptrtoint (i32* @test2 to i32), i32 ptrtoint (i32* @bar to i32)) to i32*) diff --git a/llvm/test/CodeGen/X86/catchret-empty-fallthrough.ll b/llvm/test/CodeGen/X86/catchret-empty-fallthrough.ll index 7ad10330317..ef8caf36a68 100644 --- a/llvm/test/CodeGen/X86/catchret-empty-fallthrough.ll +++ b/llvm/test/CodeGen/X86/catchret-empty-fallthrough.ll @@ -44,7 +44,7 @@ return: ; preds = %catch, %entry ; CHECK: .LBB0_[[catch:[0-9]+]]: ; CHECK: .seh_handlerdata -; CHECK-NEXT: .Lfoo$parent_frame_offset = 32 +; CHECK-NEXT: .set .Lfoo$parent_frame_offset, 32 ; CHECK-NEXT: .long (.Llsda_end0-.Llsda_begin0)/16 ; CHECK-NEXT: .Llsda_begin0: ; CHECK-NEXT: .long .Ltmp0@IMGREL+1 diff --git a/llvm/test/CodeGen/X86/coff-comdat.ll b/llvm/test/CodeGen/X86/coff-comdat.ll index 712825a9910..d1fe27ac811 100644 --- a/llvm/test/CodeGen/X86/coff-comdat.ll +++ b/llvm/test/CodeGen/X86/coff-comdat.ll @@ -89,4 +89,4 @@ $vftable = comdat largest ; CHECK: .globl _f6 ; CHECK: .section .rdata,"dr",largest,_vftable ; CHECK: .globl _vftable -; CHECK: _vftable = L_some_name+4 +; CHECK: .set _vftable, L_some_name+4 diff --git a/llvm/test/CodeGen/X86/coff-feat00.ll b/llvm/test/CodeGen/X86/coff-feat00.ll index 1dcd4276399..21dd04ed34c 100644 --- a/llvm/test/CodeGen/X86/coff-feat00.ll +++ b/llvm/test/CodeGen/X86/coff-feat00.ll @@ -4,4 +4,4 @@ define i32 @foo() { ret i32 0 } -; CHECK: @feat.00 = 1 +; CHECK: .set @feat.00, 1 diff --git a/llvm/test/CodeGen/X86/dllexport-x86_64.ll b/llvm/test/CodeGen/X86/dllexport-x86_64.ll index aa342479fcf..a2825bc0458 100644 --- a/llvm/test/CodeGen/X86/dllexport-x86_64.ll +++ b/llvm/test/CodeGen/X86/dllexport-x86_64.ll @@ -58,23 +58,23 @@ define weak_odr dllexport void @weak1() { ; CHECK: .globl alias -; CHECK: alias = notExported +; CHECK: .set alias, notExported @alias = dllexport alias void(), void()* @notExported ; CHECK: .globl aliasNotExported -; CHECK: aliasNotExported = f1 +; CHECK: .set aliasNotExported, f1 @aliasNotExported = alias void(), void()* @f1 ; CHECK: .globl alias2 -; CHECK: alias2 = f1 +; CHECK: .set alias2, f1 @alias2 = dllexport alias void(), void()* @f1 ; CHECK: .globl alias3 -; CHECK: alias3 = notExported +; CHECK: .set alias3, notExported @alias3 = dllexport alias void(), void()* @notExported ; CHECK: .weak weak_alias -; CHECK: weak_alias = f1 +; CHECK: .set weak_alias, f1 @weak_alias = weak_odr dllexport alias void(), void()* @f1 @blob = global [6 x i8] c"\B8*\00\00\00\C3", section ".text", align 16 diff --git a/llvm/test/CodeGen/X86/dllexport.ll b/llvm/test/CodeGen/X86/dllexport.ll index 7c5d5f4a5d2..999733949ab 100644 --- a/llvm/test/CodeGen/X86/dllexport.ll +++ b/llvm/test/CodeGen/X86/dllexport.ll @@ -79,19 +79,19 @@ define weak_odr dllexport void @weak1() { ; CHECK: .globl _alias -; CHECK: _alias = _notExported +; CHECK: .set _alias, _notExported @alias = dllexport alias void(), void()* @notExported ; CHECK: .globl _alias2 -; CHECK: _alias2 = _f1 +; CHECK: .set _alias2, _f1 @alias2 = dllexport alias void(), void()* @f1 ; CHECK: .globl _alias3 -; CHECK: _alias3 = _notExported +; CHECK: .set _alias3, _notExported @alias3 = dllexport alias void(), void()* @notExported ; CHECK: .weak _weak_alias -; CHECK: _weak_alias = _f1 +; CHECK: .set _weak_alias, _f1 @weak_alias = weak_odr dllexport alias void(), void()* @f1 ; Verify items that should not be exported do not appear in the export table. diff --git a/llvm/test/CodeGen/X86/ifunc-asm.ll b/llvm/test/CodeGen/X86/ifunc-asm.ll index b65ba86a4f1..ef3f5b32ad1 100644 --- a/llvm/test/CodeGen/X86/ifunc-asm.ll +++ b/llvm/test/CodeGen/X86/ifunc-asm.ll @@ -12,4 +12,4 @@ entry: @foo = ifunc i32 (i32), i64 ()* @foo_ifunc ; CHECK: .type foo,@function ; CHECK-NEXT: .type foo,@gnu_indirect_function -; CHECK-NEXT: foo = foo_ifunc +; CHECK-NEXT: .set foo, foo_ifunc diff --git a/llvm/test/CodeGen/X86/lea-opt-memop-check-1.ll b/llvm/test/CodeGen/X86/lea-opt-memop-check-1.ll index 00d47fae25a..47ea1ace1b0 100644 --- a/llvm/test/CodeGen/X86/lea-opt-memop-check-1.ll +++ b/llvm/test/CodeGen/X86/lea-opt-memop-check-1.ll @@ -48,9 +48,9 @@ entry: call fastcc void @"\01?fin$0@0@test2@@"(i8* %tmp0) ret void ; CHECK-LABEL: test2: -; CHECK: Ltest2$frame_escape_0 = 8 -; CHECK: Ltest2$frame_escape_1 = 4 -; CHECK: Ltest2$frame_escape_2 = 0 +; CHECK: .set Ltest2$frame_escape_0, 8 +; CHECK: .set Ltest2$frame_escape_1, 4 +; CHECK: .set Ltest2$frame_escape_2, 0 ; CHECK: calll "?fin$0@0@test2@@" } diff --git a/llvm/test/CodeGen/X86/localescape.ll b/llvm/test/CodeGen/X86/localescape.ll index a49af089868..2fba9b2868a 100644 --- a/llvm/test/CodeGen/X86/localescape.ll +++ b/llvm/test/CodeGen/X86/localescape.ll @@ -78,8 +78,8 @@ define void @alloc_func(i32 %n) { ; X64: .seh_stackalloc 16 ; X64: leaq 16(%rsp), %rbp ; X64: .seh_setframe 5, 16 -; X64: .Lalloc_func$frame_escape_0 = -4 -; X64: .Lalloc_func$frame_escape_1 = -12 +; X64: .set .Lalloc_func$frame_escape_0, -4 +; X64: .set .Lalloc_func$frame_escape_1, -12 ; X64: movl $42, -4(%rbp) ; X64: movl $13, -12(%rbp) ; X64: movq %rbp, %rcx @@ -90,8 +90,8 @@ define void @alloc_func(i32 %n) { ; X86: pushl %ebp ; X86: movl %esp, %ebp ; X86: subl $12, %esp -; X86: Lalloc_func$frame_escape_0 = -4 -; X86: Lalloc_func$frame_escape_1 = -12 +; X86: .set Lalloc_func$frame_escape_0, -4 +; X86: .set Lalloc_func$frame_escape_1, -12 ; X86: movl $42, -4(%ebp) ; X86: movl $13, -12(%ebp) ; X86: pushl %ebp @@ -120,8 +120,8 @@ define void @alloc_func_no_frameaddr() { ; X64: subq $40, %rsp ; X64: .seh_stackalloc 40 ; X64: .seh_endprologue -; X64: .Lalloc_func_no_frameaddr$frame_escape_0 = 36 -; X64: .Lalloc_func_no_frameaddr$frame_escape_1 = 32 +; X64: .set .Lalloc_func_no_frameaddr$frame_escape_0, 36 +; X64: .set .Lalloc_func_no_frameaddr$frame_escape_1, 32 ; X64: movl $42, 36(%rsp) ; X64: movl $13, 32(%rsp) ; X64: xorl %ecx, %ecx @@ -131,8 +131,8 @@ define void @alloc_func_no_frameaddr() { ; X86-LABEL: alloc_func_no_frameaddr: ; X86: subl $8, %esp -; X86: Lalloc_func_no_frameaddr$frame_escape_0 = 4 -; X86: Lalloc_func_no_frameaddr$frame_escape_1 = 0 +; X86: .set Lalloc_func_no_frameaddr$frame_escape_0, 4 +; X86: .set Lalloc_func_no_frameaddr$frame_escape_1, 0 ; X86: movl $42, 4(%esp) ; X86: movl $13, (%esp) ; X86: pushl $0 diff --git a/llvm/test/CodeGen/X86/pr22019.ll b/llvm/test/CodeGen/X86/pr22019.ll index cfc53cb6be0..bd4718b266d 100644 --- a/llvm/test/CodeGen/X86/pr22019.ll +++ b/llvm/test/CodeGen/X86/pr22019.ll @@ -5,9 +5,9 @@ target triple = "x86_64-unknown-linux-gnu" module asm "pselect = __pselect" module asm "var = __var" module asm "alias = __alias" -; CHECK: pselect = __pselect -; CHECK: var = __var -; CHECK: alias = __alias +; CHECK: .set pselect, __pselect +; CHECK: .set var, __var +; CHECK: .set alias, __alias ; CHECK: pselect: ; CHECK: retq @@ -19,5 +19,5 @@ define void @pselect() { ; CHECK: .long 0 @var = global i32 0 -; CHECK: alias = var +; CHECK: .set alias, var @alias = alias i32, i32* @var diff --git a/llvm/test/CodeGen/X86/seh-catch-all-win32.ll b/llvm/test/CodeGen/X86/seh-catch-all-win32.ll index 5ecf37e5248..315790a2f16 100644 --- a/llvm/test/CodeGen/X86/seh-catch-all-win32.ll +++ b/llvm/test/CodeGen/X86/seh-catch-all-win32.ll @@ -60,7 +60,7 @@ entry: ; CHECK: pushl %edi ; CHECK: pushl %esi -; CHECK: Lmain$frame_escape_0 = [[code_offs:[-0-9]+]] +; CHECK: .set Lmain$frame_escape_0, [[code_offs:[-0-9]+]] ; CHECK: movl %esp, [[reg_offs:[-0-9]+]](%ebp) ; CHECK: movl $L__ehtable$main, ; EH state 0 @@ -80,7 +80,7 @@ entry: ; CHECK: calll _printf ; CHECK: .section .xdata,"dr" -; CHECK: Lmain$parent_frame_offset = [[reg_offs]] +; CHECK: .set Lmain$parent_frame_offset, [[reg_offs]] ; CHECK: .p2align 2 ; CHECK: L__ehtable$main ; CHECK-NEXT: .long -1 diff --git a/llvm/test/CodeGen/X86/seh-catchpad.ll b/llvm/test/CodeGen/X86/seh-catchpad.ll index b8f1753a0aa..7dc93531509 100644 --- a/llvm/test/CodeGen/X86/seh-catchpad.ll +++ b/llvm/test/CodeGen/X86/seh-catchpad.ll @@ -117,7 +117,7 @@ __except.ret: ; preds = %catch.dispatch.7 ; CHECK: jmp .LBB1_[[epilogue]] ; CHECK: .seh_handlerdata -; CHECK-NEXT: .Lmain$parent_frame_offset = 32 +; CHECK-NEXT: .set .Lmain$parent_frame_offset, 32 ; CHECK-NEXT: .long (.Llsda_end0-.Llsda_begin0)/16 ; CHECK-NEXT: .Llsda_begin0: ; CHECK-NEXT: .long .Ltmp0@IMGREL+1 diff --git a/llvm/test/CodeGen/X86/seh-finally.ll b/llvm/test/CodeGen/X86/seh-finally.ll index 2ef1c984851..ff6c25770b4 100644 --- a/llvm/test/CodeGen/X86/seh-finally.ll +++ b/llvm/test/CodeGen/X86/seh-finally.ll @@ -26,7 +26,7 @@ lpad: ; preds = %entry ; X64: retq ; X64: .seh_handlerdata -; X64-NEXT: .Lmain$parent_frame_offset = 32 +; X64-NEXT: .set .Lmain$parent_frame_offset, 32 ; X64-NEXT: .long (.Llsda_end0-.Llsda_begin0)/16 # Number of call sites ; X64-NEXT: .Llsda_begin0: ; X64-NEXT: .long .Ltmp0@IMGREL+1 # LabelStart diff --git a/llvm/test/CodeGen/X86/seh-no-invokes.ll b/llvm/test/CodeGen/X86/seh-no-invokes.ll index 52244aa996a..4e64aa23da8 100644 --- a/llvm/test/CodeGen/X86/seh-no-invokes.ll +++ b/llvm/test/CodeGen/X86/seh-no-invokes.ll @@ -15,7 +15,7 @@ ; label. This was PR30431. ; CHECK-LABEL: _f: # @f -; CHECK: Lf$parent_frame_offset = 0 +; CHECK: .set Lf$parent_frame_offset, 0 ; CHECK: retl ; CHECK-LABEL: "?filt$0@0@f@@": # @"\01?filt$0@0@f@@" diff --git a/llvm/test/CodeGen/X86/seh-stack-realign.ll b/llvm/test/CodeGen/X86/seh-stack-realign.ll index 1225faebdb8..75a005cc426 100644 --- a/llvm/test/CodeGen/X86/seh-stack-realign.ll +++ b/llvm/test/CodeGen/X86/seh-stack-realign.ll @@ -53,7 +53,7 @@ entry: ; Check that we can get the exception code from eax to the printf. ; CHECK-LABEL: _main: -; CHECK: Lmain$frame_escape_0 = [[code_offs:[-0-9]+]] +; CHECK: .set Lmain$frame_escape_0, [[code_offs:[-0-9]+]] ; CHECK: movl %esp, [[reg_offs:[-0-9]+]](%esi) ; CHECK: movl $L__ehtable$main, ; EH state 0 @@ -73,7 +73,7 @@ entry: ; CHECK: calll _printf ; CHECK: .section .xdata,"dr" -; CHECK: Lmain$parent_frame_offset = [[reg_offs]] +; CHECK: .set Lmain$parent_frame_offset, [[reg_offs]] ; CHECK: L__ehtable$main ; CHECK-NEXT: .long -1 ; CHECK-NEXT: .long _filt$main diff --git a/llvm/test/CodeGen/XCore/globals.ll b/llvm/test/CodeGen/XCore/globals.ll index 04e135c25ca..c7eba786b99 100644 --- a/llvm/test/CodeGen/XCore/globals.ll +++ b/llvm/test/CodeGen/XCore/globals.ll @@ -126,4 +126,4 @@ entry: @array = global [10 x i16] zeroinitializer, align 2 ; CHECK: .globl array.globound -; CHECK: array.globound = 10 +; CHECK: .set array.globound, 10 diff --git a/llvm/test/CodeGen/XCore/linkage.ll b/llvm/test/CodeGen/XCore/linkage.ll index ff07a261fc5..863ffd3c508 100644 --- a/llvm/test/CodeGen/XCore/linkage.ll +++ b/llvm/test/CodeGen/XCore/linkage.ll @@ -19,14 +19,14 @@ define protected void @test_protected() { } ; CHECK: .globl array.globound -; CHECK: array.globound = 2 +; CHECK: .set array.globound, 2 ; CHECK: .weak array.globound ; CHECK: .globl array ; CHECK: .weak array @array = weak global [2 x i32] zeroinitializer ; CHECK: .globl ac.globound -; CHECK: ac.globound = 2 +; CHECK: .set ac.globound, 2 ; CHECK: .weak ac.globound ; CHECK: .globl ac ; CHECK: .weak ac diff --git a/llvm/test/DebugInfo/X86/dbg-value-range.ll b/llvm/test/DebugInfo/X86/dbg-value-range.ll index 25ea64bb312..f41e9aa02e6 100644 --- a/llvm/test/DebugInfo/X86/dbg-value-range.ll +++ b/llvm/test/DebugInfo/X86/dbg-value-range.ll @@ -50,9 +50,9 @@ declare void @llvm.dbg.value(metadata, metadata, metadata) nounwind readnone ;CHECK-NEXT: [[CLOBBER:Ltmp[0-9]*]] ;CHECK:Ldebug_loc0: -;CHECK-NEXT: Lset{{.*}} = +;CHECK-NEXT: .set Lset{{.*}}, ;CHECK-NEXT: .quad -;CHECK-NEXT: [[CLOBBER_OFF:Lset.*]] = [[CLOBBER]]-{{.*}} +;CHECK-NEXT: .set [[CLOBBER_OFF:Lset.*]], [[CLOBBER]]-{{.*}} ;CHECK-NEXT: .quad [[CLOBBER_OFF]] ;CHECK-NEXT: .short 1 ## Loc expr size ;CHECK-NEXT: .byte 85 ## DW_OP_reg diff --git a/llvm/test/DebugInfo/X86/stmt-list-multiple-compile-units.ll b/llvm/test/DebugInfo/X86/stmt-list-multiple-compile-units.ll index 24a886eca72..afd393c5a69 100644 --- a/llvm/test/DebugInfo/X86/stmt-list-multiple-compile-units.ll +++ b/llvm/test/DebugInfo/X86/stmt-list-multiple-compile-units.ll @@ -64,11 +64,11 @@ ; PR15408 ; ASM: Lcu_begin0: ; ASM-NOT: Lcu_begin -; ASM: Lset[[LT:[0-9]+]] = Lline_table_start0-Lsection_line ## DW_AT_stmt_list +; ASM: .set Lset[[LT:[0-9]+]], Lline_table_start0-Lsection_line ## DW_AT_stmt_list ; ASM-NEXT: .long Lset[[LT]] ; ASM: Lcu_begin1: ; ASM-NOT: Lcu_begin -; ASM: Lset[[LT:[0-9]+]] = Lline_table_start0-Lsection_line ## DW_AT_stmt_list +; ASM: .set Lset[[LT:[0-9]+]], Lline_table_start0-Lsection_line ## DW_AT_stmt_list ; ASM-NEXT: .long Lset[[LT]] define i32 @test(i32 %a) nounwind uwtable ssp !dbg !5 { entry: diff --git a/llvm/test/MC/AsmParser/assignment.s b/llvm/test/MC/AsmParser/assignment.s index 73ce8600db0..6f84a1c338d 100644 --- a/llvm/test/MC/AsmParser/assignment.s +++ b/llvm/test/MC/AsmParser/assignment.s @@ -1,11 +1,22 @@ # RUN: llvm-mc -triple i386-unknown-unknown %s | FileCheck %s # CHECK: TEST0: -# CHECK: a = 0 +# CHECK: .set a, 0 TEST0: a = 0 +# CHECK: TEST1: +# CHECK: .set b, 0 +TEST1: + .set b, 0 + # CHECK: .globl _f1 -# CHECK: _f1 = 0 +# CHECK: .set _f1, 0 .globl _f1 _f1 = 0 + +# CHECK: .globl _f2 +# CHECK: .set _f2, 0 + .globl _f2 + .set _f2, 0 + diff --git a/llvm/test/MC/AsmParser/directive_include.s b/llvm/test/MC/AsmParser/directive_include.s index f53bc671fc6..8d2ef2753b2 100644 --- a/llvm/test/MC/AsmParser/directive_include.s +++ b/llvm/test/MC/AsmParser/directive_include.s @@ -2,7 +2,7 @@ # CHECK: TESTA: # CHECK: TEST0: -# CHECK: a = 0 +# CHECK: .set a, 0 # CHECK: TESTB: TESTA: .include "directive\137set.s" # "\137" is underscore "_" diff --git a/llvm/test/MC/AsmParser/directive_set.s b/llvm/test/MC/AsmParser/directive_set.s index 8d4180a364b..65dd33d1d54 100644 --- a/llvm/test/MC/AsmParser/directive_set.s +++ b/llvm/test/MC/AsmParser/directive_set.s @@ -1,13 +1,13 @@ # RUN: llvm-mc -triple i386-unknown-elf %s | FileCheck %s # CHECK: TEST0: -# CHECK: a = 0 +# CHECK: .set a, 0 # CHECK-NOT: .no_dead_strip a TEST0: .set a, 0 # CHECK: TEST1: -# CHECK: a = 0 +# CHECK: .set a, 0 # CHECK-NOT: .no_dead_strip a TEST1: .equ a, 0 diff --git a/llvm/test/MC/AsmParser/include.ll b/llvm/test/MC/AsmParser/include.ll index a2fd9282397..28561819a60 100644 --- a/llvm/test/MC/AsmParser/include.ll +++ b/llvm/test/MC/AsmParser/include.ll @@ -9,5 +9,5 @@ entry: ret void } -; CHECK: MODULE = 1 -; CHECK: FUNCTION = 1 +; CHECK: .set MODULE, 1 +; CHECK: .set FUNCTION, 1 diff --git a/llvm/test/MC/AsmParser/labels.s b/llvm/test/MC/AsmParser/labels.s index 6a9870b655f..599ce72c44e 100644 --- a/llvm/test/MC/AsmParser/labels.s +++ b/llvm/test/MC/AsmParser/labels.s @@ -18,12 +18,12 @@ foo: // CHECK: addl $24, a$b+10(%eax) addl $24, ("a$b" + 10)(%eax) -// CHECK: b$c = 10 +// CHECK: .set b$c, 10 "b$c" = 10 // CHECK: addl $10, %eax addl $"b$c", %eax -// CHECK: "a 0" = 11 +// CHECK: .set "a 0", 11 .set "a 0", 11 // CHECK: .long 11 @@ -49,7 +49,7 @@ foo: // CHECX: .lsym "a 8",1 // .lsym "a 8", 1 -// CHECK: "a 9" = a-b +// CHECK: .set "a 9", a-b .set "a 9", a - b // CHECK: .long "a 9" diff --git a/llvm/test/MC/AsmParser/macro-args.s b/llvm/test/MC/AsmParser/macro-args.s index 3269369be02..8671107539c 100644 --- a/llvm/test/MC/AsmParser/macro-args.s +++ b/llvm/test/MC/AsmParser/macro-args.s @@ -49,7 +49,7 @@ top bar, 42 // CHECK: _foo: // CHECK-NOT: fred // CHECK: _bar -// CHECK-NEXT: fred = 42 +// CHECK-NEXT: .set fred, 42 .macro foo diff --git a/llvm/test/MC/Mips/cpsetup.s b/llvm/test/MC/Mips/cpsetup.s index 5c574225c1b..907e4fe6a88 100644 --- a/llvm/test/MC/Mips/cpsetup.s +++ b/llvm/test/MC/Mips/cpsetup.s @@ -172,7 +172,7 @@ IMM_8 = 8 nop # ALL-LABEL: t1b: -# ASM-NEXT: IMM_8 = 8 +# ASM-NEXT: .set IMM_8, 8 # O32-NOT: __cerror |
