diff options
Diffstat (limited to 'llvm/test')
| -rw-r--r-- | llvm/test/CodeGen/X86/avx-load-store.ll | 1 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/vec_extract-avx.ll | 20 | ||||
| -rw-r--r-- | llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll | 1 |
3 files changed, 9 insertions, 13 deletions
diff --git a/llvm/test/CodeGen/X86/avx-load-store.ll b/llvm/test/CodeGen/X86/avx-load-store.ll index 7bd39f4d1d3..402e2705191 100644 --- a/llvm/test/CodeGen/X86/avx-load-store.ll +++ b/llvm/test/CodeGen/X86/avx-load-store.ll @@ -240,6 +240,7 @@ define void @f_f() nounwind { ; CHECK_O0-NEXT: .LBB9_3: # %cif_mixed_test_all ; CHECK_O0-NEXT: movl $-1, %eax ; CHECK_O0-NEXT: vmovd %eax, %xmm0 +; CHECK_O0-NEXT: vmovdqa %xmm0, %xmm0 ; CHECK_O0-NEXT: vmovaps %xmm0, %xmm1 ; CHECK_O0-NEXT: # implicit-def: $rcx ; CHECK_O0-NEXT: # implicit-def: $ymm2 diff --git a/llvm/test/CodeGen/X86/vec_extract-avx.ll b/llvm/test/CodeGen/X86/vec_extract-avx.ll index 5b3fcb1e023..af66ba6cd6d 100644 --- a/llvm/test/CodeGen/X86/vec_extract-avx.ll +++ b/llvm/test/CodeGen/X86/vec_extract-avx.ll @@ -144,17 +144,15 @@ define void @legal_vzmovl_2i64_4i64(<2 x i64>* %in, <4 x i64>* %out) { ; X32: # %bb.0: ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: vmovdqu (%ecx), %xmm0 -; X32-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero -; X32-NEXT: vmovdqa %ymm0, (%eax) +; X32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero +; X32-NEXT: vmovaps %ymm0, (%eax) ; X32-NEXT: vzeroupper ; X32-NEXT: retl ; ; X64-LABEL: legal_vzmovl_2i64_4i64: ; X64: # %bb.0: -; X64-NEXT: vmovdqu (%rdi), %xmm0 -; X64-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero -; X64-NEXT: vmovdqa %ymm0, (%rsi) +; X64-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero +; X64-NEXT: vmovaps %ymm0, (%rsi) ; X64-NEXT: vzeroupper ; X64-NEXT: retq %ld = load <2 x i64>, <2 x i64>* %in, align 8 @@ -196,17 +194,15 @@ define void @legal_vzmovl_2f64_4f64(<2 x double>* %in, <4 x double>* %out) { ; X32: # %bb.0: ; X32-NEXT: movl {{[0-9]+}}(%esp), %eax ; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx -; X32-NEXT: vmovdqu (%ecx), %xmm0 -; X32-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero -; X32-NEXT: vmovdqa %ymm0, (%eax) +; X32-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero +; X32-NEXT: vmovaps %ymm0, (%eax) ; X32-NEXT: vzeroupper ; X32-NEXT: retl ; ; X64-LABEL: legal_vzmovl_2f64_4f64: ; X64: # %bb.0: -; X64-NEXT: vmovdqu (%rdi), %xmm0 -; X64-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero -; X64-NEXT: vmovdqa %ymm0, (%rsi) +; X64-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero +; X64-NEXT: vmovaps %ymm0, (%rsi) ; X64-NEXT: vzeroupper ; X64-NEXT: retq %ld = load <2 x double>, <2 x double>* %in, align 8 diff --git a/llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll b/llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll index 33513fef481..3717d05e9e5 100644 --- a/llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll +++ b/llvm/test/CodeGen/X86/vector-shuffle-256-v4.ll @@ -1514,7 +1514,6 @@ define <4 x i64> @insert_mem_and_zero_v4i64(i64* %ptr) { define <4 x double> @insert_reg_and_zero_v4f64(double %a) { ; ALL-LABEL: insert_reg_and_zero_v4f64: ; ALL: # %bb.0: -; ALL-NEXT: # kill: def $xmm0 killed $xmm0 def $ymm0 ; ALL-NEXT: vmovq {{.*#+}} xmm0 = xmm0[0],zero ; ALL-NEXT: retq %v = insertelement <4 x double> undef, double %a, i32 0 |
