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-rw-r--r--llvm/test/CodeGen/SystemZ/int-cmp-51.ll34
-rw-r--r--llvm/test/CodeGen/SystemZ/memchr-01.ll2
2 files changed, 35 insertions, 1 deletions
diff --git a/llvm/test/CodeGen/SystemZ/int-cmp-51.ll b/llvm/test/CodeGen/SystemZ/int-cmp-51.ll
new file mode 100644
index 00000000000..85a0e4b4d3a
--- /dev/null
+++ b/llvm/test/CodeGen/SystemZ/int-cmp-51.ll
@@ -0,0 +1,34 @@
+; Check that modelling of CC/CCRegs does not stop MachineCSE from
+; removing a compare. MachineCSE will not extend a live range of an
+; allocatable or reserved phys reg.
+;
+; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+
+declare void @bar(i8)
+
+; Check the low end of the CH range.
+define void @f1(i32 %lhs) {
+; CHECK-LABEL: BB#1:
+; CHECK-NOT: cijlh %r0, 1, .LBB0_3
+
+entry:
+ %and188 = and i32 %lhs, 255
+ %cmp189 = icmp ult i32 %and188, 2
+ br i1 %cmp189, label %if.then.191, label %if.else.201
+
+if.then.191:
+ %cmp194 = icmp eq i32 %and188, 1
+ br i1 %cmp194, label %if.then.196, label %if.else.198
+
+if.then.196:
+ call void @bar(i8 1);
+ br label %if.else.201
+
+if.else.198:
+ call void @bar(i8 0);
+ br label %if.else.201
+
+if.else.201:
+ ret void
+}
+
diff --git a/llvm/test/CodeGen/SystemZ/memchr-01.ll b/llvm/test/CodeGen/SystemZ/memchr-01.ll
index c51690b9848..f7509c4f256 100644
--- a/llvm/test/CodeGen/SystemZ/memchr-01.ll
+++ b/llvm/test/CodeGen/SystemZ/memchr-01.ll
@@ -1,6 +1,6 @@
; Test memchr using SRST, with a weird but usable prototype.
;
-; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
+; RUN: llc < %s -mtriple=s390x-linux-gnu -verify-machineinstrs | FileCheck %s
declare i8 *@memchr(i8 *%src, i16 %char, i32 %len)
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