5 files changed, 124 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/SPARC/LeonFixCALLPassUT.ll b/llvm/test/CodeGen/SPARC/LeonFixCALLPassUT.ll
new file mode 100644
index 00000000000..697590be406
--- /dev/null
+++ b/llvm/test/CodeGen/SPARC/LeonFixCALLPassUT.ll
@@ -0,0 +1,20 @@
+; RUN: llc %s -O0 -march=sparc -mcpu=at697e -o - | FileCheck %s -check-prefix=FIXCALL
+; RUN: llc %s -O0 -march=sparc -mcpu=leon2 -mattr=+fixcall -o - | FileCheck %s -check-prefix=FIXCALL
+
+; RUN: llc %s -O0 -march=sparc -mcpu=at697e -mattr=-fixcall -o - | FileCheck %s -check-prefix=NO_FIXCALL
+; RUN: llc %s -O0 -march=sparc -mcpu=leon2  -o - | FileCheck %s -check-prefix=NO_FIXCALL
+
+
+; FIXCALL-LABEL:       	immediate_call_test
+; FIXCALL:       	call 763288
+
+; NO_FIXCALL-LABEL:     immediate_call_test
+; NO_FIXCALL:       	call 2047583640
+define void @immediate_call_test() nounwind {
+entry:
+        call void asm sideeffect "call $0", "i"(i32 2047583640) nounwind
+        ret void
+}
+
+
+
diff --git a/llvm/test/CodeGen/SPARC/LeonInsertNOPLoad.ll b/llvm/test/CodeGen/SPARC/LeonInsertNOPLoad.ll
new file mode 100644
index 00000000000..315fc85fca3
--- /dev/null
+++ b/llvm/test/CodeGen/SPARC/LeonInsertNOPLoad.ll
@@ -0,0 +1,13 @@
+; RUN: llc %s -O0 -march=sparc -mcpu=ut699 -o - | FileCheck %s
+
+; CHECK:        ld [%o0+%lo(.LCPI0_0)], %f0
+; CHECK-NEXT:   nop
+
+
+define float @X() #0 {
+entry:
+  %f = alloca float, align 4
+  store float 0x3FF3C08320000000, float* %f, align 4
+  %0 = load float, float* %f, align 4
+  ret float %0
+}
diff --git a/llvm/test/CodeGen/SPARC/LeonInsertNOPsDoublePrecision.ll b/llvm/test/CodeGen/SPARC/LeonInsertNOPsDoublePrecision.ll
new file mode 100644
index 00000000000..0ee3d9071a9
--- /dev/null
+++ b/llvm/test/CodeGen/SPARC/LeonInsertNOPsDoublePrecision.ll
@@ -0,0 +1,17 @@
+; RUN: llc %s -O0 -march=sparc -mcpu=at697f -o - | FileCheck %s
+
+; CHECK:        ldd
+; CHECK:        ldd
+; CHECK-NEXT:   nop
+
+define double @mult() #0 {
+entry:
+  %x = alloca double, align 8
+  %y = alloca double, align 8
+  store double 3.141590e+00, double* %x, align 8
+  store double 1.234560e+00, double* %y, align 8
+  %0 = load double, double* %x, align 8
+  %1 = load double, double* %y, align 8
+  %mul = fmul double %0, %1
+  ret double %mul
+}
diff --git a/llvm/test/CodeGen/SPARC/LeonPreventRoundChangePassUT.ll b/llvm/test/CodeGen/SPARC/LeonPreventRoundChangePassUT.ll
new file mode 100644
index 00000000000..07172fdb945
--- /dev/null
+++ b/llvm/test/CodeGen/SPARC/LeonPreventRoundChangePassUT.ll
@@ -0,0 +1,65 @@
+; RUN: llc %s -O0 -march=sparc -mcpu=ut699 -o - | FileCheck %s -check-prefix=NO_ROUND_FUNC
+; RUN: llc %s -O0 -march=sparc -mcpu=leon3 -mattr=+prvntroundchange -o - | FileCheck %s -check-prefix=NO_ROUND_FUNC
+
+; RUN: llc %s -O0 -march=sparc -mcpu=ut699 -mattr=-prvntroundchange -o - | FileCheck %s -check-prefix=ROUND_FUNC
+; RUN: llc %s -O0 -march=sparc -mcpu=leon3  -o - | FileCheck %s -check-prefix=ROUND_FUNC
+
+
+; NO_ROUND_FUNC-LABEL: test_round_change
+; NO_ROUND_FUNC-NOT: fesetround
+
+; ROUND_FUNC-LABEL: test_round_change
+; ROUND_FUNC: fesetround
+
+; ModuleID = '<stdin>'
+target datalayout = "E-m:e-p:32:32-i64:64-f128:64-n32-S64"
+target triple = "sparc-unknown--eabi"
+
+@.str = private unnamed_addr constant [17 x i8] c"-((-a)*b) != a*b\00", align 1
+@.str.1 = private unnamed_addr constant [7 x i8] c"test.c\00", align 1
+@__PRETTY_FUNCTION__.mult = private unnamed_addr constant [12 x i8] c"void mult()\00", align 1
+
+; Function Attrs: nounwind
+define void @test_round_change() #0 {
+entry:
+  %a = alloca double, align 8
+  %b = alloca double, align 8
+  %x = alloca float, align 4
+  store double 1.100000e+00, double* %a, align 8
+  store double 1.010000e+01, double* %b, align 8
+  store float 0x400921FA00000000, float* %x, align 4
+  %call = call i32 @fesetround(i32 2048) #2
+  %0 = load double, double* %a, align 8
+  %sub = fsub double -0.000000e+00, %0
+  %1 = load double, double* %b, align 8
+  %mul = fmul double %sub, %1
+  %sub1 = fsub double -0.000000e+00, %mul
+  %2 = load double, double* %a, align 8
+  %3 = load double, double* %b, align 8
+  %mul2 = fmul double %2, %3
+  %cmp = fcmp une double %sub1, %mul2
+  br i1 %cmp, label %cond.true, label %cond.false
+
+cond.true:                                        ; preds = %entry
+  br label %cond.end
+
+cond.false:                                       ; preds = %entry
+  call void @__assert_fail(i8* getelementptr inbounds ([17 x i8], [17 x i8]* @.str, i32 0, i32 0), i8* getelementptr inbounds ([7 x i8], [7 x i8]* @.str.1, i32 0, i32 0), i32 10, i8* getelementptr inbounds ([12 x i8], [12 x i8]* @__PRETTY_FUNCTION__.mult, i32 0, i32 0)) #3
+  unreachable
+                                                  ; No predecessors!
+  br label %cond.end
+
+cond.end:                                         ; preds = %4, %cond.true
+  ret void
+}
+
+; Function Attrs: nounwind
+declare i32 @fesetround(i32) #0
+
+; Function Attrs: noreturn nounwind
+declare void @__assert_fail(i8*, i8*, i32, i8*) #1
+
+attributes #0 = { nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #1 = { noreturn nounwind "disable-tail-calls"="false" "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
+attributes #2 = { nounwind }
+attributes #3 = { noreturn nounwind }
+\ No newline at end of file
diff --git a/llvm/test/CodeGen/SPARC/LeonReplaceSDIVPassUT.ll b/llvm/test/CodeGen/SPARC/LeonReplaceSDIVPassUT.ll
new file mode 100644
index 00000000000..67232d77703
--- /dev/null
+++ b/llvm/test/CodeGen/SPARC/LeonReplaceSDIVPassUT.ll
@@ -0,0 +1,9 @@
+; RUN: llc %s -O0 -march=sparc -mcpu=at697e -o - | FileCheck %s
+
+; CHECK: sdivcc %o0, %o1, %o0
+
+define i32 @lbr59(i32 %a, i32 %b)
+{
+  %r = sdiv i32 %a, %b
+  ret i32 %r 
+}