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-rw-r--r--llvm/test/Transforms/InstCombine/shift.ll13
1 files changed, 13 insertions, 0 deletions
diff --git a/llvm/test/Transforms/InstCombine/shift.ll b/llvm/test/Transforms/InstCombine/shift.ll
index 175c628f11f..e4dd377952a 100644
--- a/llvm/test/Transforms/InstCombine/shift.ll
+++ b/llvm/test/Transforms/InstCombine/shift.ll
@@ -700,6 +700,19 @@ define i32 @test42(i32 %a, i32 %b) nounwind {
ret i32 %div2
}
+; FIXME: Vector lshr should be treated the same as scalar.
+
+define <2 x i32> @test42vec(<2 x i32> %a, <2 x i32> %b) {
+; CHECK-LABEL: @test42vec(
+; CHECK-NEXT: [[DIV:%.*]] = lshr <2 x i32> <i32 4096, i32 4096>, %b
+; CHECK-NEXT: [[DIV2:%.*]] = udiv <2 x i32> %a, [[DIV]]
+; CHECK-NEXT: ret <2 x i32> [[DIV2]]
+;
+ %div = lshr <2 x i32> <i32 4096, i32 4096>, %b ; must be exact otherwise we'd divide by zero
+ %div2 = udiv <2 x i32> %a, %div
+ ret <2 x i32> %div2
+}
+
define i32 @test43(i32 %a, i32 %b) nounwind {
; CHECK-LABEL: @test43(
; CHECK-NEXT: [[TMP1:%.*]] = add i32 %b, 12
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