diff options
Diffstat (limited to 'llvm/test')
-rw-r--r-- | llvm/test/MC/ARM/mve-minmax.s | 15 | ||||
-rw-r--r-- | llvm/test/MC/ARM/mve-reductions.s | 28 | ||||
-rw-r--r-- | llvm/test/MC/ARM/mve-vpt.s | 57 | ||||
-rw-r--r-- | llvm/test/MC/Disassembler/ARM/mve-minmax.txt | 11 | ||||
-rw-r--r-- | llvm/test/MC/Disassembler/ARM/mve-reductions.txt | 27 | ||||
-rw-r--r-- | llvm/test/MC/Disassembler/ARM/mve-vpt.txt | 13 |
6 files changed, 151 insertions, 0 deletions
diff --git a/llvm/test/MC/ARM/mve-minmax.s b/llvm/test/MC/ARM/mve-minmax.s new file mode 100644 index 00000000000..4de21043428 --- /dev/null +++ b/llvm/test/MC/ARM/mve-minmax.s @@ -0,0 +1,15 @@ +# RUN: not llvm-mc -triple=thumbv8.1m.main-none-eabi -mattr=+mve -show-encoding < %s 2> %t \ +# RUN: | FileCheck --check-prefix=CHECK-NOFP %s +# RUN: FileCheck --check-prefix=ERROR-NOFP %s < %t +# RUN: llvm-mc -triple=thumbv8.1m.main-none-eabi -mattr=+mve.fp,+fp64 -show-encoding < %s \ +# RUN: | FileCheck --check-prefix=CHECK %s + +# CHECK: vmaxnm.f32 q0, q1, q4 @ encoding: [0x02,0xff,0x58,0x0f] +# CHECK-NOFP-NOT: vmaxnm.f32 q0, q1, q4 @ encoding: [0x02,0xff,0x58,0x0f] +# ERROR-NOFP: [[@LINE+1]]:{{[0-9]+}}: error: instruction requires: mve.fp +vmaxnm.f32 q0, q1, q4 + +# CHECK: vminnm.f16 q3, q0, q1 @ encoding: [0x30,0xff,0x52,0x6f] +# CHECK-NOFP-NOT: vminnm.f16 q3, q0, q1 @ encoding: [0x30,0xff,0x52,0x6f] +# ERROR-NOFP: [[@LINE+1]]:{{[0-9]+}}: error: instruction requires: mve.fp +vminnm.f16 q3, q0, q1 diff --git a/llvm/test/MC/ARM/mve-reductions.s b/llvm/test/MC/ARM/mve-reductions.s new file mode 100644 index 00000000000..bf1d6d1019c --- /dev/null +++ b/llvm/test/MC/ARM/mve-reductions.s @@ -0,0 +1,28 @@ +# RUN: llvm-mc -triple=thumbv8.1m.main-none-eabi -mattr=+mve -show-encoding < %s \ +# RUN: | FileCheck --check-prefix=CHECK-NOFP %s +# RUN: llvm-mc -triple=thumbv8.1m.main-none-eabi -mattr=+mve.fp,+fp64 -show-encoding < %s \ +# RUN: | FileCheck --check-prefix=CHECK %s + +# CHECK: vabav.s8 r0, q1, q3 @ encoding: [0x82,0xee,0x07,0x0f] +# CHECK-NOFP: vabav.s8 r0, q1, q3 @ encoding: [0x82,0xee,0x07,0x0f] +vabav.s8 r0, q1, q3 + +# CHECK: vabav.s16 r0, q1, q3 @ encoding: [0x92,0xee,0x07,0x0f] +# CHECK-NOFP: vabav.s16 r0, q1, q3 @ encoding: [0x92,0xee,0x07,0x0f] +vabav.s16 r0, q1, q3 + +# CHECK: vabav.s32 r0, q1, q3 @ encoding: [0xa2,0xee,0x07,0x0f] +# CHECK-NOFP: vabav.s32 r0, q1, q3 @ encoding: [0xa2,0xee,0x07,0x0f] +vabav.s32 r0, q1, q3 + +# CHECK: vabav.u8 r0, q1, q3 @ encoding: [0x82,0xfe,0x07,0x0f] +# CHECK-NOFP: vabav.u8 r0, q1, q3 @ encoding: [0x82,0xfe,0x07,0x0f] +vabav.u8 r0, q1, q3 + +# CHECK: vabav.u16 r0, q1, q3 @ encoding: [0x92,0xfe,0x07,0x0f] +# CHECK-NOFP: vabav.u16 r0, q1, q3 @ encoding: [0x92,0xfe,0x07,0x0f] +vabav.u16 r0, q1, q3 + +# CHECK: vabav.u32 r0, q1, q3 @ encoding: [0xa2,0xfe,0x07,0x0f] +# CHECK-NOFP: vabav.u32 r0, q1, q3 @ encoding: [0xa2,0xfe,0x07,0x0f] +vabav.u32 r0, q1, q3 diff --git a/llvm/test/MC/ARM/mve-vpt.s b/llvm/test/MC/ARM/mve-vpt.s new file mode 100644 index 00000000000..d93e29ddbf3 --- /dev/null +++ b/llvm/test/MC/ARM/mve-vpt.s @@ -0,0 +1,57 @@ +# RUN: not llvm-mc -triple=thumbv8.1m.main-none-eabi -mattr=+mve -show-encoding < %s \ +# RUN: | FileCheck --check-prefix=CHECK-NOFP %s +# RUN: not llvm-mc -triple=thumbv8.1m.main-none-eabi -mattr=+mve.fp,+fp64 -show-encoding < %s 2>%t \ +# RUN: | FileCheck --check-prefix=CHECK %s +# RUN: FileCheck --check-prefix=ERROR < %t %s + +# ERROR: [[@LINE+1]]:{{[0-9]+}}: {{error|note}}: VPT predicated instructions must be in VPT block +vabavt.s32 lr, q1, q3 + +# ERROR: [[@LINE+1]]:{{[0-9]+}}: {{error|note}}: VPT predicated instructions must be in VPT block +vabave.u8 r12, q1, q3 + +# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: instructions in IT block must be predicable +it eq +vabav.s16 lr, q1, q3 + +# CHECK: vpteee.i8 eq, q0, q1 @ encoding: [0x41,0xfe,0x02,0x2f] +# CHECK-NOFP: vpteee.i8 eq, q0, q1 @ encoding: [0x41,0xfe,0x02,0x2f] +vpteee.i8 eq, q0, q1 +vabavt.s32 lr, q1, q3 +vabave.s32 lr, q1, q3 +vabave.s32 lr, q1, q3 +vabave.s32 lr, q1, q3 + +# CHECK: vptttt.s32 gt, q0, q1 @ encoding: [0x21,0xfe,0x03,0x3f] +# CHECK-NOFP: vptttt.s32 gt, q0, q1 @ encoding: [0x21,0xfe,0x03,0x3f] +vptttt.s32 gt, q0, q1 +vabavt.u32 lr, q1, q3 +vabavt.s32 lr, q1, q3 +vabavt.s16 lr, q1, q3 +vabavt.s8 lr, q1, q3 + +# ERROR: [[@LINE+2]]:{{[0-9]+}}: {{error|note}}: instruction in VPT block must be predicable +vpt.s8 le, q0, q1 +cinc lr, r2, lo + +# ---------------------------------------------------------------------- +# The following tests have to go last because of the NOFP-NOT checks inside the +# VPT block. + +# CHECK: vptete.f16 ne, q0, q1 @ encoding: [0x71,0xfe,0x82,0xef] +# CHECK-NOFP-NOT: vptete.f16 ne, q0, q1 @ encoding: [0x71,0xfe,0x82,0xef] +vptete.f16 ne, q0, q1 +vabavt.s32 lr, q1, q3 +vabave.u32 lr, q1, q3 +vabavt.s32 lr, q1, q3 +vabave.s16 lr, q1, q3 +# ERROR: [[@LINE+1]]:{{[0-9]+}}: {{error|note}}: VPT predicated instructions must be in VPT block +vabavt.s32 lr, q1, q3 + +# CHECK: vpte.i8 eq, q0, q0 +# CHECK: vmaxnmt.f16 q1, q6, q2 @ encoding: [0x1c,0xff,0x54,0x2f] +# CHECK-NOFP-NOT: vmaxnmt.f16 q1, q6, q2 @ encoding: [0x1c,0xff,0x54,0x2f] +# CHECK-NOFP-NOT: vmaxnme.f16 q1, q6, q2 @ encoding: [0x1c,0xff,0x54,0x2f] +vpte.i8 eq, q0, q0 +vmaxnmt.f16 q1, q6, q2 +vmaxnme.f16 q1, q6, q2 diff --git a/llvm/test/MC/Disassembler/ARM/mve-minmax.txt b/llvm/test/MC/Disassembler/ARM/mve-minmax.txt new file mode 100644 index 00000000000..24287573b6c --- /dev/null +++ b/llvm/test/MC/Disassembler/ARM/mve-minmax.txt @@ -0,0 +1,11 @@ +# RUN: llvm-mc -disassemble -triple=thumbv8.1m.main-none-eabi -mattr=+mve.fp,+fp64 -show-encoding %s | FileCheck %s +# RUN: not llvm-mc -disassemble -triple=thumbv8.1m.main-none-eabi -show-encoding %s &> %t +# RUN: FileCheck --check-prefix=CHECK-NOMVE < %t %s + +# CHECK: vmaxnm.f32 q0, q1, q4 @ encoding: [0x02,0xff,0x58,0x0f] +# CHECK-NOMVE: [[@LINE+1]]:2: warning: invalid instruction encoding +[0x02,0xff,0x58,0x0f] + +# CHECK: vminnm.f16 q3, q0, q1 @ encoding: [0x30,0xff,0x52,0x6f] +# CHECK-NOMVE: [[@LINE+1]]:2: warning: invalid instruction encoding +[0x30,0xff,0x52,0x6f] diff --git a/llvm/test/MC/Disassembler/ARM/mve-reductions.txt b/llvm/test/MC/Disassembler/ARM/mve-reductions.txt new file mode 100644 index 00000000000..3a58ef196fa --- /dev/null +++ b/llvm/test/MC/Disassembler/ARM/mve-reductions.txt @@ -0,0 +1,27 @@ +# RUN: llvm-mc -disassemble -triple=thumbv8.1m.main-none-eabi -mattr=+mve.fp,+fp64 -show-encoding %s | FileCheck %s +# RUN: not llvm-mc -disassemble -triple=thumbv8.1m.main-none-eabi -show-encoding %s &> %t +# RUN: FileCheck --check-prefix=CHECK-NOMVE < %t %s + +[0x82 0xee 0x07 0x0f] +# CHECK: vabav.s8 r0, q1, q3 +# CHECK-NOMVE: [[@LINE-2]]:2: warning: invalid instruction encoding + +[0x92 0xee 0x07 0x0f] +# CHECK: vabav.s16 r0, q1, q3 +# CHECK-NOMVE: [[@LINE-2]]:2: warning: invalid instruction encoding + +[0xa2 0xee 0x07 0x0f] +# CHECK: vabav.s32 r0, q1, q3 +# CHECK-NOMVE: [[@LINE-2]]:2: warning: invalid instruction encoding + +[0x82 0xfe 0x07 0x0f] +# CHECK: vabav.u8 r0, q1, q3 +# CHECK-NOMVE: [[@LINE-2]]:2: warning: invalid instruction encoding + +[0x92 0xfe 0x07 0x0f] +# CHECK: vabav.u16 r0, q1, q3 +# CHECK-NOMVE: [[@LINE-2]]:2: warning: invalid instruction encoding + +[0xa2 0xfe 0x07 0x0f] +# CHECK: vabav.u32 r0, q1, q3 +# CHECK-NOMVE: [[@LINE-2]]:2: warning: invalid instruction encoding diff --git a/llvm/test/MC/Disassembler/ARM/mve-vpt.txt b/llvm/test/MC/Disassembler/ARM/mve-vpt.txt new file mode 100644 index 00000000000..6b8515e0033 --- /dev/null +++ b/llvm/test/MC/Disassembler/ARM/mve-vpt.txt @@ -0,0 +1,13 @@ +# RUN: llvm-mc -disassemble -triple=thumbv8.1m.main-none-eabi -mattr=+mve.fp,+fp64 -show-encoding %s | FileCheck %s +# RUN: not llvm-mc -disassemble -triple=thumbv8.1m.main-none-eabi -show-encoding %s &> %t +# RUN: FileCheck --check-prefix=CHECK-NOMVE < %t %s + +# CHECK: vpte.i8 eq, q0, q0 @ encoding: [0x41,0xfe,0x00,0x8f] +# CHECK-NOMVE: [[@LINE+5]]:2: warning: invalid instruction encoding +# CHECK: vabavt.s16 lr, q3, q4 @ encoding: [0x96,0xee,0x09,0xef] +# CHECK-NOMVE: [[@LINE+4]]:2: warning: invalid instruction encoding +# CHECK: vabave.s16 lr, q3, q4 @ encoding: [0x96,0xee,0x09,0xef] +# CHECK-NOMVE: [[@LINE+3]]:2: warning: invalid instruction encoding +[0x41,0xfe,0x00,0x8f] +[0x96,0xee,0x09,0xef] +[0x96,0xee,0x09,0xef] |