summaryrefslogtreecommitdiffstats
path: root/llvm/test
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/test')
-rw-r--r--llvm/test/CodeGen/AArch64/arm64-anyregcc.ll10
-rw-r--r--llvm/test/CodeGen/AArch64/arm64-stackmap.ll13
-rw-r--r--llvm/test/CodeGen/AArch64/stackmap-liveness.ll3
-rw-r--r--llvm/test/CodeGen/PowerPC/ppc64-anyregcc.ll10
-rw-r--r--llvm/test/CodeGen/PowerPC/ppc64-stackmap.ll13
-rw-r--r--llvm/test/CodeGen/X86/anyregcc.ll10
-rw-r--r--llvm/test/CodeGen/X86/patchpoint-invoke.ll2
-rw-r--r--llvm/test/CodeGen/X86/stackmap-fast-isel.ll6
-rw-r--r--llvm/test/CodeGen/X86/stackmap-large-constants.ll4
-rw-r--r--llvm/test/CodeGen/X86/stackmap-liveness.ll4
-rw-r--r--llvm/test/CodeGen/X86/stackmap.ll18
-rw-r--r--llvm/test/CodeGen/X86/statepoint-allocas.ll5
-rw-r--r--llvm/test/CodeGen/X86/statepoint-stackmap-format.ll6
-rw-r--r--llvm/test/Object/Inputs/stackmap-test.macho-x86-64bin568 -> 3956 bytes
-rw-r--r--llvm/test/Object/stackmap-dump.test182
15 files changed, 258 insertions, 28 deletions
diff --git a/llvm/test/CodeGen/AArch64/arm64-anyregcc.ll b/llvm/test/CodeGen/AArch64/arm64-anyregcc.ll
index 2a2f4519604..1af31038324 100644
--- a/llvm/test/CodeGen/AArch64/arm64-anyregcc.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-anyregcc.ll
@@ -4,7 +4,7 @@
; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps
; CHECK-NEXT: __LLVM_StackMaps:
; Header
-; CHECK-NEXT: .byte 1
+; CHECK-NEXT: .byte 2
; CHECK-NEXT: .byte 0
; CHECK-NEXT: .short 0
; Num Functions
@@ -17,20 +17,28 @@
; Functions and stack size
; CHECK-NEXT: .quad _test
; CHECK-NEXT: .quad 16
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _property_access1
; CHECK-NEXT: .quad 16
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _property_access2
; CHECK-NEXT: .quad 32
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _property_access3
; CHECK-NEXT: .quad 32
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _anyreg_test1
; CHECK-NEXT: .quad 16
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _anyreg_test2
; CHECK-NEXT: .quad 16
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _patchpoint_spilldef
; CHECK-NEXT: .quad 112
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _patchpoint_spillargs
; CHECK-NEXT: .quad 128
+; CHECK-NEXT: .quad 1
; test
diff --git a/llvm/test/CodeGen/AArch64/arm64-stackmap.ll b/llvm/test/CodeGen/AArch64/arm64-stackmap.ll
index 3eb1d275300..0b2e9776263 100644
--- a/llvm/test/CodeGen/AArch64/arm64-stackmap.ll
+++ b/llvm/test/CodeGen/AArch64/arm64-stackmap.ll
@@ -10,7 +10,7 @@ target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps
; CHECK-NEXT: __LLVM_StackMaps:
; Header
-; CHECK-NEXT: .byte 1
+; CHECK-NEXT: .byte 2
; CHECK-NEXT: .byte 0
; CHECK-NEXT: .short 0
; Num Functions
@@ -23,26 +23,37 @@ target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
; Functions and stack size
; CHECK-NEXT: .quad _constantargs
; CHECK-NEXT: .quad 16
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _osrinline
; CHECK-NEXT: .quad 32
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _osrcold
; CHECK-NEXT: .quad 16
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _propertyRead
; CHECK-NEXT: .quad 16
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _propertyWrite
; CHECK-NEXT: .quad 16
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _jsVoidCall
; CHECK-NEXT: .quad 16
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _jsIntCall
; CHECK-NEXT: .quad 16
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _spilledValue
; CHECK-NEXT: .quad 160
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _spilledStackMapValue
; CHECK-NEXT: .quad 128
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _liveConstant
; CHECK-NEXT: .quad 16
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _clobberLR
; CHECK-NEXT: .quad 112
+; CHECK-NEXT: .quad 1
; Num LargeConstants
; CHECK-NEXT: .quad 4294967295
diff --git a/llvm/test/CodeGen/AArch64/stackmap-liveness.ll b/llvm/test/CodeGen/AArch64/stackmap-liveness.ll
index 224a9c41852..4b04276ac22 100644
--- a/llvm/test/CodeGen/AArch64/stackmap-liveness.ll
+++ b/llvm/test/CodeGen/AArch64/stackmap-liveness.ll
@@ -5,7 +5,7 @@ target datalayout = "e-m:o-i64:64-i128:128-n32:64-S128"
; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps
; CHECK-NEXT: __LLVM_StackMaps:
; Header
-; CHECK-NEXT: .byte 1
+; CHECK-NEXT: .byte 2
; CHECK-NEXT: .byte 0
; CHECK-NEXT: .short 0
; Num Functions
@@ -44,4 +44,3 @@ define i64 @stackmap_liveness(i1 %c) {
}
declare void @llvm.experimental.patchpoint.void(i64, i32, i8*, i32, ...)
-
diff --git a/llvm/test/CodeGen/PowerPC/ppc64-anyregcc.ll b/llvm/test/CodeGen/PowerPC/ppc64-anyregcc.ll
index ff0768ff47e..4af118b567b 100644
--- a/llvm/test/CodeGen/PowerPC/ppc64-anyregcc.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc64-anyregcc.ll
@@ -31,7 +31,7 @@ target triple = "powerpc64-unknown-linux-gnu"
; CHECK-LABEL: .section .llvm_stackmaps
; CHECK-NEXT: __LLVM_StackMaps:
; Header
-; CHECK-NEXT: .byte 1
+; CHECK-NEXT: .byte 2
; CHECK-NEXT: .byte 0
; CHECK-NEXT: .short 0
; Num Functions
@@ -44,20 +44,28 @@ target triple = "powerpc64-unknown-linux-gnu"
; Functions and stack size
; CHECK-NEXT: .quad test
; CHECK-NEXT: .quad 128
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad property_access1
; CHECK-NEXT: .quad 128
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad property_access2
; CHECK-NEXT: .quad 128
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad property_access3
; CHECK-NEXT: .quad 128
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad anyreg_test1
; CHECK-NEXT: .quad 144
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad anyreg_test2
; CHECK-NEXT: .quad 144
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad patchpoint_spilldef
; CHECK-NEXT: .quad 256
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad patchpoint_spillargs
; CHECK-NEXT: .quad 288
+; CHECK-NEXT: .quad 1
; test
diff --git a/llvm/test/CodeGen/PowerPC/ppc64-stackmap.ll b/llvm/test/CodeGen/PowerPC/ppc64-stackmap.ll
index a77339f8e47..854cee22c34 100644
--- a/llvm/test/CodeGen/PowerPC/ppc64-stackmap.ll
+++ b/llvm/test/CodeGen/PowerPC/ppc64-stackmap.ll
@@ -44,7 +44,7 @@ target triple = "powerpc64-unknown-linux-gnu"
; CHECK-LABEL: .section .llvm_stackmaps
; CHECK-NEXT: __LLVM_StackMaps:
; Header
-; CHECK-NEXT: .byte 1
+; CHECK-NEXT: .byte 2
; CHECK-NEXT: .byte 0
; CHECK-NEXT: .short 0
; Num Functions
@@ -57,26 +57,37 @@ target triple = "powerpc64-unknown-linux-gnu"
; Functions and stack size
; CHECK-NEXT: .quad constantargs
; CHECK-NEXT: .quad 128
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad osrinline
; CHECK-NEXT: .quad 144
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad osrcold
; CHECK-NEXT: .quad 128
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad propertyRead
; CHECK-NEXT: .quad 128
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad propertyWrite
; CHECK-NEXT: .quad 128
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad jsVoidCall
; CHECK-NEXT: .quad 128
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad jsIntCall
; CHECK-NEXT: .quad 128
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad spilledValue
; CHECK-NEXT: .quad 304
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad spilledStackMapValue
; CHECK-NEXT: .quad 224
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad liveConstant
; CHECK-NEXT: .quad 64
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad clobberLR
; CHECK-NEXT: .quad 208
+; CHECK-NEXT: .quad 1
; Num LargeConstants
; CHECK-NEXT: .quad 4294967295
diff --git a/llvm/test/CodeGen/X86/anyregcc.ll b/llvm/test/CodeGen/X86/anyregcc.ll
index 129aadfae88..018a92a52f7 100644
--- a/llvm/test/CodeGen/X86/anyregcc.ll
+++ b/llvm/test/CodeGen/X86/anyregcc.ll
@@ -7,7 +7,7 @@
; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps
; CHECK-NEXT: __LLVM_StackMaps:
; Header
-; CHECK-NEXT: .byte 1
+; CHECK-NEXT: .byte 2
; CHECK-NEXT: .byte 0
; CHECK-NEXT: .short 0
; Num Functions
@@ -20,20 +20,28 @@
; Functions and stack size
; CHECK-NEXT: .quad _test
; CHECK-NEXT: .quad 8
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _property_access1
; CHECK-NEXT: .quad 8
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _property_access2
; CHECK-NEXT: .quad 24
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _property_access3
; CHECK-NEXT: .quad 24
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _anyreg_test1
; CHECK-NEXT: .quad 56
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _anyreg_test2
; CHECK-NEXT: .quad 56
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _patchpoint_spilldef
; CHECK-NEXT: .quad 56
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _patchpoint_spillargs
; CHECK-NEXT: .quad 88
+; CHECK-NEXT: .quad 1
; No constants
diff --git a/llvm/test/CodeGen/X86/patchpoint-invoke.ll b/llvm/test/CodeGen/X86/patchpoint-invoke.ll
index b7f198d960a..c6dff3b78f1 100644
--- a/llvm/test/CodeGen/X86/patchpoint-invoke.ll
+++ b/llvm/test/CodeGen/X86/patchpoint-invoke.ll
@@ -45,7 +45,7 @@ threw:
; Verify that the stackmap section got emitted:
; CHECK-LABEL: __LLVM_StackMaps:
; Header
-; CHECK-NEXT: .byte 1
+; CHECK-NEXT: .byte 2
; CHECK-NEXT: .byte 0
; CHECK-NEXT: .short 0
; Num Functions
diff --git a/llvm/test/CodeGen/X86/stackmap-fast-isel.ll b/llvm/test/CodeGen/X86/stackmap-fast-isel.ll
index 1392e5bd87c..7afe966b77a 100644
--- a/llvm/test/CodeGen/X86/stackmap-fast-isel.ll
+++ b/llvm/test/CodeGen/X86/stackmap-fast-isel.ll
@@ -4,7 +4,7 @@
; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps
; CHECK-NEXT: __LLVM_StackMaps:
; Header
-; CHECK-NEXT: .byte 1
+; CHECK-NEXT: .byte 2
; CHECK-NEXT: .byte 0
; CHECK-NEXT: .short 0
; Num Functions
@@ -17,12 +17,16 @@
; Functions and stack size
; CHECK-NEXT: .quad _constantargs
; CHECK-NEXT: .quad 8
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _liveConstant
; CHECK-NEXT: .quad 8
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _directFrameIdx
; CHECK-NEXT: .quad 40
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _longid
; CHECK-NEXT: .quad 8
+; CHECK-NEXT: .quad 4
; Large Constants
; CHECK-NEXT: .quad 2147483648
diff --git a/llvm/test/CodeGen/X86/stackmap-large-constants.ll b/llvm/test/CodeGen/X86/stackmap-large-constants.ll
index 0143a4e0fbc..99a2c11828e 100644
--- a/llvm/test/CodeGen/X86/stackmap-large-constants.ll
+++ b/llvm/test/CodeGen/X86/stackmap-large-constants.ll
@@ -3,7 +3,7 @@
; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps
; CHECK-NEXT: __LLVM_StackMaps:
; version
-; CHECK-NEXT: .byte 1
+; CHECK-NEXT: .byte 2
; reserved
; CHECK-NEXT: .byte 0
; reserved
@@ -17,9 +17,11 @@
; function address & stack size
; CHECK-NEXT: .quad _foo
; CHECK-NEXT: .quad 8
+; CHECK-NEXT: .quad 1
; function address & stack size
; CHECK-NEXT: .quad _bar
; CHECK-NEXT: .quad 8
+; CHECK-NEXT: .quad 1
; Constants Array:
; CHECK-NEXT: .quad 9223372036854775807
diff --git a/llvm/test/CodeGen/X86/stackmap-liveness.ll b/llvm/test/CodeGen/X86/stackmap-liveness.ll
index d2dd263a617..a5809ace795 100644
--- a/llvm/test/CodeGen/X86/stackmap-liveness.ll
+++ b/llvm/test/CodeGen/X86/stackmap-liveness.ll
@@ -6,7 +6,7 @@
; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps
; CHECK-NEXT: __LLVM_StackMaps:
; Header
-; CHECK-NEXT: .byte 1
+; CHECK-NEXT: .byte 2
; CHECK-NEXT: .byte 0
; CHECK-NEXT: .short 0
; Num Functions
@@ -19,8 +19,10 @@
; Functions and stack size
; CHECK-NEXT: .quad _stackmap_liveness
; CHECK-NEXT: .quad 8
+; CHECK-NEXT: .quad 3
; CHECK-NEXT: .quad _mixed_liveness
; CHECK-NEXT: .quad 8
+; CHECK-NEXT: .quad 2
define void @stackmap_liveness() {
entry:
diff --git a/llvm/test/CodeGen/X86/stackmap.ll b/llvm/test/CodeGen/X86/stackmap.ll
index 0805e814704..fe3846254be 100644
--- a/llvm/test/CodeGen/X86/stackmap.ll
+++ b/llvm/test/CodeGen/X86/stackmap.ll
@@ -5,7 +5,7 @@
; CHECK-LABEL: .section __LLVM_STACKMAPS,__llvm_stackmaps
; CHECK-NEXT: __LLVM_StackMaps:
; Header
-; CHECK-NEXT: .byte 1
+; CHECK-NEXT: .byte 2
; CHECK-NEXT: .byte 0
; CHECK-NEXT: .short 0
; Num Functions
@@ -18,36 +18,52 @@
; Functions and stack size
; CHECK-NEXT: .quad _constantargs
; CHECK-NEXT: .quad 8
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _osrinline
; CHECK-NEXT: .quad 24
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _osrcold
; CHECK-NEXT: .quad 8
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _propertyRead
; CHECK-NEXT: .quad 8
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _propertyWrite
; CHECK-NEXT: .quad 8
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _jsVoidCall
; CHECK-NEXT: .quad 8
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _jsIntCall
; CHECK-NEXT: .quad 8
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _spilledValue
; CHECK-NEXT: .quad 56
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _spilledStackMapValue
; CHECK-NEXT: .quad 56
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _spillSubReg
; CHECK-NEXT: .quad 56
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _subRegOffset
; CHECK-NEXT: .quad 56
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _liveConstant
; CHECK-NEXT: .quad 8
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _directFrameIdx
; CHECK-NEXT: .quad 56
+; CHECK-NEXT: .quad 2
; CHECK-NEXT: .quad _longid
; CHECK-NEXT: .quad 8
+; CHECK-NEXT: .quad 4
; CHECK-NEXT: .quad _clobberScratch
; CHECK-NEXT: .quad 56
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad _needsStackRealignment
; CHECK-NEXT: .quad -1
+; CHECK-NEXT: .quad 1
; Large Constants
; CHECK-NEXT: .quad 2147483648
diff --git a/llvm/test/CodeGen/X86/statepoint-allocas.ll b/llvm/test/CodeGen/X86/statepoint-allocas.ll
index 040ab614d0a..e33af61ebc6 100644
--- a/llvm/test/CodeGen/X86/statepoint-allocas.ll
+++ b/llvm/test/CodeGen/X86/statepoint-allocas.ll
@@ -48,7 +48,7 @@ declare token @llvm.experimental.gc.statepoint.p0f_i1f(i64, i32, i1 ()*, i32, i3
; CHECK-LABEL: .section .llvm_stackmaps
; CHECK-NEXT: __LLVM_StackMaps:
; Header
-; CHECK-NEXT: .byte 1
+; CHECK-NEXT: .byte 2
; CHECK-NEXT: .byte 0
; CHECK-NEXT: .short 0
; Num Functions
@@ -61,8 +61,10 @@ declare token @llvm.experimental.gc.statepoint.p0f_i1f(i64, i32, i1 ()*, i32, i3
; Functions and stack size
; CHECK-NEXT: .quad test
; CHECK-NEXT: .quad 8
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad test2
; CHECK-NEXT: .quad 8
+; CHECK-NEXT: .quad 1
; Large Constants
; Statepoint ID only
@@ -127,4 +129,3 @@ declare token @llvm.experimental.gc.statepoint.p0f_i1f(i64, i32, i1 ()*, i32, i3
; CHECK: .short 0
; CHECK: .short 0
; CHECK: .p2align 3
-
diff --git a/llvm/test/CodeGen/X86/statepoint-stackmap-format.ll b/llvm/test/CodeGen/X86/statepoint-stackmap-format.ll
index 2b1357a1179..ea05993c478 100644
--- a/llvm/test/CodeGen/X86/statepoint-stackmap-format.ll
+++ b/llvm/test/CodeGen/X86/statepoint-stackmap-format.ll
@@ -79,7 +79,7 @@ declare i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token, i32, i32)
; CHECK-LABEL: .section .llvm_stackmaps
; CHECK-NEXT: __LLVM_StackMaps:
; Header
-; CHECK-NEXT: .byte 1
+; CHECK-NEXT: .byte 2
; CHECK-NEXT: .byte 0
; CHECK-NEXT: .short 0
; Num Functions
@@ -92,10 +92,13 @@ declare i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token, i32, i32)
; Functions and stack size
; CHECK-NEXT: .quad test
; CHECK-NEXT: .quad 40
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad test_derived_arg
; CHECK-NEXT: .quad 40
+; CHECK-NEXT: .quad 1
; CHECK-NEXT: .quad test_id
; CHECK-NEXT: .quad 8
+; CHECK-NEXT: .quad 1
;
; test
@@ -276,4 +279,3 @@ declare i32 addrspace(1)* @llvm.experimental.gc.relocate.p1i32(token, i32, i32)
; CHECK: .short 0
; CHECK: .short 0
; CHECK: .p2align 3
-
diff --git a/llvm/test/Object/Inputs/stackmap-test.macho-x86-64 b/llvm/test/Object/Inputs/stackmap-test.macho-x86-64
index 588c5aa6685..438f5e77a44 100644
--- a/llvm/test/Object/Inputs/stackmap-test.macho-x86-64
+++ b/llvm/test/Object/Inputs/stackmap-test.macho-x86-64
Binary files differ
diff --git a/llvm/test/Object/stackmap-dump.test b/llvm/test/Object/stackmap-dump.test
index 71710fb6194..5d7d8ccbb67 100644
--- a/llvm/test/Object/stackmap-dump.test
+++ b/llvm/test/Object/stackmap-dump.test
@@ -1,16 +1,174 @@
RUN: llvm-readobj -stackmap %p/Inputs/stackmap-test.macho-x86-64 | FileCheck %s
-CHECK: LLVM StackMap Version: 1
-CHECK-NEXT: Num Functions: 1
-CHECK-NEXT: Function address: 0, stack size: 16
-CHECK-NEXT: Num Constants: 1
-CHECK-NEXT: #1: 10000000000
-CHECK-NEXT: Num Records: 1
-CHECK-NEXT: Record ID: 2, instruction offset: 1
-CHECK-NEXT: 5 locations:
+; Note: the macho object file in this test was generated in the following way:
+; llc -mtriple=x86_64-apple-darwin %p/test/CodeGen/X86/stackmap.ll -o stackmap.s
+; clang -c stackmap.s -o %p/test/Object/Inputs/stackmap-test.macho-x86-64
+
+CHECK: LLVM StackMap Version: 2
+CHECK-NEXT: Num Functions: 16
+CHECK-NEXT: Function address: 0, stack size: 8, callsite record count: 1
+CHECK-NEXT: Function address: 0, stack size: 24, callsite record count: 1
+CHECK-NEXT: Function address: 0, stack size: 8, callsite record count: 1
+CHECK-NEXT: Function address: 0, stack size: 8, callsite record count: 1
+CHECK-NEXT: Function address: 0, stack size: 8, callsite record count: 1
+CHECK-NEXT: Function address: 0, stack size: 8, callsite record count: 1
+CHECK-NEXT: Function address: 0, stack size: 8, callsite record count: 1
+CHECK-NEXT: Function address: 0, stack size: 56, callsite record count: 1
+CHECK-NEXT: Function address: 0, stack size: 56, callsite record count: 1
+CHECK-NEXT: Function address: 0, stack size: 56, callsite record count: 1
+CHECK-NEXT: Function address: 0, stack size: 56, callsite record count: 1
+CHECK-NEXT: Function address: 0, stack size: 8, callsite record count: 1
+CHECK-NEXT: Function address: 0, stack size: 56, callsite record count: 2
+CHECK-NEXT: Function address: 0, stack size: 8, callsite record count: 4
+CHECK-NEXT: Function address: 0, stack size: 56, callsite record count: 1
+CHECK-NEXT: Function address: 0, stack size: 18446744073709551615, callsite record count: 1
+CHECK-NEXT: Num Constants: 3
+CHECK-NEXT: #1: 2147483648
+CHECK-NEXT: #2: 4294967295
+CHECK-NEXT: #3: 4294967296
+CHECK-NEXT: Num Records: 20
+CHECK-NEXT: Record ID: 1, instruction offset: 4
+CHECK-NEXT: 12 locations:
+CHECK-NEXT: #1: Constant 4294967295
+CHECK-NEXT: #2: Constant 4294967295
+CHECK-NEXT: #3: Constant 65536
+CHECK-NEXT: #4: Constant 2000000000
+CHECK-NEXT: #5: Constant 2147483647
+CHECK-NEXT: #6: Constant 4294967295
+CHECK-NEXT: #7: Constant 4294967295
+CHECK-NEXT: #8: Constant 0
+CHECK-NEXT: #9: ConstantIndex #0 (2147483648)
+CHECK-NEXT: #10: ConstantIndex #1 (4294967295)
+CHECK-NEXT: #11: ConstantIndex #2 (4294967296)
+CHECK-NEXT: #12: Constant 4294967295
+CHECK-NEXT: 1 live-outs: [ R#7 (8-bytes) ]
+
+CHECK: Record ID: 3, instruction offset: 22
+CHECK-NEXT: 2 locations:
+CHECK-NEXT: #1: Register R#3
+CHECK-NEXT: #2: Register R#14
+CHECK-NEXT: 0 live-outs: [ ]
+
+CHECK: Record ID: 4, instruction offset: 10
+CHECK-NEXT: 2 locations:
CHECK-NEXT: #1: Register R#5
-CHECK-NEXT: #2: Constant 10
-CHECK-NEXT: #3: ConstantIndex #0 (10000000000)
-CHECK-NEXT: #4: Direct R#4 + -8
-CHECK-NEXT: #5: Indirect [R#6 + -16]
+CHECK-NEXT: #2: Register R#4
+CHECK-NEXT: 0 live-outs: [ ]
+
+CHECK: Record ID: 5, instruction offset: 4
+CHECK-NEXT: 2 locations:
+CHECK-NEXT: #1: Register R#0
+CHECK-NEXT: #2: Register R#5
+CHECK-NEXT: 2 live-outs: [ R#0 (8-bytes) R#7 (8-bytes) ]
+
+CHECK: Record ID: 6, instruction offset: 4
+CHECK-NEXT: 2 locations:
+CHECK-NEXT: #1: Register R#4
+CHECK-NEXT: #2: Register R#2
CHECK-NEXT: 1 live-outs: [ R#7 (8-bytes) ]
+
+CHECK: Record ID: 7, instruction offset: 10
+CHECK-NEXT: 2 locations:
+CHECK-NEXT: #1: Register R#2
+CHECK-NEXT: #2: Register R#8
+CHECK-NEXT: 1 live-outs: [ R#7 (8-bytes) ]
+
+CHECK: Record ID: 8, instruction offset: 10
+CHECK-NEXT: 2 locations:
+CHECK-NEXT: #1: Register R#2
+CHECK-NEXT: #2: Register R#8
+CHECK-NEXT: 2 live-outs: [ R#0 (8-bytes) R#7 (8-bytes) ]
+
+CHECK: Record ID: 11, instruction offset: 42
+CHECK-NEXT: 17 locations:
+CHECK-NEXT: #1: Register R#9
+CHECK-NEXT: #2: Register R#14
+CHECK-NEXT: #3: Register R#10
+CHECK-NEXT: #4: Register R#3
+CHECK-NEXT: #5: Register R#0
+CHECK-NEXT: #6: Register R#13
+CHECK-NEXT: #7: Register R#12
+CHECK-NEXT: #8: Register R#15
+CHECK-NEXT: #9: Indirect [R#6 + 72]
+CHECK-NEXT: #10: Indirect [R#6 + 80]
+CHECK-NEXT: #11: Indirect [R#6 + 88]
+CHECK-NEXT: #12: Indirect [R#6 + 96]
+CHECK-NEXT: #13: Indirect [R#6 + 104]
+CHECK-NEXT: #14: Indirect [R#6 + 112]
+CHECK-NEXT: #15: Indirect [R#6 + 120]
+CHECK-NEXT: #16: Indirect [R#6 + 128]
+CHECK-NEXT: #17: Indirect [R#6 + 136]
+CHECK-NEXT: 1 live-outs: [ R#7 (8-bytes) ]
+
+CHECK: Record ID: 12, instruction offset: 62
+CHECK-NEXT: 17 locations:
+CHECK-NEXT: #1: Register R#0
+CHECK-NEXT: #2: Register R#14
+CHECK-NEXT: #3: Register R#10
+CHECK-NEXT: #4: Register R#9
+CHECK-NEXT: #5: Register R#8
+CHECK-NEXT: #6: Register R#4
+CHECK-NEXT: #7: Register R#1
+CHECK-NEXT: #8: Register R#2
+CHECK-NEXT: #9: Register R#5
+CHECK-NEXT: #10: Register R#3
+CHECK-NEXT: #11: Register R#13
+CHECK-NEXT: #12: Register R#12
+CHECK-NEXT: #13: Register R#15
+CHECK-NEXT: #14: Indirect [R#6 + 112]
+CHECK-NEXT: #15: Indirect [R#6 + 120]
+CHECK-NEXT: #16: Indirect [R#6 + 128]
+CHECK-NEXT: #17: Indirect [R#6 + 136]
+CHECK-NEXT: 0 live-outs: [ ]
+
+CHECK: Record ID: 13, instruction offset: 50
+CHECK-NEXT: 1 locations:
+CHECK-NEXT: #1: Indirect [R#6 + -48]
+CHECK-NEXT: 0 live-outs: [ ]
+
+CHECK: Record ID: 14, instruction offset: 24
+CHECK-NEXT: 2 locations:
+CHECK-NEXT: #1: Register R#0
+CHECK-NEXT: #2: Register R#3
+CHECK-NEXT: 0 live-outs: [ ]
+
+CHECK: Record ID: 15, instruction offset: 4
+CHECK-NEXT: 1 locations:
+CHECK-NEXT: #1: Constant 33
+CHECK-NEXT: 0 live-outs: [ ]
+
+CHECK: Record ID: 16, instruction offset: 32
+CHECK-NEXT: 1 locations:
+CHECK-NEXT: #1: Direct R#6 + -32
+CHECK-NEXT: 0 live-outs: [ ]
+
+CHECK: Record ID: 17, instruction offset: 32
+CHECK-NEXT: 2 locations:
+CHECK-NEXT: #1: Direct R#6 + -8
+CHECK-NEXT: #2: Direct R#6 + -40
+CHECK-NEXT: 1 live-outs: [ R#7 (8-bytes) ]
+
+CHECK: Record ID: 4294967295, instruction offset: 4
+CHECK-NEXT: 0 locations:
+CHECK-NEXT: 0 live-outs: [ ]
+
+CHECK: Record ID: 4294967296, instruction offset: 4
+CHECK-NEXT: 0 locations:
+CHECK-NEXT: 0 live-outs: [ ]
+
+CHECK: Record ID: 9223372036854775807, instruction offset: 4
+CHECK-NEXT: 0 locations:
+CHECK-NEXT: 0 live-outs: [ ]
+
+CHECK: Record ID: 18446744073709551615, instruction offset: 4
+CHECK-NEXT: 0 locations:
+CHECK-NEXT: 1 live-outs: [ R#7 (8-bytes) ]
+
+CHECK: Record ID: 16, instruction offset: 18
+CHECK-NEXT: 1 locations:
+CHECK-NEXT: #1: Indirect [R#6 + -44]
+CHECK-NEXT: 0 live-outs: [ ]
+
+CHECK: Record ID: 0, instruction offset: 26
+CHECK-NEXT: 0 locations:
+CHECK-NEXT: 0 live-outs: [ ]
OpenPOWER on IntegriCloud