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-rw-r--r--llvm/test/MC/Disassembler/Mips/mips1/valid-mips1-el.txt2
-rw-r--r--llvm/test/MC/Disassembler/Mips/mips1/valid-mips1.txt2
-rw-r--r--llvm/test/MC/Disassembler/Mips/mips2/valid-mips2-el.txt2
-rw-r--r--llvm/test/MC/Disassembler/Mips/mips2/valid-mips2.txt2
-rw-r--r--llvm/test/MC/Disassembler/Mips/mips3/valid-mips3-el.txt2
-rw-r--r--llvm/test/MC/Disassembler/Mips/mips3/valid-mips3.txt4
-rw-r--r--llvm/test/MC/Disassembler/Mips/mips32/valid-mips32-el.txt2
-rw-r--r--llvm/test/MC/Disassembler/Mips/mips32/valid-mips32.txt2
-rw-r--r--llvm/test/MC/Disassembler/Mips/mips32_le.txt2
-rw-r--r--llvm/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2.txt2
-rw-r--r--llvm/test/MC/Disassembler/Mips/mips4/valid-mips4-el.txt2
-rw-r--r--llvm/test/MC/Disassembler/Mips/mips4/valid-mips4.txt4
-rw-r--r--llvm/test/MC/Disassembler/Mips/mips64/valid-mips64-el.txt2
-rw-r--r--llvm/test/MC/Disassembler/Mips/mips64/valid-mips64.txt2
-rw-r--r--llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2-el.txt2
-rw-r--r--llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2.txt2
-rw-r--r--llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3-el.txt2
-rw-r--r--llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3.txt2
-rw-r--r--llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5-el.txt2
-rw-r--r--llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5.txt2
-rw-r--r--llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt2
-rw-r--r--llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt2
-rw-r--r--llvm/test/MC/Mips/mips-alu-instructions.s2
-rw-r--r--llvm/test/MC/Mips/mips1/valid.s4
-rw-r--r--llvm/test/MC/Mips/mips2/valid.s4
-rw-r--r--llvm/test/MC/Mips/mips3/valid.s8
-rw-r--r--llvm/test/MC/Mips/mips32/valid.s4
-rw-r--r--llvm/test/MC/Mips/mips32r2/valid.s4
-rw-r--r--llvm/test/MC/Mips/mips32r3/valid.s4
-rw-r--r--llvm/test/MC/Mips/mips32r5/valid.s4
-rw-r--r--llvm/test/MC/Mips/mips32r6/valid.s4
-rw-r--r--llvm/test/MC/Mips/mips4/valid.s8
-rw-r--r--llvm/test/MC/Mips/mips5/valid.s8
-rw-r--r--llvm/test/MC/Mips/mips64-alu-instructions.s2
-rw-r--r--llvm/test/MC/Mips/mips64/valid.s8
-rw-r--r--llvm/test/MC/Mips/mips64r2/valid.s8
-rw-r--r--llvm/test/MC/Mips/mips64r3/valid.s8
-rw-r--r--llvm/test/MC/Mips/mips64r5/valid.s8
-rw-r--r--llvm/test/MC/Mips/mips64r6/valid.s4
39 files changed, 97 insertions, 43 deletions
diff --git a/llvm/test/MC/Disassembler/Mips/mips1/valid-mips1-el.txt b/llvm/test/MC/Disassembler/Mips/mips1/valid-mips1-el.txt
index dba949acd66..869d909621a 100644
--- a/llvm/test/MC/Disassembler/Mips/mips1/valid-mips1-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips1/valid-mips1-el.txt
@@ -58,6 +58,8 @@
0x12 0x88 0x00 0x00 # CHECK: mflo $17
0x06 0x75 0x20 0x46 # CHECK: mov.d $f20, $f14
0x86 0xd8 0x00 0x46 # CHECK: mov.s $f2, $f27
+0x25 0xf0 0x80 0x00 # CHECK: move $fp, $4
+0x25 0xc8 0xc0 0x00 # CHECK: move $25, $6
0x21 0xf0 0x80 0x00 # CHECK: move $fp, $4
0x21 0xc8 0xc0 0x00 # CHECK: move $25, $6
0x00 0x48 0x9e 0x44 # CHECK: mtc1 $fp, $f9
diff --git a/llvm/test/MC/Disassembler/Mips/mips1/valid-mips1.txt b/llvm/test/MC/Disassembler/Mips/mips1/valid-mips1.txt
index 59e702e17e1..5c4c5612e84 100644
--- a/llvm/test/MC/Disassembler/Mips/mips1/valid-mips1.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips1/valid-mips1.txt
@@ -16,11 +16,13 @@
0x00 0x17 0x8b 0xc3 # CHECK: sra $17, $23, 15
0x00 0x4c 0xb8 0x24 # CHECK: and $23, $2, $12
0x00 0x80 0xf0 0x21 # CHECK: move $fp, $4
+0x00 0x80 0xf0 0x25 # CHECK: move $fp, $4
0x00 0x86 0x48 0x21 # CHECK: addu $9, $4, $6
0x00 0x94 0xc8 0x06 # CHECK: srlv $25, $20, $4
0x00 0x94 0xc8 0x06 # CHECK: srlv $25, $20, $4
0x00 0x9e 0x90 0x26 # CHECK: xor $18, $4, $fp
0x00 0xc0 0xc8 0x21 # CHECK: move $25, $6
+0x00 0xc0 0xc8 0x25 # CHECK: move $25, $6
0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9
0x01 0x20 0x38 0x04 # CHECK: sllv $7, $zero, $9
0x01 0x32 0x00 0x19 # CHECK: multu $9, $18
diff --git a/llvm/test/MC/Disassembler/Mips/mips2/valid-mips2-el.txt b/llvm/test/MC/Disassembler/Mips/mips2/valid-mips2-el.txt
index 806040937b7..5bdf8f17eb6 100644
--- a/llvm/test/MC/Disassembler/Mips/mips2/valid-mips2-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips2/valid-mips2-el.txt
@@ -74,6 +74,8 @@
0x86 0xd8 0x00 0x46 # CHECK: mov.s $f2, $f27
0x21 0xf0 0x80 0x00 # CHECK: move $fp, $4
0x21 0xc8 0xc0 0x00 # CHECK: move $25, $6
+0x25 0xf0 0x80 0x00 # CHECK: move $fp, $4
+0x25 0xc8 0xc0 0x00 # CHECK: move $25, $6
0x00 0x48 0x9e 0x44 # CHECK: mtc1 $fp, $f9
0x11 0x00 0x20 0x02 # CHECK: mthi $17
0x13 0x00 0xa0 0x03 # CHECK: mtlo $sp
diff --git a/llvm/test/MC/Disassembler/Mips/mips2/valid-mips2.txt b/llvm/test/MC/Disassembler/Mips/mips2/valid-mips2.txt
index 268bb290090..f3b67842a01 100644
--- a/llvm/test/MC/Disassembler/Mips/mips2/valid-mips2.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips2/valid-mips2.txt
@@ -19,6 +19,7 @@
0x00 0x4c 0xb8 0x24 # CHECK: and $23, $2, $12
0x00 0x53 0x21 0x72 # CHECK: tlt $2, $19, 133
0x00 0x80 0xf0 0x21 # CHECK: move $fp, $4
+0x00 0x80 0xf0 0x25 # CHECK: move $fp, $4
0x00 0x86 0x48 0x21 # CHECK: addu $9, $4, $6
0x00 0x94 0xc8 0x06 # CHECK: srlv $25, $20, $4
0x00 0x94 0xc8 0x06 # CHECK: srlv $25, $20, $4
@@ -26,6 +27,7 @@
0x00 0xa7 0x9b 0x34 # CHECK: teq $5, $7, 620
0x00 0xb3 0x55 0x30 # CHECK: tge $5, $19, 340
0x00 0xc0 0xc8 0x21 # CHECK: move $25, $6
+0x00 0xc0 0xc8 0x25 # CHECK: move $25, $6
0x00 0xd1 0x00 0x36 # CHECK: tne $6, $17
0x00 0xe8 0xdd 0x76 # CHECK: tne $7, $8, 885
0x00 0xea 0x00 0x30 # CHECK: tge $7, $10
diff --git a/llvm/test/MC/Disassembler/Mips/mips3/valid-mips3-el.txt b/llvm/test/MC/Disassembler/Mips/mips3/valid-mips3-el.txt
index 98ce16bb742..6ffe7748e95 100644
--- a/llvm/test/MC/Disassembler/Mips/mips3/valid-mips3-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips3/valid-mips3-el.txt
@@ -118,6 +118,8 @@
0x86 0xd8 0x00 0x46 # CHECK: mov.s $f2, $f27
0x21 0xf0 0x80 0x00 # CHECK: move $fp, $4
0x21 0xc8 0xc0 0x00 # CHECK: move $25, $6
+0x25 0xf0 0x80 0x00 # CHECK: move $fp, $4
+0x25 0xc8 0xc0 0x00 # CHECK: move $25, $6
0x00 0x48 0x9e 0x44 # CHECK: mtc1 $fp, $f9
0x11 0x00 0x20 0x02 # CHECK: mthi $17
0x13 0x00 0xa0 0x03 # CHECK: mtlo $sp
diff --git a/llvm/test/MC/Disassembler/Mips/mips3/valid-mips3.txt b/llvm/test/MC/Disassembler/Mips/mips3/valid-mips3.txt
index 2a38b19092f..81888588e69 100644
--- a/llvm/test/MC/Disassembler/Mips/mips3/valid-mips3.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips3/valid-mips3.txt
@@ -35,6 +35,8 @@
0x00 0x4c 0xb8 0x24 # CHECK: and $23, $2, $12
0x00 0x53 0x21 0x72 # CHECK: tlt $2, $19, 133
0x00 0x80 0xf0 0x21 # CHECK: move $fp, $4
+0x00 0x80 0xf0 0x25 # CHECK: move $fp, $4
+0x00 0x80 0xf0 0x2d # CHECK: move $fp, $4
0x00 0x86 0x48 0x21 # CHECK: addu $9, $4, $6
0x00 0x94 0xc8 0x06 # CHECK: srlv $25, $20, $4
0x00 0x94 0xc8 0x06 # CHECK: srlv $25, $20, $4
@@ -44,6 +46,8 @@
0x00 0xb3 0x55 0x30 # CHECK: tge $5, $19, 340
0x00 0xba 0x28 0x2f # CHECK: dsubu $5, $5, $26
0x00 0xc0 0xc8 0x21 # CHECK: move $25, $6
+0x00 0xc0 0xc8 0x25 # CHECK: move $25, $6
+0x00 0xc0 0xc8 0x2d # CHECK: move $25, $6
0x00 0xd1 0x00 0x36 # CHECK: tne $6, $17
0x00 0xe8 0xdd 0x76 # CHECK: tne $7, $8, 885
0x00 0xea 0x00 0x30 # CHECK: tge $7, $10
diff --git a/llvm/test/MC/Disassembler/Mips/mips32/valid-mips32-el.txt b/llvm/test/MC/Disassembler/Mips/mips32/valid-mips32-el.txt
index f2299732a80..84ff39c8fc9 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32/valid-mips32-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32/valid-mips32-el.txt
@@ -7,7 +7,9 @@
0x67 0x45 0xc9 0x20 # CHECK: addi $9, $6, 17767
0x67 0xc5 0xc9 0x24 # CHECK: addiu $9, $6, -15001
0x21 0x48 0xc7 0x00 # CHECK: addu $9, $6, $7
+0x21 0xf0 0x80 0x00 # CHECK: move $fp, $4
0x24 0x48 0xc7 0x00 # CHECK: and $9, $6, $7
+0x25 0xf0 0x80 0x00 # CHECK: move $fp, $4
0x67 0x45 0xc9 0x30 # CHECK: andi $9, $6, 17767
0x4c 0x01 0x00 0x10 # CHECK: b 1332
0x4c 0x01 0x00 0x45 # CHECK: bc1f 1332
diff --git a/llvm/test/MC/Disassembler/Mips/mips32/valid-mips32.txt b/llvm/test/MC/Disassembler/Mips/mips32/valid-mips32.txt
index 09f1e56fff4..00c910b484e 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32/valid-mips32.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32/valid-mips32.txt
@@ -15,6 +15,8 @@
0x00 0x65 0x18 0x2a # CHECK: slt $3, $3, $5
0x00 0x65 0x18 0x2b # CHECK: sltu $3, $3, $5
0x00 0x65 0x20 0x23 # CHECK: subu $4, $3, $5
+0x00 0x80 0xf0 0x21 # CHECK: move $fp, $4
+0x00 0x80 0xf0 0x25 # CHECK: move $fp, $4
0x00 0x80 0xfc 0x09 # CHECK: jalr.hb $4
0x00 0xa0 0x24 0x09 # CHECK: jalr.hb $4, $5
0x00 0xa3 0x10 0x04 # CHECK: sllv $2, $3, $5
diff --git a/llvm/test/MC/Disassembler/Mips/mips32_le.txt b/llvm/test/MC/Disassembler/Mips/mips32_le.txt
index c019c41bd12..cdc69a7b1ed 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32_le.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32_le.txt
@@ -273,7 +273,7 @@
0x86 0x39 0x00 0x46
# CHECK: move $7, $8
-0x21,0x38,0x00,0x01
+0x25,0x38,0x00,0x01
# CHECK: move $3, $2
0x25,0x18,0x40,0x00
diff --git a/llvm/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2.txt b/llvm/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2.txt
index d0138475290..80615b889fc 100644
--- a/llvm/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips32r2/valid-mips32r2.txt
@@ -17,6 +17,8 @@
0x00 0x65 0x18 0x2a # CHECK: slt $3, $3, $5
0x00 0x65 0x18 0x2b # CHECK: sltu $3, $3, $5
0x00 0x65 0x20 0x23 # CHECK: subu $4, $3, $5
+0x00 0x80 0xf0 0x21 # CHECK: move $fp, $4
+0x00 0x80 0xf0 0x25 # CHECK: move $fp, $4
0x00 0x80 0xfc 0x09 # CHECK: jalr.hb $4
0x00 0xa0 0x24 0x09 # CHECK: jalr.hb $4, $5
0x00 0xa3 0x10 0x04 # CHECK: sllv $2, $3, $5
diff --git a/llvm/test/MC/Disassembler/Mips/mips4/valid-mips4-el.txt b/llvm/test/MC/Disassembler/Mips/mips4/valid-mips4-el.txt
index 0c9e2f1b742..1d1044d3205 100644
--- a/llvm/test/MC/Disassembler/Mips/mips4/valid-mips4-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips4/valid-mips4-el.txt
@@ -126,6 +126,8 @@
0xd1 0x2d 0x18 0x46 # CHECK: movf.s $f23, $f5, $fcc6
0x21 0xf0 0x80 0x00 # CHECK: move $fp, $4
0x21 0xc8 0xc0 0x00 # CHECK: move $25, $6
+0x25 0xf0 0x80 0x00 # CHECK: move $fp, $4
+0x25 0xc8 0xc0 0x00 # CHECK: move $25, $6
0x0b 0x18 0x30 0x02 # CHECK: movn $3, $17, $16
0xd3 0xae 0x3a 0x46 # CHECK: movn.d $f27, $f21, $26
0x13 0x03 0x17 0x46 # CHECK: movn.s $f12, $f0, $23
diff --git a/llvm/test/MC/Disassembler/Mips/mips4/valid-mips4.txt b/llvm/test/MC/Disassembler/Mips/mips4/valid-mips4.txt
index 207f4087791..7dad85aa3cd 100644
--- a/llvm/test/MC/Disassembler/Mips/mips4/valid-mips4.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips4/valid-mips4.txt
@@ -35,6 +35,8 @@
0x00 0x4c 0xb8 0x24 # CHECK: and $23, $2, $12
0x00 0x53 0x21 0x72 # CHECK: tlt $2, $19, 133
0x00 0x80 0xf0 0x21 # CHECK: move $fp, $4
+0x00 0x80 0xf0 0x25 # CHECK: move $fp, $4
+0x00 0x80 0xf0 0x2d # CHECK: move $fp, $4
0x00 0x86 0x48 0x21 # CHECK: addu $9, $4, $6
0x00 0x94 0xc8 0x06 # CHECK: srlv $25, $20, $4
0x00 0x94 0xc8 0x06 # CHECK: srlv $25, $20, $4
@@ -44,6 +46,8 @@
0x00 0xb3 0x55 0x30 # CHECK: tge $5, $19, 340
0x00 0xba 0x28 0x2f # CHECK: dsubu $5, $5, $26
0x00 0xc0 0xc8 0x21 # CHECK: move $25, $6
+0x00 0xc0 0xc8 0x25 # CHECK: move $25, $6
+0x00 0xc0 0xc8 0x2d # CHECK: move $25, $6
0x00 0xd1 0x00 0x36 # CHECK: tne $6, $17
0x00 0xe8 0xdd 0x76 # CHECK: tne $7, $8, 885
0x00 0xea 0x00 0x30 # CHECK: tge $7, $10
diff --git a/llvm/test/MC/Disassembler/Mips/mips64/valid-mips64-el.txt b/llvm/test/MC/Disassembler/Mips/mips64/valid-mips64-el.txt
index 2d52216fdda..e1b272962c8 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64/valid-mips64-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64/valid-mips64-el.txt
@@ -148,6 +148,8 @@
0x00 0x38 0x06 0x44 # CHECK: mfc1 $6, $f7
0x10 0x28 0x00 0x00 # CHECK: mfhi $5
0x12 0x28 0x00 0x00 # CHECK: mflo $5
+0x25 0x78 0xe0 0x03 # CEHCK: move $15, $ra
+0x2d 0x78 0xe0 0x03 # CEHCK: move $15, $ra
0x86 0x41 0x20 0x46 # CHECK: mov.d $f6, $f8
0x86 0x39 0x00 0x46 # CHECK: mov.s $f6, $f7
0x04 0x00 0xc7 0x70 # CHECK: msub $6, $7
diff --git a/llvm/test/MC/Disassembler/Mips/mips64/valid-mips64.txt b/llvm/test/MC/Disassembler/Mips/mips64/valid-mips64.txt
index 6cbf5d3206b..0013dec7e71 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64/valid-mips64.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64/valid-mips64.txt
@@ -67,6 +67,8 @@
0x03 0x56 0x00 0x1e # CHECK: ddiv $zero, $26, $22
0x03 0x78 0xe0 0x2f # CHECK: dsubu $gp, $27, $24
0x03 0xc1 0x08 0x17 # CHECK: dsrav $1, $1, $fp
+0x03 0xe0 0x78 0x25 # CHECK: move $15, $ra
+0x03 0xe0 0x78 0x2d # CHECK: move $15, $ra
0x04 0xc1 0x01 0x4c # CHECK: bgez $6, 1332
0x04 0xd1 0x01 0x4c # CHECK: bgezal $6, 1332
0x08 0x00 0x01 0x4c # CHECK: j 1328
diff --git a/llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2-el.txt b/llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2-el.txt
index 2c6859f27fa..c3e24820a17 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2-el.txt
@@ -168,6 +168,8 @@
0x10 0x28 0x00 0x00 # CHECK: mfhi $5
0x00 0xc0 0x7e 0x44 # CHECK: mfhc1 $fp, $f24
0x12 0x28 0x00 0x00 # CHECK: mflo $5
+0x25 0x78 0xe0 0x03 # CHECK: move $15, $ra
+0x2d 0x78 0xe0 0x03 # CHECK: move $15, $ra
0x86 0x41 0x20 0x46 # CHECK: mov.d $f6, $f8
0x86 0x39 0x00 0x46 # CHECK: mov.s $f6, $f7
0x04 0x00 0xc7 0x70 # CHECK: msub $6, $7
diff --git a/llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2.txt b/llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2.txt
index 0c6e10ee37c..431cbedff88 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64r2/valid-mips64r2.txt
@@ -80,6 +80,8 @@
0x03 0x56 0x00 0x1e # CHECK: ddiv $zero, $26, $22
0x03 0x78 0xe0 0x2f # CHECK: dsubu $gp, $27, $24
0x03 0xc1 0x08 0x17 # CHECK: dsrav $1, $1, $fp
+0x03 0xe0 0x78 0x25 # CHECK: move $15, $ra
+0x03 0xe0 0x78 0x2d # CHECK: move $15, $ra
0x04 0xc1 0x01 0x4c # CHECK: bgez $6, 1332
0x04 0xd1 0x01 0x4c # CHECK: bgezal $6, 1332
0x08 0x00 0x01 0x4c # CHECK: j 1328
diff --git a/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3-el.txt b/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3-el.txt
index 88e9c262a0e..7d59ef6d3e0 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3-el.txt
@@ -165,6 +165,8 @@
0x10 0x28 0x00 0x00 # CHECK: mfhi $5
0x00 0xc0 0x7e 0x44 # CHECK: mfhc1 $fp, $f24
0x12 0x28 0x00 0x00 # CHECK: mflo $5
+0x25 0x78 0xe0 0x03 # CEHCK: move $15, $ra
+0x2d 0x78 0xe0 0x03 # CEHCK: move $15, $ra
0x86 0x41 0x20 0x46 # CHECK: mov.d $f6, $f8
0x86 0x39 0x00 0x46 # CHECK: mov.s $f6, $f7
0x04 0x00 0xc7 0x70 # CHECK: msub $6, $7
diff --git a/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3.txt b/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3.txt
index 82405f357bf..72996522949 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64r3/valid-mips64r3.txt
@@ -63,6 +63,8 @@
0x02 0xc8 0x38 0x2e # CHECK: dsub $7, $22, $8
0x02 0xe9 0x00 0x1c # CHECK: dmult $23, $9
0x03 0x53 0x00 0x1e # CHECK: ddiv $zero, $26, $19
+0x03 0xe0 0x78 0x25 # CHECK: move $15, $ra
+0x03 0xe0 0x78 0x2d # CHECK: move $15, $ra
0x04 0xc1 0x01 0x4c # CHECK: bgez $6, 1332
0x04 0xd1 0x01 0x4c # CHECK: bgezal $6, 1332
0x08 0x00 0x01 0x4c # CHECK: j 1328
diff --git a/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5-el.txt b/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5-el.txt
index bd709d22879..ee6ad1c7194 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5-el.txt
@@ -165,6 +165,8 @@
0x10 0x28 0x00 0x00 # CHECK: mfhi $5
0x00 0xc0 0x7e 0x44 # CHECK: mfhc1 $fp, $f24
0x12 0x28 0x00 0x00 # CHECK: mflo $5
+0x25 0x78 0xe0 0x03 # CEHCK: move $15, $ra
+0x2d 0x78 0xe0 0x03 # CEHCK: move $15, $ra
0x86 0x41 0x20 0x46 # CHECK: mov.d $f6, $f8
0x86 0x39 0x00 0x46 # CHECK: mov.s $f6, $f7
0x04 0x00 0xc7 0x70 # CHECK: msub $6, $7
diff --git a/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5.txt b/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5.txt
index a27fa98c963..4b1810b59e0 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64r5/valid-mips64r5.txt
@@ -63,6 +63,8 @@
0x02 0xc8 0x38 0x2e # CHECK: dsub $7, $22, $8
0x02 0xe9 0x00 0x1c # CHECK: dmult $23, $9
0x03 0x53 0x00 0x1e # CHECK: ddiv $zero, $26, $19
+0x03 0xe0 0x78 0x25 # CHECK: move $15, $ra
+0x03 0xe0 0x78 0x2d # CHECK: move $15, $ra
0x04 0xc1 0x01 0x4c # CHECK: bgez $6, 1332
0x04 0xd1 0x01 0x4c # CHECK: bgezal $6, 1332
0x08 0x00 0x01 0x4c # CHECK: j 1328
diff --git a/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt b/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt
index 157e33593e3..b2bbc64330d 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt
@@ -128,6 +128,8 @@
0x1e 0x10 0x04 0x46 # CHECK: mina.s $f0, $f2, $f4
0xda 0x10 0x64 0x00 # CHECK: mod $2, $3, $4
0xdb 0x10 0x64 0x00 # CHECK: modu $2, $3, $4
+0x25 0x78 0xe0 0x03 # CHECK: move $15, $ra
+0x2d 0x78 0xe0 0x03 # CHECK: move $15, $ra
0x01 0x78 0x89 0x40 # CHECK: mtc0 $9, $15, 1
0x99 0x18 0x24 0x46 # CHECK: msubf.d $f2, $f3, $f4
0x99 0x18 0x04 0x46 # CHECK: msubf.s $f2, $f3, $f4
diff --git a/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt b/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
index 5be21256d28..e6378d24c57 100644
--- a/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
+++ b/llvm/test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
@@ -45,6 +45,8 @@
0x02 0xdc 0x00 0x31 # CHECK: tgeu $22, $gp
0x03 0x20 0x80 0x52 # CHECK: dclz $16, $25
0x03 0x80 0xe8 0x50 # CHECK: clz $sp, $gp
+0x03 0xe0 0x78 0x25 # CHECK: move $15, $ra
+0x03 0xe0 0x78 0x2d # CHECK: move $15, $ra
0x04 0x11 0x14 0x9b # CHECK: bal 21104
0x04 0x66 0x56 0x78 # CHECK: dahi $3, 22136
0x04 0x7e 0xab 0xcd # CHECK: dati $3, -21555
diff --git a/llvm/test/MC/Mips/mips-alu-instructions.s b/llvm/test/MC/Mips/mips-alu-instructions.s
index b25394b39a6..9c133abbae3 100644
--- a/llvm/test/MC/Mips/mips-alu-instructions.s
+++ b/llvm/test/MC/Mips/mips-alu-instructions.s
@@ -91,7 +91,7 @@
# CHECK: addiu $sp, $sp, -40 # encoding: [0xd8,0xff,0xbd,0x27]
# CHECK: neg $6, $7 # encoding: [0x22,0x30,0x07,0x00]
# CHECK: negu $6, $7 # encoding: [0x23,0x30,0x07,0x00]
-# CHECK: move $7, $8 # encoding: [0x21,0x38,0x00,0x01]
+# CHECK: move $7, $8 # encoding: [0x25,0x38,0x00,0x01]
# CHECK: .set push
# CHECK: .set mips32r2
# CHECK: rdhwr $5, $29
diff --git a/llvm/test/MC/Mips/mips1/valid.s b/llvm/test/MC/Mips/mips1/valid.s
index e2feeac4dd5..80f0f8b047c 100644
--- a/llvm/test/MC/Mips/mips1/valid.s
+++ b/llvm/test/MC/Mips/mips1/valid.s
@@ -64,8 +64,8 @@ a:
mflo $s1
mov.d $f20,$f14
mov.s $f2,$f27
- move $s8,$a0
- move $25,$a2
+ move $s8,$a0 # CHECK: move $fp, $4 # encoding: [0x00,0x80,0xf0,0x25]
+ move $25,$a2 # CHECK: move $25, $6 # encoding: [0x00,0xc0,0xc8,0x25]
mtc1 $s8,$f9
mthi $s1
mtlo $sp
diff --git a/llvm/test/MC/Mips/mips2/valid.s b/llvm/test/MC/Mips/mips2/valid.s
index 93fdbafdfcd..c57d386d9d0 100644
--- a/llvm/test/MC/Mips/mips2/valid.s
+++ b/llvm/test/MC/Mips/mips2/valid.s
@@ -84,8 +84,8 @@ a:
mflo $s1
mov.d $f20,$f14
mov.s $f2,$f27
- move $s8,$a0
- move $25,$a2
+ move $s8,$a0 # CHECK: move $fp, $4 # encoding: [0x00,0x80,0xf0,0x25]
+ move $25,$a2 # CHECK: move $25, $6 # encoding: [0x00,0xc0,0xc8,0x25]
mtc1 $s8,$f9
mthi $s1
mtlo $sp
diff --git a/llvm/test/MC/Mips/mips3/valid.s b/llvm/test/MC/Mips/mips3/valid.s
index 1c878c97d15..cf51753712e 100644
--- a/llvm/test/MC/Mips/mips3/valid.s
+++ b/llvm/test/MC/Mips/mips3/valid.s
@@ -142,10 +142,10 @@ a:
mflo $s1
mov.d $f20,$f14
mov.s $f2,$f27
- move $a0,$a3
- move $s5,$a0
- move $s8,$a0
- move $25,$a2
+ move $a0,$a3 # CHECK: move $4, $7 # encoding: [0x00,0xe0,0x20,0x25]
+ move $s5,$a0 # CHECK: move $21, $4 # encoding: [0x00,0x80,0xa8,0x25]
+ move $s8,$a0 # CHECK: move $fp, $4 # encoding: [0x00,0x80,0xf0,0x25]
+ move $25,$a2 # CHECK: move $25, $6 # encoding: [0x00,0xc0,0xc8,0x25]
mtc1 $s8,$f9
mthi $s1
mtlo $sp
diff --git a/llvm/test/MC/Mips/mips32/valid.s b/llvm/test/MC/Mips/mips32/valid.s
index fbe1551f6c2..6958583030a 100644
--- a/llvm/test/MC/Mips/mips32/valid.s
+++ b/llvm/test/MC/Mips/mips32/valid.s
@@ -96,8 +96,8 @@ a:
mflo $s1
mov.d $f20,$f14
mov.s $f2,$f27
- move $s8,$a0
- move $25,$a2
+ move $s8,$a0 # CHECK: move $fp, $4 # encoding: [0x00,0x80,0xf0,0x25]
+ move $25,$a2 # CHECK: move $25, $6 # encoding: [0x00,0xc0,0xc8,0x25]
movf $gp,$8,$fcc7
movf.d $f6,$f11,$fcc5
movf.s $f23,$f5,$fcc6
diff --git a/llvm/test/MC/Mips/mips32r2/valid.s b/llvm/test/MC/Mips/mips32r2/valid.s
index 2e4366ab40f..cd1b749a57e 100644
--- a/llvm/test/MC/Mips/mips32r2/valid.s
+++ b/llvm/test/MC/Mips/mips32r2/valid.s
@@ -111,8 +111,8 @@ a:
mflo $s1
mov.d $f20,$f14
mov.s $f2,$f27
- move $s8,$a0
- move $25,$a2
+ move $s8,$a0 # CHECK: move $fp, $4 # encoding: [0x00,0x80,0xf0,0x25]
+ move $25,$a2 # CHECK: move $25, $6 # encoding: [0x00,0xc0,0xc8,0x25]
movf $gp,$8,$fcc7
movf.d $f6,$f11,$fcc5
movf.s $f23,$f5,$fcc6
diff --git a/llvm/test/MC/Mips/mips32r3/valid.s b/llvm/test/MC/Mips/mips32r3/valid.s
index f6ef1d356c1..f983051c9a6 100644
--- a/llvm/test/MC/Mips/mips32r3/valid.s
+++ b/llvm/test/MC/Mips/mips32r3/valid.s
@@ -111,8 +111,8 @@ a:
mflo $s1
mov.d $f20,$f14
mov.s $f2,$f27
- move $s8,$a0
- move $25,$a2
+ move $s8,$a0 # CHECK: move $fp, $4 # encoding: [0x00,0x80,0xf0,0x25]
+ move $25,$a2 # CHECK: move $25, $6 # encoding: [0x00,0xc0,0xc8,0x25]
movf $gp,$8,$fcc7
movf.d $f6,$f11,$fcc5
movf.s $f23,$f5,$fcc6
diff --git a/llvm/test/MC/Mips/mips32r5/valid.s b/llvm/test/MC/Mips/mips32r5/valid.s
index 3bb8e84ffe0..e0b6db6e38f 100644
--- a/llvm/test/MC/Mips/mips32r5/valid.s
+++ b/llvm/test/MC/Mips/mips32r5/valid.s
@@ -112,8 +112,8 @@ a:
mflo $s1
mov.d $f20,$f14
mov.s $f2,$f27
- move $s8,$a0
- move $25,$a2
+ move $s8,$a0 # CHECK: move $fp, $4 # encoding: [0x00,0x80,0xf0,0x25]
+ move $25,$a2 # CHECK: move $25, $6 # encoding: [0x00,0xc0,0xc8,0x25]
movf $gp,$8,$fcc7
movf.d $f6,$f11,$fcc5
movf.s $f23,$f5,$fcc6
diff --git a/llvm/test/MC/Mips/mips32r6/valid.s b/llvm/test/MC/Mips/mips32r6/valid.s
index 073da85dfde..02805089130 100644
--- a/llvm/test/MC/Mips/mips32r6/valid.s
+++ b/llvm/test/MC/Mips/mips32r6/valid.s
@@ -113,6 +113,10 @@ a:
mfc0 $8,$15,1 # CHECK: mfc0 $8, $15, 1 # encoding: [0x40,0x08,0x78,0x01]
mod $2,$3,$4 # CHECK: mod $2, $3, $4 # encoding: [0x00,0x64,0x10,0xda]
modu $2,$3,$4 # CHECK: modu $2, $3, $4 # encoding: [0x00,0x64,0x10,0xdb]
+ move $a0,$a3 # CHECK: move $4, $7 # encoding: [0x00,0xe0,0x20,0x25]
+ move $s5,$a0 # CHECK: move $21, $4 # encoding: [0x00,0x80,0xa8,0x25]
+ move $s8,$a0 # CHECK: move $fp, $4 # encoding: [0x00,0x80,0xf0,0x25]
+ move $25,$a2 # CHECK: move $25, $6 # encoding: [0x00,0xc0,0xc8,0x25]
mtc0 $9,$15,1 # CHECK: mtc0 $9, $15, 1 # encoding: [0x40,0x89,0x78,0x01]
mul $2,$3,$4 # CHECK: mul $2, $3, $4 # encoding: [0x00,0x64,0x10,0x98]
muh $2,$3,$4 # CHECK: muh $2, $3, $4 # encoding: [0x00,0x64,0x10,0xd8]
diff --git a/llvm/test/MC/Mips/mips4/valid.s b/llvm/test/MC/Mips/mips4/valid.s
index b89026dd714..9bf98d1c29f 100644
--- a/llvm/test/MC/Mips/mips4/valid.s
+++ b/llvm/test/MC/Mips/mips4/valid.s
@@ -150,10 +150,10 @@ a:
mflo $s1
mov.d $f20,$f14
mov.s $f2,$f27
- move $a0,$a3
- move $s5,$a0
- move $s8,$a0
- move $25,$a2
+ move $a0,$a3 # CHECK: move $4, $7 # encoding: [0x00,0xe0,0x20,0x25]
+ move $s5,$a0 # CHECK: move $21, $4 # encoding: [0x00,0x80,0xa8,0x25]
+ move $s8,$a0 # CHECK: move $fp, $4 # encoding: [0x00,0x80,0xf0,0x25]
+ move $25,$a2 # CHECK: move $25, $6 # encoding: [0x00,0xc0,0xc8,0x25]
movf $gp,$8,$fcc7
movf.d $f6,$f11,$fcc5
movf.s $f23,$f5,$fcc6
diff --git a/llvm/test/MC/Mips/mips5/valid.s b/llvm/test/MC/Mips/mips5/valid.s
index b444274d78e..cb30de38c29 100644
--- a/llvm/test/MC/Mips/mips5/valid.s
+++ b/llvm/test/MC/Mips/mips5/valid.s
@@ -151,10 +151,10 @@ a:
mflo $s1
mov.d $f20,$f14
mov.s $f2,$f27
- move $a0,$a3
- move $s5,$a0
- move $s8,$a0
- move $25,$a2
+ move $a0,$a3 # CHECK: move $4, $7 # encoding: [0x00,0xe0,0x20,0x25]
+ move $s5,$a0 # CHECK: move $21, $4 # encoding: [0x00,0x80,0xa8,0x25]
+ move $s8,$a0 # CHECK: move $fp, $4 # encoding: [0x00,0x80,0xf0,0x25]
+ move $25,$a2 # CHECK: move $25, $6 # encoding: [0x00,0xc0,0xc8,0x25]
movf $gp,$8,$fcc7
movf.d $f6,$f11,$fcc5
movf.s $f23,$f5,$fcc6
diff --git a/llvm/test/MC/Mips/mips64-alu-instructions.s b/llvm/test/MC/Mips/mips64-alu-instructions.s
index 19ed1ffad1c..58fd8c2063c 100644
--- a/llvm/test/MC/Mips/mips64-alu-instructions.s
+++ b/llvm/test/MC/Mips/mips64-alu-instructions.s
@@ -84,7 +84,7 @@
# CHECK: dsub $9, $6, $7 # encoding: [0x2e,0x48,0xc7,0x00]
# CHECK: dsubu $4, $3, $5 # encoding: [0x2f,0x20,0x65,0x00]
# CHECK: daddiu $9, $6, -17767 # encoding: [0x99,0xba,0xc9,0x64]
-# CHECK: move $7, $8 # encoding: [0x2d,0x38,0x00,0x01]
+# CHECK: move $7, $8 # encoding: [0x25,0x38,0x00,0x01]
# CHECK: .set push
# CHECK: .set mips32r2
# CHECK: rdhwr $5, $29
diff --git a/llvm/test/MC/Mips/mips64/valid.s b/llvm/test/MC/Mips/mips64/valid.s
index 03ea6c15c33..5a557a77e2b 100644
--- a/llvm/test/MC/Mips/mips64/valid.s
+++ b/llvm/test/MC/Mips/mips64/valid.s
@@ -163,10 +163,10 @@ a:
mflo $s1
mov.d $f20,$f14
mov.s $f2,$f27
- move $a0,$a3
- move $s5,$a0
- move $s8,$a0
- move $25,$a2
+ move $a0,$a3 # CHECK: move $4, $7 # encoding: [0x00,0xe0,0x20,0x25]
+ move $s5,$a0 # CHECK: move $21, $4 # encoding: [0x00,0x80,0xa8,0x25]
+ move $s8,$a0 # CHECK: move $fp, $4 # encoding: [0x00,0x80,0xf0,0x25]
+ move $25,$a2 # CHECK: move $25, $6 # encoding: [0x00,0xc0,0xc8,0x25]
movf $gp,$8,$fcc7
movf.d $f6,$f11,$fcc5
movf.s $f23,$f5,$fcc6
diff --git a/llvm/test/MC/Mips/mips64r2/valid.s b/llvm/test/MC/Mips/mips64r2/valid.s
index 37753ae0a87..3eb55efbebc 100644
--- a/llvm/test/MC/Mips/mips64r2/valid.s
+++ b/llvm/test/MC/Mips/mips64r2/valid.s
@@ -179,10 +179,10 @@ a:
mflo $s1
mov.d $f20,$f14
mov.s $f2,$f27
- move $a0,$a3
- move $s5,$a0
- move $s8,$a0
- move $25,$a2
+ move $a0,$a3 # CHECK: move $4, $7 # encoding: [0x00,0xe0,0x20,0x25]
+ move $s5,$a0 # CHECK: move $21, $4 # encoding: [0x00,0x80,0xa8,0x25]
+ move $s8,$a0 # CHECK: move $fp, $4 # encoding: [0x00,0x80,0xf0,0x25]
+ move $25,$a2 # CHECK: move $25, $6 # encoding: [0x00,0xc0,0xc8,0x25]
movf $gp,$8,$fcc7
movf.d $f6,$f11,$fcc5
movf.s $f23,$f5,$fcc6
diff --git a/llvm/test/MC/Mips/mips64r3/valid.s b/llvm/test/MC/Mips/mips64r3/valid.s
index c5d4848458d..16a85c9376a 100644
--- a/llvm/test/MC/Mips/mips64r3/valid.s
+++ b/llvm/test/MC/Mips/mips64r3/valid.s
@@ -179,10 +179,10 @@ a:
mflo $s1
mov.d $f20,$f14
mov.s $f2,$f27
- move $a0,$a3
- move $s5,$a0
- move $s8,$a0
- move $25,$a2
+ move $a0,$a3 # CHECK: move $4, $7 # encoding: [0x00,0xe0,0x20,0x25]
+ move $s5,$a0 # CHECK: move $21, $4 # encoding: [0x00,0x80,0xa8,0x25]
+ move $s8,$a0 # CHECK: move $fp, $4 # encoding: [0x00,0x80,0xf0,0x25]
+ move $25,$a2 # CHECK: move $25, $6 # encoding: [0x00,0xc0,0xc8,0x25]
movf $gp,$8,$fcc7
movf.d $f6,$f11,$fcc5
movf.s $f23,$f5,$fcc6
diff --git a/llvm/test/MC/Mips/mips64r5/valid.s b/llvm/test/MC/Mips/mips64r5/valid.s
index c570b3e24aa..21728735a13 100644
--- a/llvm/test/MC/Mips/mips64r5/valid.s
+++ b/llvm/test/MC/Mips/mips64r5/valid.s
@@ -180,10 +180,10 @@ a:
mflo $s1
mov.d $f20,$f14
mov.s $f2,$f27
- move $a0,$a3
- move $s5,$a0
- move $s8,$a0
- move $25,$a2
+ move $a0,$a3 # CHECK: move $4, $7 # encoding: [0x00,0xe0,0x20,0x25]
+ move $s5,$a0 # CHECK: move $21, $4 # encoding: [0x00,0x80,0xa8,0x25]
+ move $s8,$a0 # CHECK: move $fp, $4 # encoding: [0x00,0x80,0xf0,0x25]
+ move $25,$a2 # CHECK: move $25, $6 # encoding: [0x00,0xc0,0xc8,0x25]
movf $gp,$8,$fcc7
movf.d $f6,$f11,$fcc5
movf.s $f23,$f5,$fcc6
diff --git a/llvm/test/MC/Mips/mips64r6/valid.s b/llvm/test/MC/Mips/mips64r6/valid.s
index 6249d51781c..0c6fdbc3802 100644
--- a/llvm/test/MC/Mips/mips64r6/valid.s
+++ b/llvm/test/MC/Mips/mips64r6/valid.s
@@ -164,6 +164,10 @@ a:
mfc0 $8,$15,1 # CHECK: mfc0 $8, $15, 1 # encoding: [0x40,0x08,0x78,0x01]
mod $2,$3,$4 # CHECK: mod $2, $3, $4 # encoding: [0x00,0x64,0x10,0xda]
modu $2,$3,$4 # CHECK: modu $2, $3, $4 # encoding: [0x00,0x64,0x10,0xdb]
+ move $a0,$a3 # CHECK: move $4, $7 # encoding: [0x00,0xe0,0x20,0x25]
+ move $s5,$a0 # CHECK: move $21, $4 # encoding: [0x00,0x80,0xa8,0x25]
+ move $s8,$a0 # CHECK: move $fp, $4 # encoding: [0x00,0x80,0xf0,0x25]
+ move $25,$a2 # CHECK: move $25, $6 # encoding: [0x00,0xc0,0xc8,0x25]
mtc0 $9,$15,1 # CHECK: mtc0 $9, $15, 1 # encoding: [0x40,0x89,0x78,0x01]
msubf.d $f2,$f3,$f4 # CHECK: msubf.d $f2, $f3, $f4 # encoding: [0x46,0x24,0x18,0x99]
msubf.s $f2,$f3,$f4 # CHECK: msubf.s $f2, $f3, $f4 # encoding: [0x46,0x04,0x18,0x99]
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