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-rw-r--r--llvm/test/CodeGen/AArch64/sign-return-address.ll22
-rw-r--r--llvm/test/CodeGen/MIR/AArch64/cfi.mir2
-rw-r--r--llvm/test/tools/llvm-dwarfdump/X86/verify_debug_info.s2
3 files changed, 12 insertions, 14 deletions
diff --git a/llvm/test/CodeGen/AArch64/sign-return-address.ll b/llvm/test/CodeGen/AArch64/sign-return-address.ll
index 6515dcaf773..a0c73058a30 100644
--- a/llvm/test/CodeGen/AArch64/sign-return-address.ll
+++ b/llvm/test/CodeGen/AArch64/sign-return-address.ll
@@ -24,17 +24,17 @@ define i32 @leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" {
; CHECK-LABEL: @leaf_sign_all
; CHECK: paciasp
; CHECK: autiasp
-; CHECK: ret
+; CHECK-NEXT: ret
define i32 @leaf_sign_all(i32 %x) "sign-return-address"="all" {
ret i32 %x
}
; CHECK: @leaf_clobbers_lr
; CHECK: paciasp
-; CHECK: str x30, [sp, #-16]!
+; CHECK-NEXT: str x30, [sp, #-16]!
; CHECK: ldr x30, [sp], #16
; CHECK-NEXT: autiasp
-; CHECK: ret
+; CHECK-NEXT: ret
define i64 @leaf_clobbers_lr(i64 %x) "sign-return-address"="non-leaf" {
call void asm sideeffect "mov x30, $0", "r,~{lr}"(i64 %x) #1
ret i64 %x
@@ -45,7 +45,7 @@ declare i32 @foo(i32)
; CHECK: @non_leaf_sign_all
; CHECK: paciasp
; CHECK: autiasp
-; CHECK: ret
+; CHECK-NEXT: ret
define i32 @non_leaf_sign_all(i32 %x) "sign-return-address"="all" {
%call = call i32 @foo(i32 %x)
ret i32 %call
@@ -53,10 +53,10 @@ define i32 @non_leaf_sign_all(i32 %x) "sign-return-address"="all" {
; CHECK: @non_leaf_sign_non_leaf
; CHECK: paciasp
-; CHECK: str x30, [sp, #-16]!
+; CHECK-NEXT: str x30, [sp, #-16]!
; CHECK: ldr x30, [sp], #16
-; CHECK: autiasp
-; CHECK: ret
+; CHECK-NEXT: autiasp
+; CHECK-NEXT: ret
define i32 @non_leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" {
%call = call i32 @foo(i32 %x)
ret i32 %call
@@ -65,7 +65,7 @@ define i32 @non_leaf_sign_non_leaf(i32 %x) "sign-return-address"="non-leaf" {
; CHECK-LABEL: @leaf_sign_all_v83
; CHECK: paciasp
; CHECK-NOT: ret
-; CHECK: retaa
+; CHECK-NEXT: retaa
; CHECK-NOT: ret
define i32 @leaf_sign_all_v83(i32 %x) "sign-return-address"="all" "target-features"="+v8.3a" {
ret i32 %x
@@ -75,10 +75,10 @@ declare fastcc i64 @bar(i64)
; CHECK-LABEL: @spill_lr_and_tail_call
; CHECK: paciasp
-; CHECK: str x30, [sp, #-16]!
+; CHECK-NEXT: str x30, [sp, #-16]!
; CHECK: ldr x30, [sp], #16
-; CHECK: autiasp
-; CHECK: b bar
+; CHECK-NEXT: autiasp
+; CHECK-NEXT: b bar
define fastcc void @spill_lr_and_tail_call(i64 %x) "sign-return-address"="all" {
call void asm sideeffect "mov x30, $0", "r,~{lr}"(i64 %x) #1
tail call fastcc i64 @bar(i64 %x)
diff --git a/llvm/test/CodeGen/MIR/AArch64/cfi.mir b/llvm/test/CodeGen/MIR/AArch64/cfi.mir
index 04380e07f3e..747d58eb320 100644
--- a/llvm/test/CodeGen/MIR/AArch64/cfi.mir
+++ b/llvm/test/CodeGen/MIR/AArch64/cfi.mir
@@ -45,6 +45,4 @@ body: |
; CHECK: CFI_INSTRUCTION escape 0x61, 0x62, 0x63
CFI_INSTRUCTION window_save
; CHECK: CFI_INSTRUCTION window_save
- CFI_INSTRUCTION negate_ra_sign_state
- ; CHECK: CFI_INSTRUCTION negate_ra_sign_state
RET_ReallyLR
diff --git a/llvm/test/tools/llvm-dwarfdump/X86/verify_debug_info.s b/llvm/test/tools/llvm-dwarfdump/X86/verify_debug_info.s
index b6bc6a956a9..e5a748b89f9 100644
--- a/llvm/test/tools/llvm-dwarfdump/X86/verify_debug_info.s
+++ b/llvm/test/tools/llvm-dwarfdump/X86/verify_debug_info.s
@@ -15,7 +15,7 @@
# CHECK-NEXT: 0x0000002b: DW_TAG_subprogram [2] *
# CHECK-NEXT: DW_AT_low_pc [DW_FORM_addr] (0x0000000000000000)
# CHECK-NEXT: DW_AT_high_pc [DW_FORM_data4] (0x00000016)
-# CHECK-NEXT: DW_AT_frame_base [DW_FORM_exprloc] (DW_OP_reg6 RBP)
+# CHECK-NEXT: DW_AT_frame_base [DW_FORM_exprloc] (DW_OP_reg6)
# CHECK-NEXT: DW_AT_name [DW_FORM_strp] ( .debug_str[0x00000061] = "main")
# CHECK-NEXT: DW_AT_decl_file [DW_FORM_data1] (0x01)
# CHECK-NEXT: DW_AT_decl_line [DW_FORM_data1] (1)
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