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-rw-r--r--llvm/test/CodeGen/Hexagon/regalloc-liveout-undef.mir35
1 files changed, 35 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/Hexagon/regalloc-liveout-undef.mir b/llvm/test/CodeGen/Hexagon/regalloc-liveout-undef.mir
new file mode 100644
index 00000000000..6a41514b060
--- /dev/null
+++ b/llvm/test/CodeGen/Hexagon/regalloc-liveout-undef.mir
@@ -0,0 +1,35 @@
+# RUN: llc -march=hexagon -run-pass liveintervals -run-pass machineverifier -run-pass simple-register-coalescing %s -o - | FileCheck %s
+#
+# If there is no consumer of the live intervals, the live intervals pass
+# will be freed immediately after it runs, before the verifier. Add a
+# user (register coalescer in this case), so that the verification will
+# cover live intervals as well.
+#
+# Make sure that this compiles successfully.
+# CHECK: undef %1.isub_lo = A2_addi %1.isub_lo, 1
+
+---
+name: fred
+tracksRegLiveness: true
+
+registers:
+ - { id: 0, class: intregs }
+ - { id: 1, class: doubleregs }
+ - { id: 2, class: predregs }
+ - { id: 3, class: doubleregs }
+body: |
+ bb.0:
+ liveins: %d0
+ successors: %bb.1
+ %0 = IMPLICIT_DEF
+ %1 = COPY %d0
+
+ bb.1:
+ successors: %bb.1
+ %2 = C2_cmpgt %0, %1.isub_lo
+ %3 = COPY %1
+ %1 = COPY %3
+ undef %1.isub_lo = A2_addi %1.isub_lo, 1
+ J2_jump %bb.1, implicit-def %pc
+...
+
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