diff options
Diffstat (limited to 'llvm/test')
-rw-r--r-- | llvm/test/MC/Disassembler/Mips/micromips64r6/valid.txt | 6 | ||||
-rw-r--r-- | llvm/test/MC/Mips/micromips/invalid-wrong-error.s | 12 | ||||
-rw-r--r-- | llvm/test/MC/Mips/mips-control-instructions.s | 6 | ||||
-rw-r--r-- | llvm/test/MC/Mips/mips1/valid.s | 2 | ||||
-rw-r--r-- | llvm/test/MC/Mips/mips2/valid.s | 2 | ||||
-rw-r--r-- | llvm/test/MC/Mips/mips3/valid.s | 2 | ||||
-rw-r--r-- | llvm/test/MC/Mips/mips32/valid.s | 2 | ||||
-rw-r--r-- | llvm/test/MC/Mips/mips32r2/invalid.s | 4 | ||||
-rw-r--r-- | llvm/test/MC/Mips/mips32r2/valid.s | 2 | ||||
-rw-r--r-- | llvm/test/MC/Mips/mips32r3/valid.s | 2 | ||||
-rw-r--r-- | llvm/test/MC/Mips/mips32r5/valid.s | 2 | ||||
-rw-r--r-- | llvm/test/MC/Mips/mips32r6/valid.s | 2 | ||||
-rw-r--r-- | llvm/test/MC/Mips/mips4/valid.s | 2 | ||||
-rw-r--r-- | llvm/test/MC/Mips/mips5/valid.s | 2 | ||||
-rw-r--r-- | llvm/test/MC/Mips/mips64/valid.s | 2 | ||||
-rw-r--r-- | llvm/test/MC/Mips/mips64extins.ll | 6 | ||||
-rw-r--r-- | llvm/test/MC/Mips/mips64r2/valid.s | 2 | ||||
-rw-r--r-- | llvm/test/MC/Mips/mips64r3/valid.s | 2 | ||||
-rw-r--r-- | llvm/test/MC/Mips/mips64r5/valid.s | 2 | ||||
-rw-r--r-- | llvm/test/MC/Mips/mips64r6/valid.s | 2 |
20 files changed, 52 insertions, 12 deletions
diff --git a/llvm/test/MC/Disassembler/Mips/micromips64r6/valid.txt b/llvm/test/MC/Disassembler/Mips/micromips64r6/valid.txt index c3f977514d0..fb8284d87c1 100644 --- a/llvm/test/MC/Disassembler/Mips/micromips64r6/valid.txt +++ b/llvm/test/MC/Disassembler/Mips/micromips64r6/valid.txt @@ -25,8 +25,8 @@ 0x42 0x23 0x00 0x04 # CHECK: dahi $3, 4 0x42 0x03 0x00 0x04 # CHECK: dati $3, 4 0x59 0x26 0x30 0xec # CHECK: dext $9, $6, 3, 7 -0x59 0x26 0x30 0xe4 # CHECK: dextm $9, $6, 3, 7 -0x59 0x26 0x30 0xd4 # CHECK: dextu $9, $6, 3, 7 +0x59 0x26 0x30 0xe4 # CHECK: dextm $9, $6, 3, 39 +0x59 0x26 0x30 0xd4 # CHECK: dextu $9, $6, 35, 7 0x58 0x43 0x25 0x1c # CHECK: dalign $4, $2, $3, 5 0x58 0x64 0x29 0x18 # CHECK: ddiv $3, $4, $5 0x58 0x64 0x29 0x58 # CHECK: dmod $3, $4, $5 @@ -171,6 +171,6 @@ 0x00 0x0f 0x47 0x7c # CHECK: di $15 0x00 0x00 0x43 0x7c # CHECK: tlbinv 0x00 0x00 0x53 0x7c # CHECK: tlbinvf -0x58 0x82 0x20 0x34 # CHECK: dinsu $4, $2, 0, 5 +0x58 0x82 0x20 0x34 # CHECK: dinsu $4, $2, 32, 5 0x58 0x82 0x38 0xc4 # CHECK: dinsm $4, $2, 3, 5 0x58 0x82 0x38 0xcc # CHECK: dins $4, $2, 3, 5 diff --git a/llvm/test/MC/Mips/micromips/invalid-wrong-error.s b/llvm/test/MC/Mips/micromips/invalid-wrong-error.s new file mode 100644 index 00000000000..36edaa63cb0 --- /dev/null +++ b/llvm/test/MC/Mips/micromips/invalid-wrong-error.s @@ -0,0 +1,12 @@ +# Instructions that are correctly rejected but emit a wrong or misleading error. +# RUN: not llvm-mc %s -triple=mips -show-encoding -mattr=micromips 2>%t1 +# RUN: FileCheck %s < %t1 + + # The 20-bit immediate supported by the standard encodings cause us to emit + # the diagnostic for the 20-bit form. This isn't exactly wrong but it is + # misleading. Ideally, we'd emit every way to achieve a valid match instead + # of picking only one. + sdbbp -1 # CHECK: :[[@LINE]]:9: error: expected 20-bit unsigned immediate + sdbbp 1024 # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled + syscall -1 # CHECK: :[[@LINE]]:11: error: expected 20-bit unsigned immediate + syscall 1024 # CHECK: :[[@LINE]]:3: error: instruction requires a CPU feature not currently enabled diff --git a/llvm/test/MC/Mips/mips-control-instructions.s b/llvm/test/MC/Mips/mips-control-instructions.s index 47da8ccca3c..03b8ed26a5c 100644 --- a/llvm/test/MC/Mips/mips-control-instructions.s +++ b/llvm/test/MC/Mips/mips-control-instructions.s @@ -6,8 +6,6 @@ # CHECK32: break # encoding: [0x00,0x00,0x00,0x0d] # CHECK32: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK32: break 7, 5 # encoding: [0x00,0x07,0x01,0x4d] -# CHECK32: syscall # encoding: [0x00,0x00,0x00,0x0c] -# CHECK32: syscall 13396 # encoding: [0x00,0x0d,0x15,0x0c] # CHECK32: eret # encoding: [0x42,0x00,0x00,0x18] # CHECK32: deret # encoding: [0x42,0x00,0x00,0x1f] # CHECK32: di # encoding: [0x41,0x60,0x60,0x00] @@ -39,8 +37,6 @@ # CHECK64: break # encoding: [0x00,0x00,0x00,0x0d] # CHECK64: break 7 # encoding: [0x00,0x07,0x00,0x0d] # CHECK64: break 7, 5 # encoding: [0x00,0x07,0x01,0x4d] -# CHECK64: syscall # encoding: [0x00,0x00,0x00,0x0c] -# CHECK64: syscall 13396 # encoding: [0x00,0x0d,0x15,0x0c] # CHECK64: eret # encoding: [0x42,0x00,0x00,0x18] # CHECK64: deret # encoding: [0x42,0x00,0x00,0x1f] # CHECK64: di # encoding: [0x41,0x60,0x60,0x00] @@ -72,8 +68,6 @@ break break 7 break 7,5 - syscall - syscall 0x3454 eret deret di diff --git a/llvm/test/MC/Mips/mips1/valid.s b/llvm/test/MC/Mips/mips1/valid.s index 2a4de302e84..702e3991149 100644 --- a/llvm/test/MC/Mips/mips1/valid.s +++ b/llvm/test/MC/Mips/mips1/valid.s @@ -117,6 +117,8 @@ a: swc3 $10,-32265($k0) swl $15,13694($s3) swr $s1,-26590($14) + syscall # CHECK: syscall # encoding: [0x00,0x00,0x00,0x0c] + syscall 256 # CHECK: syscall 256 # encoding: [0x00,0x00,0x40,0x0c] tlbp # CHECK: tlbp # encoding: [0x42,0x00,0x00,0x08] tlbr # CHECK: tlbr # encoding: [0x42,0x00,0x00,0x01] tlbwi # CHECK: tlbwi # encoding: [0x42,0x00,0x00,0x02] diff --git a/llvm/test/MC/Mips/mips2/valid.s b/llvm/test/MC/Mips/mips2/valid.s index 700a6914ca4..a6a3b1c354c 100644 --- a/llvm/test/MC/Mips/mips2/valid.s +++ b/llvm/test/MC/Mips/mips2/valid.s @@ -146,6 +146,8 @@ a: swl $15,13694($s3) swr $s1,-26590($14) sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] + syscall # CHECK: syscall # encoding: [0x00,0x00,0x00,0x0c] + syscall 256 # CHECK: syscall 256 # encoding: [0x00,0x00,0x40,0x0c] teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] teqi $s5,-17504 diff --git a/llvm/test/MC/Mips/mips3/valid.s b/llvm/test/MC/Mips/mips3/valid.s index a8a3c048af3..56b0654a368 100644 --- a/llvm/test/MC/Mips/mips3/valid.s +++ b/llvm/test/MC/Mips/mips3/valid.s @@ -210,6 +210,8 @@ a: swl $15,13694($s3) swr $s1,-26590($14) sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] + syscall # CHECK: syscall # encoding: [0x00,0x00,0x00,0x0c] + syscall 256 # CHECK: syscall 256 # encoding: [0x00,0x00,0x40,0x0c] teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] teqi $s5,-17504 diff --git a/llvm/test/MC/Mips/mips32/valid.s b/llvm/test/MC/Mips/mips32/valid.s index cddd9e8c078..6328e56830f 100644 --- a/llvm/test/MC/Mips/mips32/valid.s +++ b/llvm/test/MC/Mips/mips32/valid.s @@ -176,6 +176,8 @@ a: swr $s1,-26590($14) sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] sync 1 # CHECK: sync 1 # encoding: [0x00,0x00,0x00,0x4f] + syscall # CHECK: syscall # encoding: [0x00,0x00,0x00,0x0c] + syscall 256 # CHECK: syscall 256 # encoding: [0x00,0x00,0x40,0x0c] teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] teqi $s5,-17504 diff --git a/llvm/test/MC/Mips/mips32r2/invalid.s b/llvm/test/MC/Mips/mips32r2/invalid.s index 9eb9fff5ac4..6254a9abdba 100644 --- a/llvm/test/MC/Mips/mips32r2/invalid.s +++ b/llvm/test/MC/Mips/mips32r2/invalid.s @@ -24,12 +24,16 @@ ori $2, $3, 65536 # CHECK: :[[@LINE]]:21: error: expected 16-bit unsigned immediate pref -1, 255($7) # CHECK: :[[@LINE]]:14: error: expected 5-bit unsigned immediate pref 32, 255($7) # CHECK: :[[@LINE]]:14: error: expected 5-bit unsigned immediate + sdbbp -1 # CHECK: :[[@LINE]]:15: error: expected 20-bit unsigned immediate + sdbbp 1048576 # CHECK: :[[@LINE]]:15: error: expected 20-bit unsigned immediate sll $2, $3, -1 # CHECK: :[[@LINE]]:21: error: expected 5-bit unsigned immediate sll $2, $3, 32 # CHECK: :[[@LINE]]:21: error: expected 5-bit unsigned immediate srl $2, $3, -1 # CHECK: :[[@LINE]]:21: error: expected 5-bit unsigned immediate srl $2, $3, 32 # CHECK: :[[@LINE]]:21: error: expected 5-bit unsigned immediate sra $2, $3, -1 # CHECK: :[[@LINE]]:21: error: expected 5-bit unsigned immediate sra $2, $3, 32 # CHECK: :[[@LINE]]:21: error: expected 5-bit unsigned immediate + syscall -1 # CHECK: :[[@LINE]]:17: error: expected 20-bit unsigned immediate + syscall 1048576 # CHECK: :[[@LINE]]:17: error: expected 20-bit unsigned immediate rotr $2, $3, -1 # CHECK: :[[@LINE]]:22: error: expected 5-bit unsigned immediate rotr $2, $3, 32 # CHECK: :[[@LINE]]:22: error: expected 5-bit unsigned immediate xori $2, $3, -1 # CHECK: :[[@LINE]]:22: error: expected 16-bit unsigned immediate diff --git a/llvm/test/MC/Mips/mips32r2/valid.s b/llvm/test/MC/Mips/mips32r2/valid.s index 858da4a970e..70d50439e73 100644 --- a/llvm/test/MC/Mips/mips32r2/valid.s +++ b/llvm/test/MC/Mips/mips32r2/valid.s @@ -213,6 +213,8 @@ a: swxc1 $f19,$12($k0) sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] sync 1 # CHECK: sync 1 # encoding: [0x00,0x00,0x00,0x4f] + syscall # CHECK: syscall # encoding: [0x00,0x00,0x00,0x0c] + syscall 256 # CHECK: syscall 256 # encoding: [0x00,0x00,0x40,0x0c] teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] teqi $s5,-17504 diff --git a/llvm/test/MC/Mips/mips32r3/valid.s b/llvm/test/MC/Mips/mips32r3/valid.s index 2aab512857d..9408c94d96b 100644 --- a/llvm/test/MC/Mips/mips32r3/valid.s +++ b/llvm/test/MC/Mips/mips32r3/valid.s @@ -213,6 +213,8 @@ a: swxc1 $f19,$12($k0) sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] sync 1 # CHECK: sync 1 # encoding: [0x00,0x00,0x00,0x4f] + syscall # CHECK: syscall # encoding: [0x00,0x00,0x00,0x0c] + syscall 256 # CHECK: syscall 256 # encoding: [0x00,0x00,0x40,0x0c] teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] teqi $s5,-17504 diff --git a/llvm/test/MC/Mips/mips32r5/valid.s b/llvm/test/MC/Mips/mips32r5/valid.s index 894803096b8..5fbdfc7fd41 100644 --- a/llvm/test/MC/Mips/mips32r5/valid.s +++ b/llvm/test/MC/Mips/mips32r5/valid.s @@ -214,6 +214,8 @@ a: swxc1 $f19,$12($k0) sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] sync 1 # CHECK: sync 1 # encoding: [0x00,0x00,0x00,0x4f] + syscall # CHECK: syscall # encoding: [0x00,0x00,0x00,0x0c] + syscall 256 # CHECK: syscall 256 # encoding: [0x00,0x00,0x40,0x0c] teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] teqi $s5,-17504 diff --git a/llvm/test/MC/Mips/mips32r6/valid.s b/llvm/test/MC/Mips/mips32r6/valid.s index e4786d0e4ec..ad96a3fda3a 100644 --- a/llvm/test/MC/Mips/mips32r6/valid.s +++ b/llvm/test/MC/Mips/mips32r6/valid.s @@ -177,6 +177,8 @@ a: sdbbp 34 # CHECK: sdbbp 34 # encoding: [0x00,0x00,0x08,0x8e] sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] sync 1 # CHECK: sync 1 # encoding: [0x00,0x00,0x00,0x4f] + syscall # CHECK: syscall # encoding: [0x00,0x00,0x00,0x0c] + syscall 256 # CHECK: syscall 256 # encoding: [0x00,0x00,0x40,0x0c] teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] tge $7,$10 # CHECK: tge $7, $10 # encoding: [0x00,0xea,0x00,0x30] diff --git a/llvm/test/MC/Mips/mips4/valid.s b/llvm/test/MC/Mips/mips4/valid.s index 12b5ec8201c..625453dded6 100644 --- a/llvm/test/MC/Mips/mips4/valid.s +++ b/llvm/test/MC/Mips/mips4/valid.s @@ -239,6 +239,8 @@ a: swr $s1,-26590($14) swxc1 $f19,$12($k0) sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] + syscall # CHECK: syscall # encoding: [0x00,0x00,0x00,0x0c] + syscall 256 # CHECK: syscall 256 # encoding: [0x00,0x00,0x40,0x0c] teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] teqi $s5,-17504 diff --git a/llvm/test/MC/Mips/mips5/valid.s b/llvm/test/MC/Mips/mips5/valid.s index a3f3f05831c..272bef3b008 100644 --- a/llvm/test/MC/Mips/mips5/valid.s +++ b/llvm/test/MC/Mips/mips5/valid.s @@ -241,6 +241,8 @@ a: swr $s1,-26590($14) swxc1 $f19,$12($k0) sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] + syscall # CHECK: syscall # encoding: [0x00,0x00,0x00,0x0c] + syscall 256 # CHECK: syscall 256 # encoding: [0x00,0x00,0x40,0x0c] teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] teqi $s5,-17504 diff --git a/llvm/test/MC/Mips/mips64/valid.s b/llvm/test/MC/Mips/mips64/valid.s index f03ae7a50c1..173945b0823 100644 --- a/llvm/test/MC/Mips/mips64/valid.s +++ b/llvm/test/MC/Mips/mips64/valid.s @@ -260,6 +260,8 @@ a: swxc1 $f19,$12($k0) sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] sync 1 # CHECK: sync 1 # encoding: [0x00,0x00,0x00,0x4f] + syscall # CHECK: syscall # encoding: [0x00,0x00,0x00,0x0c] + syscall 256 # CHECK: syscall 256 # encoding: [0x00,0x00,0x40,0x0c] teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] teqi $s5,-17504 diff --git a/llvm/test/MC/Mips/mips64extins.ll b/llvm/test/MC/Mips/mips64extins.ll index 093bc87b90b..4521bfb68ef 100644 --- a/llvm/test/MC/Mips/mips64extins.ll +++ b/llvm/test/MC/Mips/mips64extins.ll @@ -12,7 +12,7 @@ entry: define i64 @dextu(i64 %i) nounwind readnone { entry: -; CHECK: dextu ${{[0-9]+}}, ${{[0-9]+}}, 2, 6 +; CHECK: dextu ${{[0-9]+}}, ${{[0-9]+}}, 34, 6 %shr = lshr i64 %i, 34 %and = and i64 %shr, 63 ret i64 %and @@ -20,7 +20,7 @@ entry: define i64 @dextm(i64 %i) nounwind readnone { entry: -; CHECK: dextm ${{[0-9]+}}, ${{[0-9]+}}, 5, 2 +; CHECK: dextm ${{[0-9]+}}, ${{[0-9]+}}, 5, 34 %shr = lshr i64 %i, 5 %and = and i64 %shr, 17179869183 ret i64 %and @@ -48,7 +48,7 @@ entry: define i64 @dinsu(i64 %i, i64 %j) nounwind readnone { entry: -; CHECK: dinsu ${{[0-9]+}}, ${{[0-9]+}}, 8, 13 +; CHECK: dinsu ${{[0-9]+}}, ${{[0-9]+}}, 40, 13 %shl4 = shl i64 %j, 40 %and = and i64 %shl4, 9006099743113216 %and5 = and i64 %i, -9006099743113217 diff --git a/llvm/test/MC/Mips/mips64r2/valid.s b/llvm/test/MC/Mips/mips64r2/valid.s index 815e6f0b1c2..a7af903a9d4 100644 --- a/llvm/test/MC/Mips/mips64r2/valid.s +++ b/llvm/test/MC/Mips/mips64r2/valid.s @@ -286,6 +286,8 @@ a: swxc1 $f19,$12($k0) sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] sync 1 # CHECK: sync 1 # encoding: [0x00,0x00,0x00,0x4f] + syscall # CHECK: syscall # encoding: [0x00,0x00,0x00,0x0c] + syscall 256 # CHECK: syscall 256 # encoding: [0x00,0x00,0x40,0x0c] teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] teqi $s5,-17504 diff --git a/llvm/test/MC/Mips/mips64r3/valid.s b/llvm/test/MC/Mips/mips64r3/valid.s index 397d247484c..1c8edba5f44 100644 --- a/llvm/test/MC/Mips/mips64r3/valid.s +++ b/llvm/test/MC/Mips/mips64r3/valid.s @@ -286,6 +286,8 @@ a: swxc1 $f19,$12($k0) sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] sync 1 # CHECK: sync 1 # encoding: [0x00,0x00,0x00,0x4f] + syscall # CHECK: syscall # encoding: [0x00,0x00,0x00,0x0c] + syscall 256 # CHECK: syscall 256 # encoding: [0x00,0x00,0x40,0x0c] teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] teqi $s5,-17504 diff --git a/llvm/test/MC/Mips/mips64r5/valid.s b/llvm/test/MC/Mips/mips64r5/valid.s index 34682165e88..1c4f8380629 100644 --- a/llvm/test/MC/Mips/mips64r5/valid.s +++ b/llvm/test/MC/Mips/mips64r5/valid.s @@ -287,6 +287,8 @@ a: swxc1 $f19,$12($k0) sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] sync 1 # CHECK: sync 1 # encoding: [0x00,0x00,0x00,0x4f] + syscall # CHECK: syscall # encoding: [0x00,0x00,0x00,0x0c] + syscall 256 # CHECK: syscall 256 # encoding: [0x00,0x00,0x40,0x0c] teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] teqi $s5,-17504 diff --git a/llvm/test/MC/Mips/mips64r6/valid.s b/llvm/test/MC/Mips/mips64r6/valid.s index cbe3e8232dc..e5564f59635 100644 --- a/llvm/test/MC/Mips/mips64r6/valid.s +++ b/llvm/test/MC/Mips/mips64r6/valid.s @@ -204,6 +204,8 @@ a: swc2 $25,304($s0) # CHECK: swc2 $25, 304($16) # encoding: [0x49,0x79,0x81,0x30] sync # CHECK: sync # encoding: [0x00,0x00,0x00,0x0f] sync 1 # CHECK: sync 1 # encoding: [0x00,0x00,0x00,0x4f] + syscall # CHECK: syscall # encoding: [0x00,0x00,0x00,0x0c] + syscall 256 # CHECK: syscall 256 # encoding: [0x00,0x00,0x40,0x0c] teq $0,$3 # CHECK: teq $zero, $3 # encoding: [0x00,0x03,0x00,0x34] teq $5,$7,620 # CHECK: teq $5, $7, 620 # encoding: [0x00,0xa7,0x9b,0x34] tge $5,$19,340 # CHECK: tge $5, $19, 340 # encoding: [0x00,0xb3,0x55,0x30] |