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-rw-r--r--llvm/test/CodeGen/Hexagon/cext-check.ll4
-rw-r--r--llvm/test/MC/Disassembler/Hexagon/ld.txt12
2 files changed, 14 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/Hexagon/cext-check.ll b/llvm/test/CodeGen/Hexagon/cext-check.ll
index bad51cf3b94..b7181d803f7 100644
--- a/llvm/test/CodeGen/Hexagon/cext-check.ll
+++ b/llvm/test/CodeGen/Hexagon/cext-check.ll
@@ -2,9 +2,9 @@
; Check that we constant extended instructions only when necessary.
define i32 @cext_test1(i32* %a) nounwind {
-; CHECK: r{{[0-9]+}}{{ *}}={{ *}}memw(r{{[0-9]+}}+##8000)
+; CHECK: r{{[0-9]+}}{{ *}}={{ *}}memw(r{{[0-9]+}}{{ *}}+{{ *}}##8000)
; CHECK: r{{[0-9]+}}{{ *}}={{ *}}add(r{{[0-9]+}}{{ *}},{{ *}}##300000)
-; CHECK-NOT: r{{[0-9]+}}{{ *}}={{ *}}memw(r{{[0-9]+}}+##4092)
+; CHECK-NOT: r{{[0-9]+}}{{ *}}={{ *}}memw(r{{[0-9]+}}{{ *}}+{{ *}}##4092)
; CHECK-NOT: r{{[0-9]+}}{{ *}}={{ *}}add(r{{[0-9]+}}{{ *}},{{ *}}##300)
entry:
%0 = load i32* %a, align 4
diff --git a/llvm/test/MC/Disassembler/Hexagon/ld.txt b/llvm/test/MC/Disassembler/Hexagon/ld.txt
index abee596630a..db038472431 100644
--- a/llvm/test/MC/Disassembler/Hexagon/ld.txt
+++ b/llvm/test/MC/Disassembler/Hexagon/ld.txt
@@ -38,3 +38,15 @@
0x03 0x40 0x45 0x85 0xb1 0xda 0x75 0x47
# CHECK: p3 = r5
# CHECK-NEXT: if (!p3.new) r17 = memuh(r21 + #42)
+0xb1 0xc2 0x95 0x91
+# CHECK: r17 = memw(r21 + #84)
+0xb1 0xda 0x95 0x41
+# CHECK: if (p3) r17 = memw(r21 + #84)
+0xb1 0xda 0x95 0x45
+# CHECK: if (!p3) r17 = memw(r21 + #84)
+0x03 0x40 0x45 0x85 0xb1 0xda 0x95 0x43
+# CHECK: p3 = r5
+# CHECK-NEXT: if (p3.new) r17 = memw(r21 + #84)
+0x03 0x40 0x45 0x85 0xb1 0xda 0x95 0x47
+# CHECK: p3 = r5
+# CHECK-NEXT: if (!p3.new) r17 = memw(r21 + #84)
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