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-rw-r--r--llvm/test/Transforms/InstCombine/icmp-shl-nsw.ll24
-rw-r--r--llvm/test/Transforms/InstCombine/icmp-shr-lt-gt.ll21
-rw-r--r--llvm/test/Transforms/InstCombine/icmp_sdiv_with_and_without_range.ll6
-rw-r--r--llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll3
4 files changed, 21 insertions, 33 deletions
diff --git a/llvm/test/Transforms/InstCombine/icmp-shl-nsw.ll b/llvm/test/Transforms/InstCombine/icmp-shl-nsw.ll
index ba05302897e..942790cc9bb 100644
--- a/llvm/test/Transforms/InstCombine/icmp-shl-nsw.ll
+++ b/llvm/test/Transforms/InstCombine/icmp-shl-nsw.ll
@@ -69,11 +69,9 @@ define <2 x i1> @icmp_shl_nsw_eq_vec(<2 x i32> %x) {
; icmp sgt with shl nsw with a constant compare operand and constant
; shift amount can always be reduced to icmp sgt alone.
-; Known bits analysis turns this into an equality predicate.
-
define i1 @icmp_sgt1(i8 %x) {
; CHECK-LABEL: @icmp_sgt1(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 %x, -64
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 %x, -64
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl nsw i8 %x, 1
@@ -144,11 +142,10 @@ define i1 @icmp_sgt7(i8 %x) {
ret i1 %cmp
}
-; Known bits analysis turns this into an equality predicate.
define i1 @icmp_sgt8(i8 %x) {
; CHECK-LABEL: @icmp_sgt8(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 %x, 63
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 %x, 62
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl nsw i8 %x, 1
@@ -158,11 +155,9 @@ define i1 @icmp_sgt8(i8 %x) {
; Compares with 126 and 127 are recognized as always false.
-; Known bits analysis turns this into an equality predicate.
-
define i1 @icmp_sgt9(i8 %x) {
; CHECK-LABEL: @icmp_sgt9(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 %x, -1
+; CHECK-NEXT: [[CMP:%.*]] = icmp sgt i8 %x, -1
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl nsw i8 %x, 7
@@ -210,11 +205,9 @@ define <2 x i1> @icmp_sgt11_vec(<2 x i8> %x) {
;
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
-; Known bits analysis turns this into an equality predicate.
-
define i1 @icmp_sle1(i8 %x) {
; CHECK-LABEL: @icmp_sle1(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 %x, -64
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 %x, -63
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl nsw i8 %x, 1
@@ -285,11 +278,9 @@ define i1 @icmp_sle7(i8 %x) {
ret i1 %cmp
}
-; Known bits analysis turns this into an equality predicate.
-
define i1 @icmp_sle8(i8 %x) {
; CHECK-LABEL: @icmp_sle8(
-; CHECK-NEXT: [[CMP:%.*]] = icmp ne i8 %x, 63
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 %x, 63
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl nsw i8 %x, 1
@@ -299,11 +290,9 @@ define i1 @icmp_sle8(i8 %x) {
; Compares with 126 and 127 are recognized as always true.
-; Known bits analysis turns this into an equality predicate.
-
define i1 @icmp_sle9(i8 %x) {
; CHECK-LABEL: @icmp_sle9(
-; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 %x, -1
+; CHECK-NEXT: [[CMP:%.*]] = icmp slt i8 %x, 0
; CHECK-NEXT: ret i1 [[CMP]]
;
%shl = shl nsw i8 %x, 7
@@ -353,4 +342,3 @@ define i1 @icmp_ne1(i8 %x) {
%cmp = icmp ne i8 %shl, -128
ret i1 %cmp
}
-
diff --git a/llvm/test/Transforms/InstCombine/icmp-shr-lt-gt.ll b/llvm/test/Transforms/InstCombine/icmp-shr-lt-gt.ll
index bf1a031a412..a43edfab7eb 100644
--- a/llvm/test/Transforms/InstCombine/icmp-shr-lt-gt.ll
+++ b/llvm/test/Transforms/InstCombine/icmp-shr-lt-gt.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -instcombine -S | FileCheck %s
define i1 @lshrugt_01_00(i4 %x) {
@@ -1834,7 +1835,7 @@ define i1 @lshrugt_01_05_exact(i4 %x) {
define i1 @lshrugt_01_06_exact(i4 %x) {
; CHECK-LABEL: @lshrugt_01_06_exact(
-; CHECK-NEXT: [[C:%.*]] = icmp eq i4 %x, -2
+; CHECK-NEXT: [[C:%.*]] = icmp ugt i4 %x, -4
; CHECK-NEXT: ret i1 [[C]]
;
%s = lshr exact i4 %x, 1
@@ -1945,7 +1946,7 @@ define i1 @lshrugt_02_01_exact(i4 %x) {
define i1 @lshrugt_02_02_exact(i4 %x) {
; CHECK-LABEL: @lshrugt_02_02_exact(
-; CHECK-NEXT: [[C:%.*]] = icmp eq i4 %x, -4
+; CHECK-NEXT: [[C:%.*]] = icmp ugt i4 %x, -8
; CHECK-NEXT: ret i1 [[C]]
;
%s = lshr exact i4 %x, 2
@@ -2226,7 +2227,7 @@ define i1 @lshrult_01_00_exact(i4 %x) {
define i1 @lshrult_01_01_exact(i4 %x) {
; CHECK-LABEL: @lshrult_01_01_exact(
-; CHECK-NEXT: [[C:%.*]] = icmp eq i4 %x, 0
+; CHECK-NEXT: [[C:%.*]] = icmp ult i4 %x, 2
; CHECK-NEXT: ret i1 [[C]]
;
%s = lshr exact i4 %x, 1
@@ -2286,7 +2287,7 @@ define i1 @lshrult_01_06_exact(i4 %x) {
define i1 @lshrult_01_07_exact(i4 %x) {
; CHECK-LABEL: @lshrult_01_07_exact(
-; CHECK-NEXT: [[C:%.*]] = icmp ne i4 %x, -2
+; CHECK-NEXT: [[C:%.*]] = icmp ult i4 %x, -2
; CHECK-NEXT: ret i1 [[C]]
;
%s = lshr exact i4 %x, 1
@@ -2377,7 +2378,7 @@ define i1 @lshrult_02_00_exact(i4 %x) {
define i1 @lshrult_02_01_exact(i4 %x) {
; CHECK-LABEL: @lshrult_02_01_exact(
-; CHECK-NEXT: [[C:%.*]] = icmp eq i4 %x, 0
+; CHECK-NEXT: [[C:%.*]] = icmp ult i4 %x, 4
; CHECK-NEXT: ret i1 [[C]]
;
%s = lshr exact i4 %x, 2
@@ -2397,7 +2398,7 @@ define i1 @lshrult_02_02_exact(i4 %x) {
define i1 @lshrult_02_03_exact(i4 %x) {
; CHECK-LABEL: @lshrult_02_03_exact(
-; CHECK-NEXT: [[C:%.*]] = icmp ne i4 %x, -4
+; CHECK-NEXT: [[C:%.*]] = icmp ult i4 %x, -4
; CHECK-NEXT: ret i1 [[C]]
;
%s = lshr exact i4 %x, 2
@@ -2524,7 +2525,7 @@ define i1 @lshrult_03_00_exact(i4 %x) {
define i1 @lshrult_03_01_exact(i4 %x) {
; CHECK-LABEL: @lshrult_03_01_exact(
-; CHECK-NEXT: [[C:%.*]] = icmp ne i4 %x, -8
+; CHECK-NEXT: [[C:%.*]] = icmp sgt i4 %x, -1
; CHECK-NEXT: ret i1 [[C]]
;
%s = lshr exact i4 %x, 3
@@ -2801,7 +2802,7 @@ define i1 @ashrsgt_01_14_exact(i4 %x) {
define i1 @ashrsgt_01_15_exact(i4 %x) {
; CHECK-LABEL: @ashrsgt_01_15_exact(
-; CHECK-NEXT: [[C:%.*]] = icmp sgt i4 %x, -1
+; CHECK-NEXT: [[C:%.*]] = icmp sgt i4 %x, -2
; CHECK-NEXT: ret i1 [[C]]
;
%s = ashr exact i4 %x, 1
@@ -2948,7 +2949,7 @@ define i1 @ashrsgt_02_14_exact(i4 %x) {
define i1 @ashrsgt_02_15_exact(i4 %x) {
; CHECK-LABEL: @ashrsgt_02_15_exact(
-; CHECK-NEXT: [[C:%.*]] = icmp sgt i4 %x, -1
+; CHECK-NEXT: [[C:%.*]] = icmp sgt i4 %x, -4
; CHECK-NEXT: ret i1 [[C]]
;
%s = ashr exact i4 %x, 2
@@ -3093,7 +3094,7 @@ define i1 @ashrsgt_03_14_exact(i4 %x) {
define i1 @ashrsgt_03_15_exact(i4 %x) {
; CHECK-LABEL: @ashrsgt_03_15_exact(
-; CHECK-NEXT: [[C:%.*]] = icmp sgt i4 %x, -1
+; CHECK-NEXT: [[C:%.*]] = icmp ne i4 %x, -8
; CHECK-NEXT: ret i1 [[C]]
;
%s = ashr exact i4 %x, 3
diff --git a/llvm/test/Transforms/InstCombine/icmp_sdiv_with_and_without_range.ll b/llvm/test/Transforms/InstCombine/icmp_sdiv_with_and_without_range.ll
index 174c4b906e3..5b9b0b47f7e 100644
--- a/llvm/test/Transforms/InstCombine/icmp_sdiv_with_and_without_range.ll
+++ b/llvm/test/Transforms/InstCombine/icmp_sdiv_with_and_without_range.ll
@@ -2,7 +2,8 @@
; RUN: opt -instcombine -S < %s | FileCheck %s
; Test that presence of range does not cause unprofitable transforms with bit
-; arithmetics, and instcombine behaves exactly the same as without the range.
+; arithmetics. InstCombine needs to be smart about dealing with range-annotated
+; values.
define i1 @without_range(i32* %A) {
; CHECK-LABEL: @without_range(
@@ -19,8 +20,7 @@ define i1 @without_range(i32* %A) {
define i1 @with_range(i32* %A) {
; CHECK-LABEL: @with_range(
; CHECK-NEXT: [[A_VAL:%.*]] = load i32, i32* [[A:%.*]], align 8, !range !0
-; CHECK-NEXT: [[B_MASK:%.*]] = and i32 [[A_VAL]], 2147483646
-; CHECK-NEXT: [[C:%.*]] = icmp eq i32 [[B_MASK]], 0
+; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[A_VAL]], 2
; CHECK-NEXT: ret i1 [[C]]
;
%A.val = load i32, i32* %A, align 8, !range !0
diff --git a/llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll b/llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
index 8e948639ba1..b4bd5c510d0 100644
--- a/llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
+++ b/llvm/test/Transforms/LoopVectorize/X86/masked_load_store.ll
@@ -2052,8 +2052,7 @@ define void @foo4(double* %A, double* %B, i32* %trigger) {
; AVX512-NEXT: [[PROL_ITER_CMP:%.*]] = icmp eq i64 [[PROL_ITER_SUB]], 0
; AVX512-NEXT: br i1 [[PROL_ITER_CMP]], label [[FOR_BODY_PROL_LOOPEXIT:%.*]], label [[FOR_BODY_PROL]], !llvm.loop !50
; AVX512: for.body.prol.loopexit:
-; AVX512-NEXT: [[DOTMASK:%.*]] = and i64 [[TMP24]], 9984
-; AVX512-NEXT: [[TMP28:%.*]] = icmp eq i64 [[DOTMASK]], 0
+; AVX512-NEXT: [[TMP28:%.*]] = icmp ult i64 [[TMP24]], 48
; AVX512-NEXT: br i1 [[TMP28]], label [[FOR_END:%.*]], label [[FOR_BODY:%.*]]
; AVX512: for.body:
; AVX512-NEXT: [[INDVARS_IV:%.*]] = phi i64 [ [[INDVARS_IV_NEXT_3:%.*]], [[FOR_INC_3:%.*]] ], [ [[INDVARS_IV_NEXT_PROL]], [[FOR_BODY_PROL_LOOPEXIT]] ]
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