diff options
Diffstat (limited to 'llvm/test/Transforms/Scalarizer')
| -rw-r--r-- | llvm/test/Transforms/Scalarizer/basic.ll | 82 | ||||
| -rw-r--r-- | llvm/test/Transforms/Scalarizer/dbginfo.ll | 20 | ||||
| -rw-r--r-- | llvm/test/Transforms/Scalarizer/no-data-layout.ll | 4 |
3 files changed, 53 insertions, 53 deletions
diff --git a/llvm/test/Transforms/Scalarizer/basic.ll b/llvm/test/Transforms/Scalarizer/basic.ll index 32143460e12..150eb7d43c4 100644 --- a/llvm/test/Transforms/Scalarizer/basic.ll +++ b/llvm/test/Transforms/Scalarizer/basic.ll @@ -21,13 +21,13 @@ define void @f1(<4 x float> %init, <4 x float> *%base, i32 %count) { ; CHECK: %nexti = sub i32 %i, 1 ; CHECK: %ptr = getelementptr <4 x float>, <4 x float>* %base, i32 %i ; CHECK: %ptr.i0 = bitcast <4 x float>* %ptr to float* -; CHECK: %val.i0 = load float* %ptr.i0, align 16 +; CHECK: %val.i0 = load float, float* %ptr.i0, align 16 ; CHECK: %ptr.i1 = getelementptr float, float* %ptr.i0, i32 1 -; CHECK: %val.i1 = load float* %ptr.i1, align 4 +; CHECK: %val.i1 = load float, float* %ptr.i1, align 4 ; CHECK: %ptr.i2 = getelementptr float, float* %ptr.i0, i32 2 -; CHECK: %val.i2 = load float* %ptr.i2, align 8 +; CHECK: %val.i2 = load float, float* %ptr.i2, align 8 ; CHECK: %ptr.i3 = getelementptr float, float* %ptr.i0, i32 3 -; CHECK: %val.i3 = load float* %ptr.i3, align 4 +; CHECK: %val.i3 = load float, float* %ptr.i3, align 4 ; CHECK: %add.i0 = fadd float %val.i0, %val.i2 ; CHECK: %add.i1 = fadd float %val.i1, %val.i3 ; CHECK: %add.i2 = fadd float %acc.i0, %acc.i2 @@ -66,7 +66,7 @@ loop: %nexti = sub i32 %i, 1 %ptr = getelementptr <4 x float>, <4 x float> *%base, i32 %i - %val = load <4 x float> *%ptr + %val = load <4 x float> , <4 x float> *%ptr %dval = bitcast <4 x float> %val to <2 x double> %dacc = bitcast <4 x float> %acc to <2 x double> %shuffle1 = shufflevector <2 x double> %dval, <2 x double> %dacc, @@ -107,13 +107,13 @@ define void @f2(<4 x i32> %init, <4 x i8> *%base, i32 %count) { ; CHECK: %nexti = sub i32 %i, 1 ; CHECK: %ptr = getelementptr <4 x i8>, <4 x i8>* %base, i32 %i ; CHECK: %ptr.i0 = bitcast <4 x i8>* %ptr to i8* -; CHECK: %val.i0 = load i8* %ptr.i0, align 4 +; CHECK: %val.i0 = load i8, i8* %ptr.i0, align 4 ; CHECK: %ptr.i1 = getelementptr i8, i8* %ptr.i0, i32 1 -; CHECK: %val.i1 = load i8* %ptr.i1, align 1 +; CHECK: %val.i1 = load i8, i8* %ptr.i1, align 1 ; CHECK: %ptr.i2 = getelementptr i8, i8* %ptr.i0, i32 2 -; CHECK: %val.i2 = load i8* %ptr.i2, align 2 +; CHECK: %val.i2 = load i8, i8* %ptr.i2, align 2 ; CHECK: %ptr.i3 = getelementptr i8, i8* %ptr.i0, i32 3 -; CHECK: %val.i3 = load i8* %ptr.i3, align 1 +; CHECK: %val.i3 = load i8, i8* %ptr.i3, align 1 ; CHECK: %ext.i0 = sext i8 %val.i0 to i32 ; CHECK: %ext.i1 = sext i8 %val.i1 to i32 ; CHECK: %ext.i2 = sext i8 %val.i2 to i32 @@ -151,7 +151,7 @@ loop: %nexti = sub i32 %i, 1 %ptr = getelementptr <4 x i8>, <4 x i8> *%base, i32 %i - %val = load <4 x i8> *%ptr + %val = load <4 x i8> , <4 x i8> *%ptr %ext = sext <4 x i8> %val to <4 x i32> %add = add <4 x i32> %ext, %acc %cmp = icmp slt <4 x i32> %add, <i32 -10, i32 -11, i32 -12, i32 -13> @@ -172,16 +172,16 @@ exit: ; Check that !tbaa information is preserved. define void @f3(<4 x i32> *%src, <4 x i32> *%dst) { ; CHECK-LABEL: @f3( -; CHECK: %val.i0 = load i32* %src.i0, align 16, !tbaa ![[TAG:[0-9]*]] -; CHECK: %val.i1 = load i32* %src.i1, align 4, !tbaa ![[TAG]] -; CHECK: %val.i2 = load i32* %src.i2, align 8, !tbaa ![[TAG]] -; CHECK: %val.i3 = load i32* %src.i3, align 4, !tbaa ![[TAG]] +; CHECK: %val.i0 = load i32, i32* %src.i0, align 16, !tbaa ![[TAG:[0-9]*]] +; CHECK: %val.i1 = load i32, i32* %src.i1, align 4, !tbaa ![[TAG]] +; CHECK: %val.i2 = load i32, i32* %src.i2, align 8, !tbaa ![[TAG]] +; CHECK: %val.i3 = load i32, i32* %src.i3, align 4, !tbaa ![[TAG]] ; CHECK: store i32 %add.i0, i32* %dst.i0, align 16, !tbaa ![[TAG:[0-9]*]] ; CHECK: store i32 %add.i1, i32* %dst.i1, align 4, !tbaa ![[TAG]] ; CHECK: store i32 %add.i2, i32* %dst.i2, align 8, !tbaa ![[TAG]] ; CHECK: store i32 %add.i3, i32* %dst.i3, align 4, !tbaa ![[TAG]] ; CHECK: ret void - %val = load <4 x i32> *%src, !tbaa !1 + %val = load <4 x i32> , <4 x i32> *%src, !tbaa !1 %add = add <4 x i32> %val, %val store <4 x i32> %add, <4 x i32> *%dst, !tbaa !2 ret void @@ -190,16 +190,16 @@ define void @f3(<4 x i32> *%src, <4 x i32> *%dst) { ; Check that !tbaa.struct information is preserved. define void @f4(<4 x i32> *%src, <4 x i32> *%dst) { ; CHECK-LABEL: @f4( -; CHECK: %val.i0 = load i32* %src.i0, align 16, !tbaa.struct ![[TAG:[0-9]*]] -; CHECK: %val.i1 = load i32* %src.i1, align 4, !tbaa.struct ![[TAG]] -; CHECK: %val.i2 = load i32* %src.i2, align 8, !tbaa.struct ![[TAG]] -; CHECK: %val.i3 = load i32* %src.i3, align 4, !tbaa.struct ![[TAG]] +; CHECK: %val.i0 = load i32, i32* %src.i0, align 16, !tbaa.struct ![[TAG:[0-9]*]] +; CHECK: %val.i1 = load i32, i32* %src.i1, align 4, !tbaa.struct ![[TAG]] +; CHECK: %val.i2 = load i32, i32* %src.i2, align 8, !tbaa.struct ![[TAG]] +; CHECK: %val.i3 = load i32, i32* %src.i3, align 4, !tbaa.struct ![[TAG]] ; CHECK: store i32 %add.i0, i32* %dst.i0, align 16, !tbaa.struct ![[TAG]] ; CHECK: store i32 %add.i1, i32* %dst.i1, align 4, !tbaa.struct ![[TAG]] ; CHECK: store i32 %add.i2, i32* %dst.i2, align 8, !tbaa.struct ![[TAG]] ; CHECK: store i32 %add.i3, i32* %dst.i3, align 4, !tbaa.struct ![[TAG]] ; CHECK: ret void - %val = load <4 x i32> *%src, !tbaa.struct !5 + %val = load <4 x i32> , <4 x i32> *%src, !tbaa.struct !5 %add = add <4 x i32> %val, %val store <4 x i32> %add, <4 x i32> *%dst, !tbaa.struct !5 ret void @@ -208,10 +208,10 @@ define void @f4(<4 x i32> *%src, <4 x i32> *%dst) { ; Check that llvm.mem.parallel_loop_access information is preserved. define void @f5(i32 %count, <4 x i32> *%src, <4 x i32> *%dst) { ; CHECK-LABEL: @f5( -; CHECK: %val.i0 = load i32* %this_src.i0, align 16, !llvm.mem.parallel_loop_access ![[TAG:[0-9]*]] -; CHECK: %val.i1 = load i32* %this_src.i1, align 4, !llvm.mem.parallel_loop_access ![[TAG]] -; CHECK: %val.i2 = load i32* %this_src.i2, align 8, !llvm.mem.parallel_loop_access ![[TAG]] -; CHECK: %val.i3 = load i32* %this_src.i3, align 4, !llvm.mem.parallel_loop_access ![[TAG]] +; CHECK: %val.i0 = load i32, i32* %this_src.i0, align 16, !llvm.mem.parallel_loop_access ![[TAG:[0-9]*]] +; CHECK: %val.i1 = load i32, i32* %this_src.i1, align 4, !llvm.mem.parallel_loop_access ![[TAG]] +; CHECK: %val.i2 = load i32, i32* %this_src.i2, align 8, !llvm.mem.parallel_loop_access ![[TAG]] +; CHECK: %val.i3 = load i32, i32* %this_src.i3, align 4, !llvm.mem.parallel_loop_access ![[TAG]] ; CHECK: store i32 %add.i0, i32* %this_dst.i0, align 16, !llvm.mem.parallel_loop_access ![[TAG]] ; CHECK: store i32 %add.i1, i32* %this_dst.i1, align 4, !llvm.mem.parallel_loop_access ![[TAG]] ; CHECK: store i32 %add.i2, i32* %this_dst.i2, align 8, !llvm.mem.parallel_loop_access ![[TAG]] @@ -224,7 +224,7 @@ loop: %index = phi i32 [ 0, %entry ], [ %next_index, %loop ] %this_src = getelementptr <4 x i32>, <4 x i32> *%src, i32 %index %this_dst = getelementptr <4 x i32>, <4 x i32> *%dst, i32 %index - %val = load <4 x i32> *%this_src, !llvm.mem.parallel_loop_access !3 + %val = load <4 x i32> , <4 x i32> *%this_src, !llvm.mem.parallel_loop_access !3 %add = add <4 x i32> %val, %val store <4 x i32> %add, <4 x i32> *%this_dst, !llvm.mem.parallel_loop_access !3 %next_index = add i32 %index, -1 @@ -261,7 +261,7 @@ define void @f7(<4 x i32> *%src, <4 x i32> *%dst) { ; CHECK-LABEL: @f7( ; CHECK-NOT: !foo ; CHECK: ret void - %val = load <4 x i32> *%src, !foo !5 + %val = load <4 x i32> , <4 x i32> *%src, !foo !5 %add = add <4 x i32> %val, %val store <4 x i32> %add, <4 x i32> *%dst, !foo !5 ret void @@ -305,19 +305,19 @@ define void @f9(<4 x float> *%dest, <4 x float> *%src) { ; CHECK: %dest.i2 = getelementptr float, float* %dest.i0, i32 2 ; CHECK: %dest.i3 = getelementptr float, float* %dest.i0, i32 3 ; CHECK: %src.i0 = bitcast <4 x float>* %src to float* -; CHECK: %val.i0 = load float* %src.i0, align 4 +; CHECK: %val.i0 = load float, float* %src.i0, align 4 ; CHECK: %src.i1 = getelementptr float, float* %src.i0, i32 1 -; CHECK: %val.i1 = load float* %src.i1, align 4 +; CHECK: %val.i1 = load float, float* %src.i1, align 4 ; CHECK: %src.i2 = getelementptr float, float* %src.i0, i32 2 -; CHECK: %val.i2 = load float* %src.i2, align 4 +; CHECK: %val.i2 = load float, float* %src.i2, align 4 ; CHECK: %src.i3 = getelementptr float, float* %src.i0, i32 3 -; CHECK: %val.i3 = load float* %src.i3, align 4 +; CHECK: %val.i3 = load float, float* %src.i3, align 4 ; CHECK: store float %val.i0, float* %dest.i0, align 8 ; CHECK: store float %val.i1, float* %dest.i1, align 4 ; CHECK: store float %val.i2, float* %dest.i2, align 8 ; CHECK: store float %val.i3, float* %dest.i3, align 4 ; CHECK: ret void - %val = load <4 x float> *%src, align 4 + %val = load <4 x float> , <4 x float> *%src, align 4 store <4 x float> %val, <4 x float> *%dest, align 8 ret void } @@ -330,19 +330,19 @@ define void @f10(<4 x float> *%dest, <4 x float> *%src) { ; CHECK: %dest.i2 = getelementptr float, float* %dest.i0, i32 2 ; CHECK: %dest.i3 = getelementptr float, float* %dest.i0, i32 3 ; CHECK: %src.i0 = bitcast <4 x float>* %src to float* -; CHECK: %val.i0 = load float* %src.i0, align 1 +; CHECK: %val.i0 = load float, float* %src.i0, align 1 ; CHECK: %src.i1 = getelementptr float, float* %src.i0, i32 1 -; CHECK: %val.i1 = load float* %src.i1, align 1 +; CHECK: %val.i1 = load float, float* %src.i1, align 1 ; CHECK: %src.i2 = getelementptr float, float* %src.i0, i32 2 -; CHECK: %val.i2 = load float* %src.i2, align 1 +; CHECK: %val.i2 = load float, float* %src.i2, align 1 ; CHECK: %src.i3 = getelementptr float, float* %src.i0, i32 3 -; CHECK: %val.i3 = load float* %src.i3, align 1 +; CHECK: %val.i3 = load float, float* %src.i3, align 1 ; CHECK: store float %val.i0, float* %dest.i0, align 2 ; CHECK: store float %val.i1, float* %dest.i1, align 2 ; CHECK: store float %val.i2, float* %dest.i2, align 2 ; CHECK: store float %val.i3, float* %dest.i3, align 2 ; CHECK: ret void - %val = load <4 x float> *%src, align 1 + %val = load <4 x float> , <4 x float> *%src, align 1 store <4 x float> %val, <4 x float> *%dest, align 2 ret void } @@ -350,13 +350,13 @@ define void @f10(<4 x float> *%dest, <4 x float> *%src) { ; Test that sub-byte loads aren't scalarized. define void @f11(<32 x i1> *%dest, <32 x i1> *%src0) { ; CHECK: @f11( -; CHECK: %val0 = load <32 x i1>* %src0 -; CHECK: %val1 = load <32 x i1>* %src1 +; CHECK: %val0 = load <32 x i1>, <32 x i1>* %src0 +; CHECK: %val1 = load <32 x i1>, <32 x i1>* %src1 ; CHECK: store <32 x i1> %and, <32 x i1>* %dest ; CHECK: ret void %src1 = getelementptr <32 x i1>, <32 x i1> *%src0, i32 1 - %val0 = load <32 x i1> *%src0 - %val1 = load <32 x i1> *%src1 + %val0 = load <32 x i1> , <32 x i1> *%src0 + %val1 = load <32 x i1> , <32 x i1> *%src1 %and = and <32 x i1> %val0, %val1 store <32 x i1> %and, <32 x i1> *%dest ret void @@ -375,7 +375,7 @@ define void @f12(<4 x i32> *%dest, <4 x i32> *%src, i32 %index) { ; CHECK-DAG: %val2.i2 = shl i32 3, %val1.i2 ; CHECK-DAG: %val2.i3 = shl i32 4, %val1.i3 ; CHECK: ret void - %val0 = load <4 x i32> *%src + %val0 = load <4 x i32> , <4 x i32> *%src %val1 = insertelement <4 x i32> %val0, i32 1, i32 %index %val2 = shl <4 x i32> <i32 1, i32 2, i32 3, i32 4>, %val1 store <4 x i32> %val2, <4 x i32> *%dest diff --git a/llvm/test/Transforms/Scalarizer/dbginfo.ll b/llvm/test/Transforms/Scalarizer/dbginfo.ll index 892947d5733..0460309c834 100644 --- a/llvm/test/Transforms/Scalarizer/dbginfo.ll +++ b/llvm/test/Transforms/Scalarizer/dbginfo.ll @@ -19,14 +19,14 @@ define void @f1(<4 x i32>* nocapture %a, <4 x i32>* nocapture readonly %b, <4 x ; CHECK: tail call void @llvm.dbg.value(metadata <4 x i32>* %a, i64 0, metadata !{{[0-9]+}}, metadata {{.*}}), !dbg !{{[0-9]+}} ; CHECK: tail call void @llvm.dbg.value(metadata <4 x i32>* %b, i64 0, metadata !{{[0-9]+}}, metadata {{.*}}), !dbg !{{[0-9]+}} ; CHECK: tail call void @llvm.dbg.value(metadata <4 x i32>* %c, i64 0, metadata !{{[0-9]+}}, metadata {{.*}}), !dbg !{{[0-9]+}} -; CHECK: %bval.i0 = load i32* %b.i0, align 16, !dbg ![[TAG1:[0-9]+]], !tbaa ![[TAG2:[0-9]+]] -; CHECK: %bval.i1 = load i32* %b.i1, align 4, !dbg ![[TAG1]], !tbaa ![[TAG2]] -; CHECK: %bval.i2 = load i32* %b.i2, align 8, !dbg ![[TAG1]], !tbaa ![[TAG2]] -; CHECK: %bval.i3 = load i32* %b.i3, align 4, !dbg ![[TAG1]], !tbaa ![[TAG2]] -; CHECK: %cval.i0 = load i32* %c.i0, align 16, !dbg ![[TAG1]], !tbaa ![[TAG2]] -; CHECK: %cval.i1 = load i32* %c.i1, align 4, !dbg ![[TAG1]], !tbaa ![[TAG2]] -; CHECK: %cval.i2 = load i32* %c.i2, align 8, !dbg ![[TAG1]], !tbaa ![[TAG2]] -; CHECK: %cval.i3 = load i32* %c.i3, align 4, !dbg ![[TAG1]], !tbaa ![[TAG2]] +; CHECK: %bval.i0 = load i32, i32* %b.i0, align 16, !dbg ![[TAG1:[0-9]+]], !tbaa ![[TAG2:[0-9]+]] +; CHECK: %bval.i1 = load i32, i32* %b.i1, align 4, !dbg ![[TAG1]], !tbaa ![[TAG2]] +; CHECK: %bval.i2 = load i32, i32* %b.i2, align 8, !dbg ![[TAG1]], !tbaa ![[TAG2]] +; CHECK: %bval.i3 = load i32, i32* %b.i3, align 4, !dbg ![[TAG1]], !tbaa ![[TAG2]] +; CHECK: %cval.i0 = load i32, i32* %c.i0, align 16, !dbg ![[TAG1]], !tbaa ![[TAG2]] +; CHECK: %cval.i1 = load i32, i32* %c.i1, align 4, !dbg ![[TAG1]], !tbaa ![[TAG2]] +; CHECK: %cval.i2 = load i32, i32* %c.i2, align 8, !dbg ![[TAG1]], !tbaa ![[TAG2]] +; CHECK: %cval.i3 = load i32, i32* %c.i3, align 4, !dbg ![[TAG1]], !tbaa ![[TAG2]] ; CHECK: %add.i0 = add i32 %bval.i0, %cval.i0, !dbg ![[TAG1]] ; CHECK: %add.i1 = add i32 %bval.i1, %cval.i1, !dbg ![[TAG1]] ; CHECK: %add.i2 = add i32 %bval.i2, %cval.i2, !dbg ![[TAG1]] @@ -40,8 +40,8 @@ entry: tail call void @llvm.dbg.value(metadata <4 x i32>* %a, i64 0, metadata !15, metadata !{}), !dbg !20 tail call void @llvm.dbg.value(metadata <4 x i32>* %b, i64 0, metadata !16, metadata !{}), !dbg !20 tail call void @llvm.dbg.value(metadata <4 x i32>* %c, i64 0, metadata !17, metadata !{}), !dbg !20 - %bval = load <4 x i32>* %b, align 16, !dbg !21, !tbaa !22 - %cval = load <4 x i32>* %c, align 16, !dbg !21, !tbaa !22 + %bval = load <4 x i32>, <4 x i32>* %b, align 16, !dbg !21, !tbaa !22 + %cval = load <4 x i32>, <4 x i32>* %c, align 16, !dbg !21, !tbaa !22 %add = add <4 x i32> %bval, %cval, !dbg !21 store <4 x i32> %add, <4 x i32>* %a, align 16, !dbg !21, !tbaa !22 ret void, !dbg !25 diff --git a/llvm/test/Transforms/Scalarizer/no-data-layout.ll b/llvm/test/Transforms/Scalarizer/no-data-layout.ll index 3eaf669ef9d..c89c7868c57 100644 --- a/llvm/test/Transforms/Scalarizer/no-data-layout.ll +++ b/llvm/test/Transforms/Scalarizer/no-data-layout.ll @@ -3,7 +3,7 @@ ; Test the handling of loads and stores when no data layout is available. define void @f1(<4 x float> *%dest, <4 x float> *%src) { ; CHECK: @f1( -; CHECK: %val = load <4 x float>* %src, align 4 +; CHECK: %val = load <4 x float>, <4 x float>* %src, align 4 ; CHECK: %val.i0 = extractelement <4 x float> %val, i32 0 ; CHECK: %add.i0 = fadd float %val.i0, %val.i0 ; CHECK: %val.i1 = extractelement <4 x float> %val, i32 1 @@ -18,7 +18,7 @@ define void @f1(<4 x float> *%dest, <4 x float> *%src) { ; CHECK: %add = insertelement <4 x float> %add.upto2, float %add.i3, i32 3 ; CHECK: store <4 x float> %add, <4 x float>* %dest, align 8 ; CHECK: ret void - %val = load <4 x float> *%src, align 4 + %val = load <4 x float> , <4 x float> *%src, align 4 %add = fadd <4 x float> %val, %val store <4 x float> %add, <4 x float> *%dest, align 8 ret void |
