diff options
Diffstat (limited to 'llvm/test/Transforms/SLPVectorizer/X86/cmp_commute.ll')
| -rw-r--r-- | llvm/test/Transforms/SLPVectorizer/X86/cmp_commute.ll | 72 |
1 files changed, 12 insertions, 60 deletions
diff --git a/llvm/test/Transforms/SLPVectorizer/X86/cmp_commute.ll b/llvm/test/Transforms/SLPVectorizer/X86/cmp_commute.ll index 57f53442f65..46345a18164 100644 --- a/llvm/test/Transforms/SLPVectorizer/X86/cmp_commute.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/cmp_commute.ll @@ -204,26 +204,10 @@ define <4 x i32> @fcmp_uno_v4i32(<4 x float> %a, float* %b) { define <4 x i32> @icmp_sgt_slt_v4i32(<4 x i32> %a, i32* %b) { ; CHECK-LABEL: @icmp_sgt_slt_v4i32( -; CHECK-NEXT: [[A0:%.*]] = extractelement <4 x i32> [[A:%.*]], i32 0 -; CHECK-NEXT: [[A1:%.*]] = extractelement <4 x i32> [[A]], i32 1 -; CHECK-NEXT: [[A2:%.*]] = extractelement <4 x i32> [[A]], i32 2 -; CHECK-NEXT: [[A3:%.*]] = extractelement <4 x i32> [[A]], i32 3 -; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 1 -; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 2 -; CHECK-NEXT: [[P3:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 3 -; CHECK-NEXT: [[B0:%.*]] = load i32, i32* [[B]], align 4 -; CHECK-NEXT: [[B1:%.*]] = load i32, i32* [[P1]], align 4 -; CHECK-NEXT: [[B2:%.*]] = load i32, i32* [[P2]], align 4 -; CHECK-NEXT: [[B3:%.*]] = load i32, i32* [[P3]], align 4 -; CHECK-NEXT: [[C0:%.*]] = icmp sgt i32 [[A0]], [[B0]] -; CHECK-NEXT: [[C1:%.*]] = icmp slt i32 [[B1]], [[A1]] -; CHECK-NEXT: [[C2:%.*]] = icmp slt i32 [[B2]], [[A2]] -; CHECK-NEXT: [[C3:%.*]] = icmp sgt i32 [[A3]], [[B3]] -; CHECK-NEXT: [[D0:%.*]] = insertelement <4 x i1> undef, i1 [[C0]], i32 0 -; CHECK-NEXT: [[D1:%.*]] = insertelement <4 x i1> [[D0]], i1 [[C1]], i32 1 -; CHECK-NEXT: [[D2:%.*]] = insertelement <4 x i1> [[D1]], i1 [[C2]], i32 2 -; CHECK-NEXT: [[D3:%.*]] = insertelement <4 x i1> [[D2]], i1 [[C3]], i32 3 -; CHECK-NEXT: [[R:%.*]] = sext <4 x i1> [[D3]] to <4 x i32> +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[B:%.*]] to <4 x i32>* +; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = icmp slt <4 x i32> [[TMP2]], [[A:%.*]] +; CHECK-NEXT: [[R:%.*]] = sext <4 x i1> [[TMP3]] to <4 x i32> ; CHECK-NEXT: ret <4 x i32> [[R]] ; %a0 = extractelement <4 x i32> %a, i32 0 @@ -252,26 +236,10 @@ define <4 x i32> @icmp_sgt_slt_v4i32(<4 x i32> %a, i32* %b) { define <4 x i32> @icmp_uge_ule_v4i32(<4 x i32> %a, i32* %b) { ; CHECK-LABEL: @icmp_uge_ule_v4i32( -; CHECK-NEXT: [[A0:%.*]] = extractelement <4 x i32> [[A:%.*]], i32 0 -; CHECK-NEXT: [[A1:%.*]] = extractelement <4 x i32> [[A]], i32 1 -; CHECK-NEXT: [[A2:%.*]] = extractelement <4 x i32> [[A]], i32 2 -; CHECK-NEXT: [[A3:%.*]] = extractelement <4 x i32> [[A]], i32 3 -; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds i32, i32* [[B:%.*]], i64 1 -; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 2 -; CHECK-NEXT: [[P3:%.*]] = getelementptr inbounds i32, i32* [[B]], i64 3 -; CHECK-NEXT: [[B0:%.*]] = load i32, i32* [[B]], align 4 -; CHECK-NEXT: [[B1:%.*]] = load i32, i32* [[P1]], align 4 -; CHECK-NEXT: [[B2:%.*]] = load i32, i32* [[P2]], align 4 -; CHECK-NEXT: [[B3:%.*]] = load i32, i32* [[P3]], align 4 -; CHECK-NEXT: [[C0:%.*]] = icmp uge i32 [[A0]], [[B0]] -; CHECK-NEXT: [[C1:%.*]] = icmp ule i32 [[B1]], [[A1]] -; CHECK-NEXT: [[C2:%.*]] = icmp ule i32 [[B2]], [[A2]] -; CHECK-NEXT: [[C3:%.*]] = icmp uge i32 [[A3]], [[B3]] -; CHECK-NEXT: [[D0:%.*]] = insertelement <4 x i1> undef, i1 [[C0]], i32 0 -; CHECK-NEXT: [[D1:%.*]] = insertelement <4 x i1> [[D0]], i1 [[C1]], i32 1 -; CHECK-NEXT: [[D2:%.*]] = insertelement <4 x i1> [[D1]], i1 [[C2]], i32 2 -; CHECK-NEXT: [[D3:%.*]] = insertelement <4 x i1> [[D2]], i1 [[C3]], i32 3 -; CHECK-NEXT: [[R:%.*]] = sext <4 x i1> [[D3]] to <4 x i32> +; CHECK-NEXT: [[TMP1:%.*]] = bitcast i32* [[B:%.*]] to <4 x i32>* +; CHECK-NEXT: [[TMP2:%.*]] = load <4 x i32>, <4 x i32>* [[TMP1]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = icmp ule <4 x i32> [[TMP2]], [[A:%.*]] +; CHECK-NEXT: [[R:%.*]] = sext <4 x i1> [[TMP3]] to <4 x i32> ; CHECK-NEXT: ret <4 x i32> [[R]] ; %a0 = extractelement <4 x i32> %a, i32 0 @@ -300,26 +268,10 @@ define <4 x i32> @icmp_uge_ule_v4i32(<4 x i32> %a, i32* %b) { define <4 x i32> @fcmp_ogt_olt_v4i32(<4 x float> %a, float* %b) { ; CHECK-LABEL: @fcmp_ogt_olt_v4i32( -; CHECK-NEXT: [[A0:%.*]] = extractelement <4 x float> [[A:%.*]], i32 0 -; CHECK-NEXT: [[A1:%.*]] = extractelement <4 x float> [[A]], i32 1 -; CHECK-NEXT: [[A2:%.*]] = extractelement <4 x float> [[A]], i32 2 -; CHECK-NEXT: [[A3:%.*]] = extractelement <4 x float> [[A]], i32 3 -; CHECK-NEXT: [[P1:%.*]] = getelementptr inbounds float, float* [[B:%.*]], i64 1 -; CHECK-NEXT: [[P2:%.*]] = getelementptr inbounds float, float* [[B]], i64 2 -; CHECK-NEXT: [[P3:%.*]] = getelementptr inbounds float, float* [[B]], i64 3 -; CHECK-NEXT: [[B0:%.*]] = load float, float* [[B]], align 4 -; CHECK-NEXT: [[B1:%.*]] = load float, float* [[P1]], align 4 -; CHECK-NEXT: [[B2:%.*]] = load float, float* [[P2]], align 4 -; CHECK-NEXT: [[B3:%.*]] = load float, float* [[P3]], align 4 -; CHECK-NEXT: [[C0:%.*]] = fcmp ogt float [[A0]], [[B0]] -; CHECK-NEXT: [[C1:%.*]] = fcmp olt float [[B1]], [[A1]] -; CHECK-NEXT: [[C2:%.*]] = fcmp olt float [[B2]], [[A2]] -; CHECK-NEXT: [[C3:%.*]] = fcmp ogt float [[A3]], [[B3]] -; CHECK-NEXT: [[D0:%.*]] = insertelement <4 x i1> undef, i1 [[C0]], i32 0 -; CHECK-NEXT: [[D1:%.*]] = insertelement <4 x i1> [[D0]], i1 [[C1]], i32 1 -; CHECK-NEXT: [[D2:%.*]] = insertelement <4 x i1> [[D1]], i1 [[C2]], i32 2 -; CHECK-NEXT: [[D3:%.*]] = insertelement <4 x i1> [[D2]], i1 [[C3]], i32 3 -; CHECK-NEXT: [[R:%.*]] = sext <4 x i1> [[D3]] to <4 x i32> +; CHECK-NEXT: [[TMP1:%.*]] = bitcast float* [[B:%.*]] to <4 x float>* +; CHECK-NEXT: [[TMP2:%.*]] = load <4 x float>, <4 x float>* [[TMP1]], align 4 +; CHECK-NEXT: [[TMP3:%.*]] = fcmp olt <4 x float> [[TMP2]], [[A:%.*]] +; CHECK-NEXT: [[R:%.*]] = sext <4 x i1> [[TMP3]] to <4 x i32> ; CHECK-NEXT: ret <4 x i32> [[R]] ; %a0 = extractelement <4 x float> %a, i32 0 |
