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-rw-r--r--llvm/test/Transforms/InstSimplify/div.ll42
1 files changed, 42 insertions, 0 deletions
diff --git a/llvm/test/Transforms/InstSimplify/div.ll b/llvm/test/Transforms/InstSimplify/div.ll
index cad2a0d5365..3136f0242fa 100644
--- a/llvm/test/Transforms/InstSimplify/div.ll
+++ b/llvm/test/Transforms/InstSimplify/div.ll
@@ -1,5 +1,47 @@
; RUN: opt < %s -instsimplify -S | FileCheck %s
+; FIXME: Division-by-zero is undef. UB in any vector lane means the whole op is undef.
+
+define <2 x i8> @sdiv_zero_elt_vec(<2 x i8> %x) {
+; CHECK-LABEL: @sdiv_zero_elt_vec(
+; CHECK-NEXT: [[DIV:%.*]] = sdiv <2 x i8> %x, <i8 -42, i8 0>
+; CHECK-NEXT: ret <2 x i8> [[DIV]]
+;
+ %div = sdiv <2 x i8> %x, <i8 -42, i8 0>
+ ret <2 x i8> %div
+}
+
+define <2 x i8> @udiv_zero_elt_vec(<2 x i8> %x) {
+; CHECK-LABEL: @udiv_zero_elt_vec(
+; CHECK-NEXT: [[DIV:%.*]] = udiv <2 x i8> %x, <i8 0, i8 42>
+; CHECK-NEXT: ret <2 x i8> [[DIV]]
+;
+ %div = udiv <2 x i8> %x, <i8 0, i8 42>
+ ret <2 x i8> %div
+}
+
+; FIXME: Division-by-zero is undef. UB in any vector lane means the whole op is undef.
+; Thus, we can simplify this: if any element of 'y' is 0, we can do anything.
+; Therefore, assume that all elements of 'y' must be 1.
+
+define <2 x i1> @sdiv_bool_vec(<2 x i1> %x, <2 x i1> %y) {
+; CHECK-LABEL: @sdiv_bool_vec(
+; CHECK-NEXT: [[DIV:%.*]] = sdiv <2 x i1> %x, %y
+; CHECK-NEXT: ret <2 x i1> [[DIV]]
+;
+ %div = sdiv <2 x i1> %x, %y
+ ret <2 x i1> %div
+}
+
+define <2 x i1> @udiv_bool_vec(<2 x i1> %x, <2 x i1> %y) {
+; CHECK-LABEL: @udiv_bool_vec(
+; CHECK-NEXT: [[DIV:%.*]] = udiv <2 x i1> %x, %y
+; CHECK-NEXT: ret <2 x i1> [[DIV]]
+;
+ %div = udiv <2 x i1> %x, %y
+ ret <2 x i1> %div
+}
+
declare i32 @external()
define i32 @div1() {
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