summaryrefslogtreecommitdiffstats
path: root/llvm/test/Transforms/InstCombine/vec_udiv_to_shift.ll
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/test/Transforms/InstCombine/vec_udiv_to_shift.ll')
-rw-r--r--llvm/test/Transforms/InstCombine/vec_udiv_to_shift.ll16
1 files changed, 16 insertions, 0 deletions
diff --git a/llvm/test/Transforms/InstCombine/vec_udiv_to_shift.ll b/llvm/test/Transforms/InstCombine/vec_udiv_to_shift.ll
new file mode 100644
index 00000000000..2f9a0ef3e90
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/vec_udiv_to_shift.ll
@@ -0,0 +1,16 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+define <8 x i16> @udiv_vec8x16(<8 x i16> %var) {
+entry:
+; CHECK: lshr <8 x i16> %var, <i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5, i16 5>
+%0 = udiv <8 x i16> %var, <i16 32, i16 32, i16 32, i16 32, i16 32, i16 32, i16 32, i16 32>
+ret <8 x i16> %0
+}
+
+define <4 x i32> @udiv_vec4x32(<4 x i32> %var) {
+entry:
+; CHECK: lshr <4 x i32> %var, <i32 4, i32 4, i32 4, i32 4>
+%0 = udiv <4 x i32> %var, <i32 16, i32 16, i32 16, i32 16>
+ret <4 x i32> %0
+}
OpenPOWER on IntegriCloud