summaryrefslogtreecommitdiffstats
path: root/llvm/test/Transforms/InstCombine/mul-masked-bits.ll
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/test/Transforms/InstCombine/mul-masked-bits.ll')
-rw-r--r--llvm/test/Transforms/InstCombine/mul-masked-bits.ll19
1 files changed, 19 insertions, 0 deletions
diff --git a/llvm/test/Transforms/InstCombine/mul-masked-bits.ll b/llvm/test/Transforms/InstCombine/mul-masked-bits.ll
new file mode 100644
index 00000000000..fcff725cdf6
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/mul-masked-bits.ll
@@ -0,0 +1,19 @@
+; NOTE: Assertions have been autogenerated by update_test_checks.py
+; RUN: opt < %s -instcombine -S | FileCheck %s
+
+define i32 @foo(i32 %x, i32 %y) {
+; CHECK-LABEL: @foo(
+; CHECK-NEXT: [[A:%.*]] = and i32 %x, 7
+; CHECK-NEXT: [[B:%.*]] = and i32 %y, 7
+; CHECK-NEXT: [[C:%.*]] = mul nuw nsw i32 [[A]], [[B]]
+; CHECK-NEXT: [[D:%.*]] = shl nuw i32 [[C]], 26
+; CHECK-NEXT: [[E:%.*]] = ashr exact i32 [[D]], 26
+; CHECK-NEXT: ret i32 [[E]]
+;
+ %a = and i32 %x, 7
+ %b = and i32 %y, 7
+ %c = mul i32 %a, %b
+ %d = shl i32 %c, 26
+ %e = ashr i32 %d, 26
+ ret i32 %e
+}
OpenPOWER on IntegriCloud