summaryrefslogtreecommitdiffstats
path: root/llvm/test/Transforms/InstCombine/apint-add1.ll
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/test/Transforms/InstCombine/apint-add1.ll')
-rw-r--r--llvm/test/Transforms/InstCombine/apint-add1.ll52
1 files changed, 52 insertions, 0 deletions
diff --git a/llvm/test/Transforms/InstCombine/apint-add1.ll b/llvm/test/Transforms/InstCombine/apint-add1.ll
new file mode 100644
index 00000000000..2473ec1403f
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/apint-add1.ll
@@ -0,0 +1,52 @@
+; This test makes sure that add instructions are properly eliminated.
+; This test is for Integer BitWidth <= 64 && BitWidth % 8 != 0.
+
+; RUN: llvm-as < %s | opt -instcombine -disable-output &&
+; RUN: llvm-as < %s | opt -instcombine | llvm-dis | \
+; RUN: grep -v OK | not grep add
+
+implementation
+
+define i1 @test1(i1 %x) {
+ %tmp.2 = xor i1 %x, 1
+ ;; Add of sign bit -> xor of sign bit.
+ %tmp.4 = add i1 %tmp.2, 1
+ ret i1 %tmp.4
+}
+
+define i47 @test2(i47 %x) {
+ %tmp.2 = xor i47 %x, 70368744177664
+ ;; Add of sign bit -> xor of sign bit.
+ %tmp.4 = add i47 %tmp.2, 70368744177664
+ ret i47 %tmp.4
+}
+
+define i15 @test3(i15 %x) {
+ %tmp.2 = xor i15 %x, 16384
+ ;; Add of sign bit -> xor of sign bit.
+ %tmp.4 = add i15 %tmp.2, 16384
+ ret i15 %tmp.4
+}
+
+define i12 @test4(i12 %x) {
+ ;; If we have ADD(XOR(AND(X, 0xFF), 0xF..F80), 0x80), it's a sext.
+ %X = and i12 %x, 63
+ %tmp.2 = xor i12 %X, 4064 ; 0xFE0
+ %tmp.4 = add i12 %tmp.2, 32 ; 0x020
+ ret i12 %tmp.4
+}
+
+define i49 @test5(i49 %x) {
+ ;; If we have ADD(XOR(AND(X, 0xFF), 0x80), 0xF..F80), it's a sext.
+ %X = and i49 %x, 16777215 ; 0x0000000ffffff
+ %tmp.2 = xor i49 %X, 8388608 ; 0x0000000800000
+ %tmp.4 = add i49 %tmp.2, -8388608 ; 0x1FFFFFF800000
+ ret i49 %tmp.4
+}
+
+define i49 @test6(i49 %x) {
+ ;; (x & 254)+1 -> (x & 254)|1
+ %tmp.2 = and i49 %x, 562949953421310
+ %tmp.4 = add i49 %tmp.2, 1
+ ret i49 %tmp.4
+}
OpenPOWER on IntegriCloud