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-rw-r--r--llvm/test/Regression/CodeGen/X86/fast-cc-pass-in-regs.ll16
1 files changed, 0 insertions, 16 deletions
diff --git a/llvm/test/Regression/CodeGen/X86/fast-cc-pass-in-regs.ll b/llvm/test/Regression/CodeGen/X86/fast-cc-pass-in-regs.ll
deleted file mode 100644
index ab6248e1951..00000000000
--- a/llvm/test/Regression/CodeGen/X86/fast-cc-pass-in-regs.ll
+++ /dev/null
@@ -1,16 +0,0 @@
-; RUN: llvm-upgrade < %s | llvm-as | llc -march=x86 -x86-asm-syntax=intel -enable-x86-fastcc | grep 'mov EDX, 1'
-; check that fastcc is passing stuff in regs.
-
-; Argument reg passing is disabled due to regalloc issues. FIXME!
-; XFAIL: *
-
-declare fastcc long %callee(long)
-
-long %caller() {
- %X = call fastcc long %callee(long 4294967299) ;; (1ULL << 32) + 3
- ret long %X
-}
-
-fastcc long %caller2(long %X) {
- ret long %X
-}
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