diff options
Diffstat (limited to 'llvm/test/MC')
| -rw-r--r-- | llvm/test/MC/Disassembler/SystemZ/insns.txt | 186 | ||||
| -rw-r--r-- | llvm/test/MC/SystemZ/insn-bad.s | 124 | ||||
| -rw-r--r-- | llvm/test/MC/SystemZ/insn-good.s | 142 |
3 files changed, 452 insertions, 0 deletions
diff --git a/llvm/test/MC/Disassembler/SystemZ/insns.txt b/llvm/test/MC/Disassembler/SystemZ/insns.txt index 00ffd02fc50..ea3a17df53d 100644 --- a/llvm/test/MC/Disassembler/SystemZ/insns.txt +++ b/llvm/test/MC/Disassembler/SystemZ/insns.txt @@ -2491,6 +2491,69 @@ # CHECK: clc 0(256,%r15), 0 0xd5 0xff 0xf0 0x00 0x00 0x00 +# CHECK: clcl %r0, %r8 +0x0f 0x08 + +# CHECK: clcl %r0, %r14 +0x0f 0x0e + +# CHECK: clcl %r14, %r0 +0x0f 0xe0 + +# CHECK: clcl %r14, %r8 +0x0f 0xe8 + +# CHECK: clcle %r0, %r0, 0 +0xa9 0x00 0x00 0x00 + +# CHECK: clcle %r0, %r14, 4095 +0xa9 0x0e 0x0f 0xff + +# CHECK: clcle %r0, %r0, 0(%r1) +0xa9 0x00 0x10 0x00 + +# CHECK: clcle %r0, %r0, 0(%r15) +0xa9 0x00 0xf0 0x00 + +# CHECK: clcle %r0, %r14, 4095(%r15) +0xa9 0x0e 0xff 0xff + +# CHECK: clcle %r0, %r0, 4095(%r1) +0xa9 0x00 0x1f 0xff + +# CHECK: clcle %r14, %r0, 0 +0xa9 0xe0 0x00 0x00 + +# CHECK: clclu %r0, %r0, -524288 +0xeb 0x00 0x00 0x00 0x80 0x8f + +# CHECK: clclu %r0, %r0, -1 +0xeb 0x00 0x0f 0xff 0xff 0x8f + +# CHECK: clclu %r0, %r14, 0 +0xeb 0x0e 0x00 0x00 0x00 0x8f + +# CHECK: clclu %r0, %r14, 1 +0xeb 0x0e 0x00 0x01 0x00 0x8f + +# CHECK: clclu %r0, %r8, 524287 +0xeb 0x08 0x0f 0xff 0x7f 0x8f + +# CHECK: clclu %r0, %r8, 0(%r1) +0xeb 0x08 0x10 0x00 0x00 0x8f + +# CHECK: clclu %r0, %r4, 0(%r15) +0xeb 0x04 0xf0 0x00 0x00 0x8f + +# CHECK: clclu %r0, %r4, 524287(%r15) +0xeb 0x04 0xff 0xff 0x7f 0x8f + +# CHECK: clclu %r0, %r0, 524287(%r1) +0xeb 0x00 0x1f 0xff 0x7f 0x8f + +# CHECK: clclu %r14, %r0, 0 +0xeb 0xe0 0x00 0x00 0x00 0x8f + # CHECK: clfdbr %r0, 0, %f0, 1 0xb3 0x9d 0x01 0x00 @@ -3583,6 +3646,18 @@ # CHECK: csy %r15, %r0, 0 0xeb 0xf0 0x00 0x00 0x00 0x14 +# CHECK: cuse %r0, %r0 +0xb2 0x57 0x00 0x00 + +# CHECK: cuse %r0, %r14 +0xb2 0x57 0x00 0x0e + +# CHECK: cuse %r14, %r0 +0xb2 0x57 0x00 0xe0 + +# CHECK: cuse %r6, %r8 +0xb2 0x57 0x00 0x68 + # CHECK: cxbr %f0, %f0 0xb3 0x49 0x00 0x00 @@ -7738,6 +7813,42 @@ # CHECK: mvc 0(256,%r15), 0 0xd2 0xff 0xf0 0x00 0x00 0x00 +# CHECK: mvcin 0(1), 0 +0xe8 0x00 0x00 0x00 0x00 0x00 + +# CHECK: mvcin 0(1), 0(%r1) +0xe8 0x00 0x00 0x00 0x10 0x00 + +# CHECK: mvcin 0(1), 0(%r15) +0xe8 0x00 0x00 0x00 0xf0 0x00 + +# CHECK: mvcin 0(1), 4095 +0xe8 0x00 0x00 0x00 0x0f 0xff + +# CHECK: mvcin 0(1), 4095(%r1) +0xe8 0x00 0x00 0x00 0x1f 0xff + +# CHECK: mvcin 0(1), 4095(%r15) +0xe8 0x00 0x00 0x00 0xff 0xff + +# CHECK: mvcin 0(1,%r1), 0 +0xe8 0x00 0x10 0x00 0x00 0x00 + +# CHECK: mvcin 0(1,%r15), 0 +0xe8 0x00 0xf0 0x00 0x00 0x00 + +# CHECK: mvcin 4095(1,%r1), 0 +0xe8 0x00 0x1f 0xff 0x00 0x00 + +# CHECK: mvcin 4095(1,%r15), 0 +0xe8 0x00 0xff 0xff 0x00 0x00 + +# CHECK: mvcin 0(256,%r1), 0 +0xe8 0xff 0x10 0x00 0x00 0x00 + +# CHECK: mvcin 0(256,%r15), 0 +0xe8 0xff 0xf0 0x00 0x00 0x00 + # CHECK: mvck 0(%r0), 0, %r0 0xd9 0x00 0x00 0x00 0x00 0x00 @@ -7759,6 +7870,69 @@ # CHECK: mvck 4095(%r15,%r1), 0(%r15), %r2 0xd9 0xf2 0x1f 0xff 0xf0 0x00 +# CHECK: mvcl %r0, %r8 +0x0e 0x08 + +# CHECK: mvcl %r0, %r14 +0x0e 0x0e + +# CHECK: mvcl %r14, %r0 +0x0e 0xe0 + +# CHECK: mvcl %r14, %r8 +0x0e 0xe8 + +# CHECK: mvcle %r0, %r0, 0 +0xa8 0x00 0x00 0x00 + +# CHECK: mvcle %r0, %r14, 4095 +0xa8 0x0e 0x0f 0xff + +# CHECK: mvcle %r0, %r0, 0(%r1) +0xa8 0x00 0x10 0x00 + +# CHECK: mvcle %r0, %r0, 0(%r15) +0xa8 0x00 0xf0 0x00 + +# CHECK: mvcle %r0, %r14, 4095(%r15) +0xa8 0x0e 0xff 0xff + +# CHECK: mvcle %r0, %r0, 4095(%r1) +0xa8 0x00 0x1f 0xff + +# CHECK: mvcle %r14, %r0, 0 +0xa8 0xe0 0x00 0x00 + +# CHECK: mvclu %r0, %r0, -524288 +0xeb 0x00 0x00 0x00 0x80 0x8e + +# CHECK: mvclu %r0, %r0, -1 +0xeb 0x00 0x0f 0xff 0xff 0x8e + +# CHECK: mvclu %r0, %r14, 0 +0xeb 0x0e 0x00 0x00 0x00 0x8e + +# CHECK: mvclu %r0, %r14, 1 +0xeb 0x0e 0x00 0x01 0x00 0x8e + +# CHECK: mvclu %r0, %r8, 524287 +0xeb 0x08 0x0f 0xff 0x7f 0x8e + +# CHECK: mvclu %r0, %r8, 0(%r1) +0xeb 0x08 0x10 0x00 0x00 0x8e + +# CHECK: mvclu %r0, %r4, 0(%r15) +0xeb 0x04 0xf0 0x00 0x00 0x8e + +# CHECK: mvclu %r0, %r4, 524287(%r15) +0xeb 0x04 0xff 0xff 0x7f 0x8e + +# CHECK: mvclu %r0, %r0, 524287(%r1) +0xeb 0x00 0x1f 0xff 0x7f 0x8e + +# CHECK: mvclu %r14, %r0, 0 +0xeb 0xe0 0x00 0x00 0x00 0x8e + # CHECK: mvghi 0, 0 0xe5 0x48 0x00 0x00 0x00 0x00 @@ -9898,6 +10072,18 @@ # CHECK: srst %r7, %r8 0xb2 0x5e 0x00 0x78 +# CHECK: srstu %r0, %r0 +0xb9 0xbe 0x00 0x00 + +# CHECK: srstu %r0, %r15 +0xb9 0xbe 0x00 0x0f + +# CHECK: srstu %r15, %r0 +0xb9 0xbe 0x00 0xf0 + +# CHECK: srstu %r7, %r8 +0xb9 0xbe 0x00 0x78 + # CHECK: st %r0, 0 0x50 0x00 0x00 0x00 diff --git a/llvm/test/MC/SystemZ/insn-bad.s b/llvm/test/MC/SystemZ/insn-bad.s index 3ec18611065..d03d6c962dd 100644 --- a/llvm/test/MC/SystemZ/insn-bad.s +++ b/llvm/test/MC/SystemZ/insn-bad.s @@ -1081,6 +1081,42 @@ clc 0(1,%r2), 0(%r1,%r2) clc 0(-), 0 +#CHECK: error: invalid register pair +#CHECK: clcl %r1, %r0 +#CHECK: error: invalid register pair +#CHECK: clcl %r0, %r1 + + clcl %r1, %r0 + clcl %r0, %r1 + +#CHECK: error: invalid register pair +#CHECK: clcle %r1, %r0 +#CHECK: error: invalid register pair +#CHECK: clcle %r0, %r1 +#CHECK: error: invalid operand +#CHECK: clcle %r0, %r0, -1 +#CHECK: error: invalid operand +#CHECK: clcle %r0, %r0, 4096 + + clcle %r1, %r0, 0 + clcle %r0, %r1, 0 + clcle %r0, %r0, -1 + clcle %r0, %r0, 4096 + +#CHECK: error: invalid register pair +#CHECK: clclu %r1, %r0 +#CHECK: error: invalid register pair +#CHECK: clclu %r0, %r1 +#CHECK: error: invalid operand +#CHECK: clclu %r0, %r0, -524289 +#CHECK: error: invalid operand +#CHECK: clclu %r0, %r0, 524288 + + clclu %r1, %r0, 0 + clclu %r0, %r1, 0 + clclu %r0, %r0, -524289 + clclu %r0, %r0, 524288 + #CHECK: error: instruction requires: fp-extension #CHECK: clfdbr %r0, 0, %f0, 0 @@ -1551,6 +1587,14 @@ csy %r0, %r0, 0(%r1,%r2) #CHECK: error: invalid register pair +#CHECK: cuse %r1, %r0 +#CHECK: error: invalid register pair +#CHECK: cuse %r0, %r1 + + cuse %r1, %r0 + cuse %r0, %r1 + +#CHECK: error: invalid register pair #CHECK: cxbr %f0, %f2 #CHECK: error: invalid register pair #CHECK: cxbr %f2, %f0 @@ -2745,6 +2789,50 @@ mvc 0(1,%r2), 0(%r1,%r2) mvc 0(-), 0 +#CHECK: error: missing length in address +#CHECK: mvcin 0, 0 +#CHECK: error: missing length in address +#CHECK: mvcin 0(%r1), 0(%r1) +#CHECK: error: invalid use of length addressing +#CHECK: mvcin 0(1,%r1), 0(2,%r1) +#CHECK: error: invalid operand +#CHECK: mvcin 0(0,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: mvcin 0(257,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: mvcin -1(1,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: mvcin 4096(1,%r1), 0(%r1) +#CHECK: error: invalid operand +#CHECK: mvcin 0(1,%r1), -1(%r1) +#CHECK: error: invalid operand +#CHECK: mvcin 0(1,%r1), 4096(%r1) +#CHECK: error: %r0 used in an address +#CHECK: mvcin 0(1,%r0), 0(%r1) +#CHECK: error: %r0 used in an address +#CHECK: mvcin 0(1,%r1), 0(%r0) +#CHECK: error: invalid use of indexed addressing +#CHECK: mvcin 0(%r1,%r2), 0(%r1) +#CHECK: error: invalid use of indexed addressing +#CHECK: mvcin 0(1,%r2), 0(%r1,%r2) +#CHECK: error: unknown token in expression +#CHECK: mvcin 0(-), 0 + + mvcin 0, 0 + mvcin 0(%r1), 0(%r1) + mvcin 0(1,%r1), 0(2,%r1) + mvcin 0(0,%r1), 0(%r1) + mvcin 0(257,%r1), 0(%r1) + mvcin -1(1,%r1), 0(%r1) + mvcin 4096(1,%r1), 0(%r1) + mvcin 0(1,%r1), -1(%r1) + mvcin 0(1,%r1), 4096(%r1) + mvcin 0(1,%r0), 0(%r1) + mvcin 0(1,%r1), 0(%r0) + mvcin 0(%r1,%r2), 0(%r1) + mvcin 0(1,%r2), 0(%r1,%r2) + mvcin 0(-), 0 + #CHECK: error: invalid use of length addressing #CHECK: mvck 0(%r1,%r1), 0(2,%r1), %r3 #CHECK: error: invalid operand @@ -2774,6 +2862,42 @@ mvck 0(%r1,%r2), 0(%r1,%r2), %r3 mvck 0(-), 0, %r3 +#CHECK: error: invalid register pair +#CHECK: mvcl %r1, %r0 +#CHECK: error: invalid register pair +#CHECK: mvcl %r0, %r1 + + mvcl %r1, %r0 + mvcl %r0, %r1 + +#CHECK: error: invalid register pair +#CHECK: mvcle %r1, %r0 +#CHECK: error: invalid register pair +#CHECK: mvcle %r0, %r1 +#CHECK: error: invalid operand +#CHECK: mvcle %r0, %r0, -1 +#CHECK: error: invalid operand +#CHECK: mvcle %r0, %r0, 4096 + + mvcle %r1, %r0, 0 + mvcle %r0, %r1, 0 + mvcle %r0, %r0, -1 + mvcle %r0, %r0, 4096 + +#CHECK: error: invalid register pair +#CHECK: mvclu %r1, %r0 +#CHECK: error: invalid register pair +#CHECK: mvclu %r0, %r1 +#CHECK: error: invalid operand +#CHECK: mvclu %r0, %r0, -524289 +#CHECK: error: invalid operand +#CHECK: mvclu %r0, %r0, 524288 + + mvclu %r1, %r0, 0 + mvclu %r0, %r1, 0 + mvclu %r0, %r0, -524289 + mvclu %r0, %r0, 524288 + #CHECK: error: invalid operand #CHECK: mvghi -1, 0 #CHECK: error: invalid operand diff --git a/llvm/test/MC/SystemZ/insn-good.s b/llvm/test/MC/SystemZ/insn-good.s index ab6f988aa4c..d3060356522 100644 --- a/llvm/test/MC/SystemZ/insn-good.s +++ b/llvm/test/MC/SystemZ/insn-good.s @@ -3477,6 +3477,54 @@ clc 0(256,%r1), 0 clc 0(256,%r15), 0 +#CHECK: clcl %r0, %r8 # encoding: [0x0f,0x08] +#CHECK: clcl %r0, %r14 # encoding: [0x0f,0x0e] +#CHECK: clcl %r14, %r0 # encoding: [0x0f,0xe0] +#CHECK: clcl %r14, %r8 # encoding: [0x0f,0xe8] + + clcl %r0, %r8 + clcl %r0, %r14 + clcl %r14, %r0 + clcl %r14, %r8 + +#CHECK: clcle %r0, %r0, 0 # encoding: [0xa9,0x00,0x00,0x00] +#CHECK: clcle %r0, %r14, 4095 # encoding: [0xa9,0x0e,0x0f,0xff] +#CHECK: clcle %r0, %r0, 0(%r1) # encoding: [0xa9,0x00,0x10,0x00] +#CHECK: clcle %r0, %r0, 0(%r15) # encoding: [0xa9,0x00,0xf0,0x00] +#CHECK: clcle %r14, %r14, 4095(%r1) # encoding: [0xa9,0xee,0x1f,0xff] +#CHECK: clcle %r0, %r0, 4095(%r15) # encoding: [0xa9,0x00,0xff,0xff] +#CHECK: clcle %r14, %r0, 0 # encoding: [0xa9,0xe0,0x00,0x00] + + clcle %r0, %r0, 0 + clcle %r0, %r14, 4095 + clcle %r0, %r0, 0(%r1) + clcle %r0, %r0, 0(%r15) + clcle %r14, %r14, 4095(%r1) + clcle %r0, %r0, 4095(%r15) + clcle %r14, %r0, 0 + +#CHECK: clclu %r0, %r0, -524288 # encoding: [0xeb,0x00,0x00,0x00,0x80,0x8f] +#CHECK: clclu %r0, %r0, -1 # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x8f] +#CHECK: clclu %r0, %r14, 0 # encoding: [0xeb,0x0e,0x00,0x00,0x00,0x8f] +#CHECK: clclu %r0, %r14, 1 # encoding: [0xeb,0x0e,0x00,0x01,0x00,0x8f] +#CHECK: clclu %r0, %r8, 524287 # encoding: [0xeb,0x08,0x0f,0xff,0x7f,0x8f] +#CHECK: clclu %r0, %r8, 0(%r1) # encoding: [0xeb,0x08,0x10,0x00,0x00,0x8f] +#CHECK: clclu %r0, %r4, 0(%r15) # encoding: [0xeb,0x04,0xf0,0x00,0x00,0x8f] +#CHECK: clclu %r0, %r4, 524287(%r15) # encoding: [0xeb,0x04,0xff,0xff,0x7f,0x8f] +#CHECK: clclu %r0, %r0, 524287(%r1) # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0x8f] +#CHECK: clclu %r14, %r0, 0 # encoding: [0xeb,0xe0,0x00,0x00,0x00,0x8f] + + clclu %r0, %r0, -524288 + clclu %r0, %r0, -1 + clclu %r0, %r14, 0 + clclu %r0, %r14, 1 + clclu %r0, %r8, 524287 + clclu %r0, %r8, 0(%r1) + clclu %r0, %r4, 0(%r15) + clclu %r0, %r4, 524287(%r15) + clclu %r0, %r0, 524287(%r1) + clclu %r14, %r0, 0 + #CHECK: clfhsi 0, 0 # encoding: [0xe5,0x5d,0x00,0x00,0x00,0x00] #CHECK: clfhsi 4095, 0 # encoding: [0xe5,0x5d,0x0f,0xff,0x00,0x00] #CHECK: clfhsi 0, 65535 # encoding: [0xe5,0x5d,0x00,0x00,0xff,0xff] @@ -5661,6 +5709,16 @@ csy %r0, %r15, 0 csy %r15, %r0, 0 +#CHECK: cuse %r0, %r8 # encoding: [0xb2,0x57,0x00,0x08] +#CHECK: cuse %r0, %r14 # encoding: [0xb2,0x57,0x00,0x0e] +#CHECK: cuse %r14, %r0 # encoding: [0xb2,0x57,0x00,0xe0] +#CHECK: cuse %r14, %r8 # encoding: [0xb2,0x57,0x00,0xe8] + + cuse %r0, %r8 + cuse %r0, %r14 + cuse %r14, %r0 + cuse %r14, %r8 + #CHECK: cxbr %f0, %f0 # encoding: [0xb3,0x49,0x00,0x00] #CHECK: cxbr %f0, %f13 # encoding: [0xb3,0x49,0x00,0x0d] #CHECK: cxbr %f8, %f8 # encoding: [0xb3,0x49,0x00,0x88] @@ -8434,6 +8492,32 @@ mvc 0(256,%r1), 0 mvc 0(256,%r15), 0 +#CHECK: mvcin 0(1), 0 # encoding: [0xe8,0x00,0x00,0x00,0x00,0x00] +#CHECK: mvcin 0(1), 0(%r1) # encoding: [0xe8,0x00,0x00,0x00,0x10,0x00] +#CHECK: mvcin 0(1), 0(%r15) # encoding: [0xe8,0x00,0x00,0x00,0xf0,0x00] +#CHECK: mvcin 0(1), 4095 # encoding: [0xe8,0x00,0x00,0x00,0x0f,0xff] +#CHECK: mvcin 0(1), 4095(%r1) # encoding: [0xe8,0x00,0x00,0x00,0x1f,0xff] +#CHECK: mvcin 0(1), 4095(%r15) # encoding: [0xe8,0x00,0x00,0x00,0xff,0xff] +#CHECK: mvcin 0(1,%r1), 0 # encoding: [0xe8,0x00,0x10,0x00,0x00,0x00] +#CHECK: mvcin 0(1,%r15), 0 # encoding: [0xe8,0x00,0xf0,0x00,0x00,0x00] +#CHECK: mvcin 4095(1,%r1), 0 # encoding: [0xe8,0x00,0x1f,0xff,0x00,0x00] +#CHECK: mvcin 4095(1,%r15), 0 # encoding: [0xe8,0x00,0xff,0xff,0x00,0x00] +#CHECK: mvcin 0(256,%r1), 0 # encoding: [0xe8,0xff,0x10,0x00,0x00,0x00] +#CHECK: mvcin 0(256,%r15), 0 # encoding: [0xe8,0xff,0xf0,0x00,0x00,0x00] + + mvcin 0(1), 0 + mvcin 0(1), 0(%r1) + mvcin 0(1), 0(%r15) + mvcin 0(1), 4095 + mvcin 0(1), 4095(%r1) + mvcin 0(1), 4095(%r15) + mvcin 0(1,%r1), 0 + mvcin 0(1,%r15), 0 + mvcin 4095(1,%r1), 0 + mvcin 4095(1,%r15), 0 + mvcin 0(256,%r1), 0 + mvcin 0(256,%r15), 0 + #CHECK: mvck 0(%r0), 0, %r3 # encoding: [0xd9,0x03,0x00,0x00,0x00,0x00] #CHECK: mvck 0(%r1), 0, %r3 # encoding: [0xd9,0x13,0x00,0x00,0x00,0x00] #CHECK: mvck 0(%r1), 0(%r1), %r3 # encoding: [0xd9,0x13,0x00,0x00,0x10,0x00] @@ -8462,6 +8546,54 @@ mvck 0(%r2,%r1), 0, %r3 mvck 0(%r2,%r15), 0, %r3 +#CHECK: mvcl %r0, %r8 # encoding: [0x0e,0x08] +#CHECK: mvcl %r0, %r14 # encoding: [0x0e,0x0e] +#CHECK: mvcl %r14, %r0 # encoding: [0x0e,0xe0] +#CHECK: mvcl %r14, %r8 # encoding: [0x0e,0xe8] + + mvcl %r0, %r8 + mvcl %r0, %r14 + mvcl %r14, %r0 + mvcl %r14, %r8 + +#CHECK: mvcle %r0, %r0, 0 # encoding: [0xa8,0x00,0x00,0x00] +#CHECK: mvcle %r0, %r14, 4095 # encoding: [0xa8,0x0e,0x0f,0xff] +#CHECK: mvcle %r0, %r0, 0(%r1) # encoding: [0xa8,0x00,0x10,0x00] +#CHECK: mvcle %r0, %r0, 0(%r15) # encoding: [0xa8,0x00,0xf0,0x00] +#CHECK: mvcle %r14, %r14, 4095(%r1) # encoding: [0xa8,0xee,0x1f,0xff] +#CHECK: mvcle %r0, %r0, 4095(%r15) # encoding: [0xa8,0x00,0xff,0xff] +#CHECK: mvcle %r14, %r0, 0 # encoding: [0xa8,0xe0,0x00,0x00] + + mvcle %r0, %r0, 0 + mvcle %r0, %r14, 4095 + mvcle %r0, %r0, 0(%r1) + mvcle %r0, %r0, 0(%r15) + mvcle %r14, %r14, 4095(%r1) + mvcle %r0, %r0, 4095(%r15) + mvcle %r14, %r0, 0 + +#CHECK: mvclu %r0, %r0, -524288 # encoding: [0xeb,0x00,0x00,0x00,0x80,0x8e] +#CHECK: mvclu %r0, %r0, -1 # encoding: [0xeb,0x00,0x0f,0xff,0xff,0x8e] +#CHECK: mvclu %r0, %r14, 0 # encoding: [0xeb,0x0e,0x00,0x00,0x00,0x8e] +#CHECK: mvclu %r0, %r14, 1 # encoding: [0xeb,0x0e,0x00,0x01,0x00,0x8e] +#CHECK: mvclu %r0, %r8, 524287 # encoding: [0xeb,0x08,0x0f,0xff,0x7f,0x8e] +#CHECK: mvclu %r0, %r8, 0(%r1) # encoding: [0xeb,0x08,0x10,0x00,0x00,0x8e] +#CHECK: mvclu %r0, %r4, 0(%r15) # encoding: [0xeb,0x04,0xf0,0x00,0x00,0x8e] +#CHECK: mvclu %r0, %r4, 524287(%r15) # encoding: [0xeb,0x04,0xff,0xff,0x7f,0x8e] +#CHECK: mvclu %r0, %r0, 524287(%r1) # encoding: [0xeb,0x00,0x1f,0xff,0x7f,0x8e] +#CHECK: mvclu %r14, %r0, 0 # encoding: [0xeb,0xe0,0x00,0x00,0x00,0x8e] + + mvclu %r0, %r0, -524288 + mvclu %r0, %r0, -1 + mvclu %r0, %r14, 0 + mvclu %r0, %r14, 1 + mvclu %r0, %r8, 524287 + mvclu %r0, %r8, 0(%r1) + mvclu %r0, %r4, 0(%r15) + mvclu %r0, %r4, 524287(%r15) + mvclu %r0, %r0, 524287(%r1) + mvclu %r14, %r0, 0 + #CHECK: mvghi 0, 0 # encoding: [0xe5,0x48,0x00,0x00,0x00,0x00] #CHECK: mvghi 4095, 0 # encoding: [0xe5,0x48,0x0f,0xff,0x00,0x00] #CHECK: mvghi 0, -32768 # encoding: [0xe5,0x48,0x00,0x00,0x80,0x00] @@ -9882,6 +10014,16 @@ srst %r15,%r0 srst %r7,%r8 +#CHECK: srstu %r0, %r0 # encoding: [0xb9,0xbe,0x00,0x00] +#CHECK: srstu %r0, %r15 # encoding: [0xb9,0xbe,0x00,0x0f] +#CHECK: srstu %r15, %r0 # encoding: [0xb9,0xbe,0x00,0xf0] +#CHECK: srstu %r7, %r8 # encoding: [0xb9,0xbe,0x00,0x78] + + srstu %r0,%r0 + srstu %r0,%r15 + srstu %r15,%r0 + srstu %r7,%r8 + #CHECK: st %r0, 0 # encoding: [0x50,0x00,0x00,0x00] #CHECK: st %r0, 4095 # encoding: [0x50,0x00,0x0f,0xff] #CHECK: st %r0, 0(%r1) # encoding: [0x50,0x00,0x10,0x00] |
