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-rw-r--r--llvm/test/MC/Mips/mips-alu-instructions.s2
-rw-r--r--llvm/test/MC/Mips/mips-hwr-register-names.s199
-rw-r--r--llvm/test/MC/Mips/mips32r2/valid.s7
-rw-r--r--llvm/test/MC/Mips/mips32r6/valid.s6
-rw-r--r--llvm/test/MC/Mips/mips64-alu-instructions.s2
-rw-r--r--llvm/test/MC/Mips/mips64r2/valid.s7
-rw-r--r--llvm/test/MC/Mips/mips64r6/valid.s6
7 files changed, 4 insertions, 225 deletions
diff --git a/llvm/test/MC/Mips/mips-alu-instructions.s b/llvm/test/MC/Mips/mips-alu-instructions.s
index ccc81ebedea..b25394b39a6 100644
--- a/llvm/test/MC/Mips/mips-alu-instructions.s
+++ b/llvm/test/MC/Mips/mips-alu-instructions.s
@@ -94,7 +94,7 @@
# CHECK: move $7, $8 # encoding: [0x21,0x38,0x00,0x01]
# CHECK: .set push
# CHECK: .set mips32r2
-# CHECK: rdhwr $5, $hwr_ulr
+# CHECK: rdhwr $5, $29
# CHECK: .set pop # encoding: [0x3b,0xe8,0x05,0x7c]
add $9,$6,$7
add $9,$6,17767
diff --git a/llvm/test/MC/Mips/mips-hwr-register-names.s b/llvm/test/MC/Mips/mips-hwr-register-names.s
deleted file mode 100644
index ddb03ae17f2..00000000000
--- a/llvm/test/MC/Mips/mips-hwr-register-names.s
+++ /dev/null
@@ -1,199 +0,0 @@
-# Check the hardware registers
-#
-# FIXME: Use the code generator in order to print the .set directives
-# instead of the instruction printer.
-#
-# RUN: llvm-mc %s -triple=mips-unknown-linux -show-encoding -mcpu=mips32r2 | \
-# RUN: FileCheck %s
- .set noat
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $hwr_cpunum
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x00,0x3b]
- rdhwr $a0,$hwr_cpunum
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $hwr_cpunum
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x00,0x3b]
- rdhwr $a0,$0
-
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $5, $hwr_synci_step
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x05,0x08,0x3b]
- rdhwr $a1,$hwr_synci_step
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $5, $hwr_synci_step
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x05,0x08,0x3b]
- rdhwr $a1,$1
-
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $6, $hwr_cc
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x06,0x10,0x3b]
- rdhwr $a2,$hwr_cc
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $6, $hwr_cc
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x06,0x10,0x3b]
- rdhwr $a2,$2
-
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $7, $hwr_ccres
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x07,0x18,0x3b]
- rdhwr $a3,$hwr_ccres
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $7, $hwr_ccres
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x07,0x18,0x3b]
- rdhwr $a3,$3
-
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $4
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x20,0x3b]
- rdhwr $a0,$4
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $5
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x28,0x3b]
- rdhwr $a0,$5
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $6
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x30,0x3b]
- rdhwr $a0,$6
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $7
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x38,0x3b]
- rdhwr $a0,$7
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $8
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x40,0x3b]
- rdhwr $a0,$8
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $9
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x48,0x3b]
- rdhwr $a0,$9
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $10
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x50,0x3b]
- rdhwr $a0,$10
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $11
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x58,0x3b]
- rdhwr $a0,$11
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $12
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x60,0x3b]
- rdhwr $a0,$12
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $13
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x68,0x3b]
- rdhwr $a0,$13
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $14
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x70,0x3b]
- rdhwr $a0,$14
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $15
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x78,0x3b]
- rdhwr $a0,$15
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $16
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x80,0x3b]
- rdhwr $a0,$16
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $17
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x88,0x3b]
- rdhwr $a0,$17
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $18
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x90,0x3b]
- rdhwr $a0,$18
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $19
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0x98,0x3b]
- rdhwr $a0,$19
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $20
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xa0,0x3b]
- rdhwr $a0,$20
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $21
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xa8,0x3b]
- rdhwr $a0,$21
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $22
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xb0,0x3b]
- rdhwr $a0,$22
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $23
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xb8,0x3b]
- rdhwr $a0,$23
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $24
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xc0,0x3b]
- rdhwr $a0,$24
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $25
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xc8,0x3b]
- rdhwr $a0,$25
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $26
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xd0,0x3b]
- rdhwr $a0,$26
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $27
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xd8,0x3b]
- rdhwr $a0,$27
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $28
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xe0,0x3b]
- rdhwr $a0,$28
-
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $hwr_ulr
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xe8,0x3b]
- rdhwr $a0,$hwr_ulr
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $hwr_ulr
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xe8,0x3b]
- rdhwr $a0,$29
-
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $30
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xf0,0x3b]
- rdhwr $a0,$30
- # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $4, $31
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x04,0xf8,0x3b]
- rdhwr $a0,$31
diff --git a/llvm/test/MC/Mips/mips32r2/valid.s b/llvm/test/MC/Mips/mips32r2/valid.s
index 4ef5aabb87f..2b60be5ddb5 100644
--- a/llvm/test/MC/Mips/mips32r2/valid.s
+++ b/llvm/test/MC/Mips/mips32r2/valid.s
@@ -151,12 +151,7 @@
or $2, 4 # CHECK: ori $2, $2, 4 # encoding: [0x34,0x42,0x00,0x04]
pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40]
pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0xcc,0xa1,0x00,0x08]
- # FIXME: Use the code generator in order to print the .set directives
- # instead of the instruction printer.
- rdhwr $sp,$11 # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $sp, $11
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b]
+ rdhwr $sp,$11
rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2]
rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2]
rotrv $1,$14,$15 # CHECK: rotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x46]
diff --git a/llvm/test/MC/Mips/mips32r6/valid.s b/llvm/test/MC/Mips/mips32r6/valid.s
index 362785ba7ef..37e3cb85d4a 100644
--- a/llvm/test/MC/Mips/mips32r6/valid.s
+++ b/llvm/test/MC/Mips/mips32r6/valid.s
@@ -119,12 +119,6 @@
msubf.s $f2,$f3,$f4 # CHECK: msubf.s $f2, $f3, $f4 # encoding: [0x46,0x04,0x18,0x99]
msubf.d $f2,$f3,$f4 # CHECK: msubf.d $f2, $f3, $f4 # encoding: [0x46,0x24,0x18,0x99]
pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0x7c,0xa1,0x04,0x35]
- # FIXME: Use the code generator in order to print the .set directives
- # instead of the instruction printer.
- rdhwr $sp,$11 # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $sp, $11
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b]
sel.d $f0,$f1,$f2 # CHECK: sel.d $f0, $f1, $f2 # encoding: [0x46,0x22,0x08,0x10]
sel.s $f0,$f1,$f2 # CHECK: sel.s $f0, $f1, $f2 # encoding: [0x46,0x02,0x08,0x10]
seleqz $2,$3,$4 # CHECK: seleqz $2, $3, $4 # encoding: [0x00,0x64,0x10,0x35]
diff --git a/llvm/test/MC/Mips/mips64-alu-instructions.s b/llvm/test/MC/Mips/mips64-alu-instructions.s
index 262805a5146..19ed1ffad1c 100644
--- a/llvm/test/MC/Mips/mips64-alu-instructions.s
+++ b/llvm/test/MC/Mips/mips64-alu-instructions.s
@@ -87,7 +87,7 @@
# CHECK: move $7, $8 # encoding: [0x2d,0x38,0x00,0x01]
# CHECK: .set push
# CHECK: .set mips32r2
-# CHECK: rdhwr $5, $hwr_ulr
+# CHECK: rdhwr $5, $29
# CHECK: .set pop # encoding: [0x3b,0xe8,0x05,0x7c]
dadd $9,$6,$7
diff --git a/llvm/test/MC/Mips/mips64r2/valid.s b/llvm/test/MC/Mips/mips64r2/valid.s
index 77172380bdf..b846cf818f0 100644
--- a/llvm/test/MC/Mips/mips64r2/valid.s
+++ b/llvm/test/MC/Mips/mips64r2/valid.s
@@ -213,12 +213,7 @@
or $2, 4 # CHECK: ori $2, $2, 4 # encoding: [0x34,0x42,0x00,0x04]
pause # CHECK: pause # encoding: [0x00,0x00,0x01,0x40]
pref 1, 8($5) # CHECK: pref 1, 8($5) # encoding: [0xcc,0xa1,0x00,0x08]
- # FIXME: Use the code generator in order to print the .set directives
- # instead of the instruction printer.
- rdhwr $sp,$11 # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $sp, $11
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b]
+ rdhwr $sp,$11
rotr $1,15 # CHECK: rotr $1, $1, 15 # encoding: [0x00,0x21,0x0b,0xc2]
rotr $1,$14,15 # CHECK: rotr $1, $14, 15 # encoding: [0x00,0x2e,0x0b,0xc2]
rotrv $1,$14,$15 # CHECK: rotrv $1, $14, $15 # encoding: [0x01,0xee,0x08,0x46]
diff --git a/llvm/test/MC/Mips/mips64r6/valid.s b/llvm/test/MC/Mips/mips64r6/valid.s
index 3e8fc415626..bd583a253b8 100644
--- a/llvm/test/MC/Mips/mips64r6/valid.s
+++ b/llvm/test/MC/Mips/mips64r6/valid.s
@@ -155,12 +155,6 @@
seleqz.d $f0, $f2, $f4 # CHECK: seleqz.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x14]
selnez.s $f0, $f2, $f4 # CHECK: selnez.s $f0, $f2, $f4 # encoding: [0x46,0x04,0x10,0x17]
selnez.d $f0, $f2, $f4 # CHECK: selnez.d $f0, $f2, $f4 # encoding: [0x46,0x24,0x10,0x17]
- # FIXME: Use the code generator in order to print the .set directives
- # instead of the instruction printer.
- rdhwr $sp,$11 # CHECK: .set push
- # CHECK-NEXT: .set mips32r2
- # CHECK-NEXT: rdhwr $sp, $11
- # CHECK-NEXT: .set pop # encoding: [0x7c,0x1d,0x58,0x3b]
rint.s $f2, $f4 # CHECK: rint.s $f2, $f4 # encoding: [0x46,0x00,0x20,0x9a]
rint.d $f2, $f4 # CHECK: rint.d $f2, $f4 # encoding: [0x46,0x20,0x20,0x9a]
class.s $f2, $f4 # CHECK: class.s $f2, $f4 # encoding: [0x46,0x00,0x20,0x9b]
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