diff options
Diffstat (limited to 'llvm/test/MC/Mips/mips64r6/invalid.s')
| -rw-r--r-- | llvm/test/MC/Mips/mips64r6/invalid.s | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/llvm/test/MC/Mips/mips64r6/invalid.s b/llvm/test/MC/Mips/mips64r6/invalid.s index e7e8ae5efa5..acdd247868f 100644 --- a/llvm/test/MC/Mips/mips64r6/invalid.s +++ b/llvm/test/MC/Mips/mips64r6/invalid.s @@ -93,3 +93,39 @@ local_label: dsrl32 $32, $32, 32 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction dsrlv $2, $4, 2 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction dsrlv $32, $32, $32 # CHECK: :[[@LINE]]:{{[0-9]+}}: error: invalid operand for instruction + lb $32, 8($5) # CHECK: :[[@LINE]]:12: error: invalid operand for instruction + lb $4, -32769($5) # CHECK: :[[@LINE]]:16: error: expected memory with 16-bit signed offset + lb $4, 32768($5) # CHECK: :[[@LINE]]:16: error: expected memory with 16-bit signed offset + lb $4, 8($32) # CHECK: :[[@LINE]]:16: error: expected memory with 16-bit signed offset + lbu $32, 8($5) # CHECK: :[[@LINE]]:13: error: invalid operand for instruction + lbu $4, -32769($5) # CHECK: :[[@LINE]]:17: error: expected memory with 16-bit signed offset + lbu $4, 32768($5) # CHECK: :[[@LINE]]:17: error: expected memory with 16-bit signed offset + lbu $4, 8($32) # CHECK: :[[@LINE]]:17: error: expected memory with 16-bit signed offset + ldc1 $f32, 300($10) # CHECK: :[[@LINE]]:14: error: invalid operand for instruction + ldc1 $f7, -32769($10) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset + ldc1 $f7, 32768($10) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset + ldc1 $f7, 300($32) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset + sdc1 $f32, 64($10) # CHECK: :[[@LINE]]:14: error: invalid operand for instruction + sdc1 $f7, -32769($10) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset + sdc1 $f7, 32768($10) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset + sdc1 $f7, 64($32) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset + lwc1 $f32, 32($5) # CHECK: :[[@LINE]]:14: error: invalid operand for instruction + lwc1 $f2, -32769($5) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset + lwc1 $f2, 32768($5) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset + lwc1 $f2, 32($32) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset + swc1 $f32, 369($13) # CHECK: :[[@LINE]]:14: error: invalid operand for instruction + swc1 $f6, -32769($13) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset + swc1 $f6, 32768($13) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset + swc1 $f6, 369($32) # CHECK: :[[@LINE]]:19: error: expected memory with 16-bit signed offset + ldc2 $32, 1023($12) # CHECK: :[[@LINE]]:14: error: invalid operand for instruction + ldc2 $11, -1025($12) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + ldc2 $11, 1024($12) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + sdc2 $32, 8($16) # CHECK: :[[@LINE]]:14: error: invalid operand for instruction + sdc2 $11, -1025($12) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + sdc2 $11, 1024($12) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + lwc2 $32, 16($4) # CHECK: :[[@LINE]]:14: error: invalid operand for instruction + lwc2 $11, -1025($12) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + lwc2 $11, 1024($12) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + swc2 $32, 777($17) # CHECK: :[[@LINE]]:14: error: invalid operand for instruction + swc2 $11, -1025($12) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled + swc2 $11, 1024($12) # CHECK: :[[@LINE]]:{{[0-9]+}}: error: instruction requires a CPU feature not currently enabled |
