diff options
Diffstat (limited to 'llvm/test/DebugInfo/WebAssembly')
| -rw-r--r-- | llvm/test/DebugInfo/WebAssembly/dbg-value-live-interval.ll | 2 | ||||
| -rw-r--r-- | llvm/test/DebugInfo/WebAssembly/dbg-value-move-2.ll | 2 | ||||
| -rw-r--r-- | llvm/test/DebugInfo/WebAssembly/dbg-value-move.ll | 2 |
3 files changed, 3 insertions, 3 deletions
diff --git a/llvm/test/DebugInfo/WebAssembly/dbg-value-live-interval.ll b/llvm/test/DebugInfo/WebAssembly/dbg-value-live-interval.ll index b79ef23fc96..1754d2a7a21 100644 --- a/llvm/test/DebugInfo/WebAssembly/dbg-value-live-interval.ll +++ b/llvm/test/DebugInfo/WebAssembly/dbg-value-live-interval.ll @@ -3,7 +3,7 @@ ; CHECK: After WebAssembly Optimize Live Intervals: ; CHECK: bb.3.for.body.for.body_crit_edge: ; CHECK: [[REG:%[0-9]+]]:i32 = nsw ADD_I32 {{.*}} fib.c:7:7 -; CHECK: DBG_VALUE debug-use [[REG]]:i32, debug-use $noreg, !"a", {{.*}} fib.c:5:13 +; CHECK: DBG_VALUE [[REG]]:i32, $noreg, !"a", {{.*}} fib.c:5:13 ; CHECK: After WebAssembly Store Results: ; ModuleID = 'fib.bc' diff --git a/llvm/test/DebugInfo/WebAssembly/dbg-value-move-2.ll b/llvm/test/DebugInfo/WebAssembly/dbg-value-move-2.ll index 30a87d1f3cd..90e8b66609b 100644 --- a/llvm/test/DebugInfo/WebAssembly/dbg-value-move-2.ll +++ b/llvm/test/DebugInfo/WebAssembly/dbg-value-move-2.ll @@ -3,7 +3,7 @@ ; CHECK: After WebAssembly Register Stackify: ; CHECK: bb.2.for.body: ; CHECK: [[REG:%[0-9]+]]:i32 = TEE_I32 {{.*}} fib2.c:6:7 -; CHECK-NEXT: DBG_VALUE debug-use [[REG]]:i32, debug-use $noreg, !"a", {{.*}} fib2.c:2:13 +; CHECK-NEXT: DBG_VALUE [[REG]]:i32, $noreg, !"a", {{.*}} fib2.c:2:13 ; CHECK: After WebAssembly Register Coloring: ; ModuleID = 'fib2.bc' diff --git a/llvm/test/DebugInfo/WebAssembly/dbg-value-move.ll b/llvm/test/DebugInfo/WebAssembly/dbg-value-move.ll index 7644b97a7b7..8514f3dcaa7 100644 --- a/llvm/test/DebugInfo/WebAssembly/dbg-value-move.ll +++ b/llvm/test/DebugInfo/WebAssembly/dbg-value-move.ll @@ -3,7 +3,7 @@ ; CHECK: After WebAssembly Register Stackify: ; CHECK: bb.3.for.body.for.body_crit_edge: ; CHECK: [[REG:%[0-9]+]]:i32 = nsw ADD_I32 {{.*}} fib.c:7:7 -; CHECK-NEXT: DBG_VALUE debug-use [[REG]]:i32, debug-use $noreg, !"a", {{.*}} fib.c:5:13 +; CHECK-NEXT: DBG_VALUE [[REG]]:i32, $noreg, !"a", {{.*}} fib.c:5:13 ; CHECK: After WebAssembly Register Coloring: ; ModuleID = 'fib.bc' |
