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-rw-r--r--llvm/test/CodeGen/ARM/cfi-alignment.ll48
-rw-r--r--llvm/test/CodeGen/ARM/eh-resume-darwin.ll7
-rw-r--r--llvm/test/CodeGen/ARM/v7k-abi-align.ll6
-rw-r--r--llvm/test/CodeGen/ARM/vfp-reg-stride.ll9
4 files changed, 67 insertions, 3 deletions
diff --git a/llvm/test/CodeGen/ARM/cfi-alignment.ll b/llvm/test/CodeGen/ARM/cfi-alignment.ll
new file mode 100644
index 00000000000..11add224265
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/cfi-alignment.ll
@@ -0,0 +1,48 @@
+; RUN: llc -mtriple=thumbv7k-apple-watchos7.0 -o - %s | FileCheck %s
+
+; Since d11 doesn't get pushed with the aligned registers, its frameindex
+; shouldn't be modified to say it has been.
+
+define void @foo() {
+; CHECK-LABEL: foo:
+; CHECK: push {r7, lr}
+; CHECK: .cfi_offset r7, -8
+; CHECK: vpush {d11}
+; CHECK: vpush {d8, d9}
+; CHECK: .cfi_offset d11, -16
+; CHECK: .cfi_offset d9, -24
+; CHECK: .cfi_offset d8, -32
+ call void asm sideeffect "", "~{d8},~{d9},~{d11}"()
+ call void @bar()
+ ret void
+}
+
+define void @variadic_foo(i8, ...) {
+; CHECK-LABEL: variadic_foo:
+; CHECK: sub sp, #12
+; CHECK: push {r7, lr}
+; CHECK: .cfi_offset r7, -20
+; CHECK: sub sp, #4
+; CHECK: vpush {d11}
+; CHECK: vpush {d8, d9}
+; CHECK: .cfi_offset d11, -32
+; CHECK: .cfi_offset d9, -40
+; CHECK: .cfi_offset d8, -48
+ call void asm sideeffect "", "~{d8},~{d9},~{d11}"()
+ call void @llvm.va_start(i8* null)
+ call void @bar()
+ ret void
+}
+
+define void @test_maintain_stack_align() {
+; CHECK-LABEL: test_maintain_stack_align:
+; CHECK: push {r7, lr}
+; CHECK: vpush {d8, d9}
+; CHECK: sub sp, #8
+ call void asm sideeffect "", "~{d8},~{d9}"()
+ call void @bar()
+ ret void
+}
+
+declare void @bar()
+declare void @llvm.va_start(i8*) nounwind
diff --git a/llvm/test/CodeGen/ARM/eh-resume-darwin.ll b/llvm/test/CodeGen/ARM/eh-resume-darwin.ll
index 0cd49775cfb..6ac025c6f05 100644
--- a/llvm/test/CodeGen/ARM/eh-resume-darwin.ll
+++ b/llvm/test/CodeGen/ARM/eh-resume-darwin.ll
@@ -1,5 +1,5 @@
-; RUN: llc < %s -march=arm | FileCheck %s
-target triple = "armv6-apple-macosx10.6"
+; RUN: llc < %s -mtriple=armv7-apple-ios -arm-atomic-cfg-tidy=0 | FileCheck %s -check-prefix=IOS
+; RUN: llc < %s -mtriple=armv7k-apple-watchos -arm-atomic-cfg-tidy=0 | FileCheck %s -check-prefix=WATCHOS
declare void @func()
@@ -19,4 +19,5 @@ lpad:
resume { i8*, i32 } %exn
}
-; CHECK: __Unwind_SjLj_Resume
+; IOS: __Unwind_SjLj_Resume
+; WATCHOS: __Unwind_Resume
diff --git a/llvm/test/CodeGen/ARM/v7k-abi-align.ll b/llvm/test/CodeGen/ARM/v7k-abi-align.ll
index f666efc2db9..e9b67f22edf 100644
--- a/llvm/test/CodeGen/ARM/v7k-abi-align.ll
+++ b/llvm/test/CodeGen/ARM/v7k-abi-align.ll
@@ -33,6 +33,8 @@ define void @test_dpr_unwind_align() {
; CHECK: push {r5, r6, r7, lr}
; CHECK-NOT: sub sp
; CHECK: vpush {d8, d9}
+; CHECK: .cfi_offset d9, -24
+; CHECK: .cfi_offset d8, -32
; [...]
; CHECK: bl _test_i64_align
; CHECK-NOT: add sp,
@@ -56,6 +58,8 @@ define void @test_dpr_unwind_align_manually() {
; CHECK: push.w {r8, r11}
; CHECK: sub sp, #4
; CHECK: vpush {d8, d9}
+; CHECK: .cfi_offset d9, -40
+; CHECK: .cfi_offset d8, -48
; [...]
; CHECK: bl _test_i64_align
; CHECK-NOT: add sp,
@@ -77,6 +81,8 @@ define void @test_dpr_unwind_align_just_cs1() {
; CHECK: push {r4, r5, r6, r7, lr}
; CHECK: sub sp, #4
; CHECK: vpush {d8, d9}
+; CHECK: .cfi_offset d9, -32
+; CHECK: .cfi_offset d8, -40
; CHECK: sub sp, #8
; [...]
; CHECK: bl _test_i64_align
diff --git a/llvm/test/CodeGen/ARM/vfp-reg-stride.ll b/llvm/test/CodeGen/ARM/vfp-reg-stride.ll
index 5484cc810b0..c5339db68e3 100644
--- a/llvm/test/CodeGen/ARM/vfp-reg-stride.ll
+++ b/llvm/test/CodeGen/ARM/vfp-reg-stride.ll
@@ -1,4 +1,5 @@
; RUN: llc -mcpu=swift -mtriple=thumbv7s-apple-ios -o - %s | FileCheck %s --check-prefix=CHECK-STRIDE4
+; RUN: llc -mcpu=swift -mtriple=thumbv7k-apple-watchos -o - %s | FileCheck %s --check-prefix=CHECK-STRIDE4-WATCH
; RUN: llc -mcpu=cortex-a57 -mtriple=thumbv7-linux-gnueabihf -o - %s | FileCheck %s --check-prefix=CHECK-GENERIC
define void @test_reg_stride(double %a, double %b) {
@@ -6,6 +7,10 @@ define void @test_reg_stride(double %a, double %b) {
; CHECK-STRIDE4-DAG: vmov d16, r
; CHECK-STRIDE4-DAG: vmov d18, r
+; CHECK-STRIDE4-WATCH-LABEL: test_reg_stride:
+; CHECK-STRIDE4-WATCH-DAG: vmov.f64 d16, d
+; CHECK-STRIDE4-WATCH-DAG: vmov.f64 d18, d
+
; CHECK-GENERIC-LABEL: test_reg_stride:
; CHECK-GENERIC-DAG: vmov.f64 d16, {{d[01]}}
; CHECK-GENERIC-DAG: vmov.f64 d17, {{d[01]}}
@@ -20,6 +25,10 @@ define void @test_stride_minsize(float %a, float %b) minsize {
; CHECK-STRIDE4: vmov d2, {{r[01]}}
; CHECK-STRIDE4: vmov d3, {{r[01]}}
+; CHECK-STRIDE4-WATCH-LABEL: test_stride_minsize:
+; CHECK-STRIDE4-WATCH-DAG: vmov.f32 s4, {{s[01]}}
+; CHECK-STRIDE4-WATCH-DAG: vmov.f32 s8, {{s[01]}}
+
; CHECK-GENERIC-LABEL: test_stride_minsize:
; CHECK-GENERIC-DAG: vmov.f32 s4, {{s[01]}}
; CHECK-GENERIC-DAG: vmov.f32 s6, {{s[01]}}
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