diff options
Diffstat (limited to 'llvm/test/CodeGen')
5 files changed, 19 insertions, 27 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir b/llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir index 673fff50b39..b939816600a 100644 --- a/llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir +++ b/llvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir @@ -1,4 +1,4 @@ -# RUN: llc -march=amdgcn -mcpu=gfx803 -run-pass si-memory-legalizer %s -o - | FileCheck %s +# RUN: llc -march=amdgcn -run-pass=si-memory-legalizer %s -o - | FileCheck %s --- | declare i32 @llvm.amdgcn.workitem.id.x() #0 @@ -33,13 +33,8 @@ declare void @llvm.amdgcn.end.cf(i64) - ; Function Attrs: nounwind - declare void @llvm.stackprotector(i8*, i8**) #3 - - attributes #0 = { nounwind readnone "target-cpu"="tahiti" } - attributes #1 = { nounwind "target-cpu"="tahiti" } - attributes #2 = { readnone } - attributes #3 = { nounwind } + attributes #0 = { nounwind readnone } + attributes #1 = { nounwind "target-cpu"="gfx803" } ... --- diff --git a/llvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline-ir.mir b/llvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline-ir.mir index 588c9a5df78..ccbc4ed8779 100644 --- a/llvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline-ir.mir +++ b/llvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline-ir.mir @@ -4,8 +4,11 @@ # FIXME: This overrides attributes that already are present. It should probably # only touch functions without an existing attribute. -# MCPU: attributes #0 = { "target-cpu"="hawaii" } -# MCPU-NOT: attributes #1 +# MCPU: @with_cpu_attr() #0 { +# MCPU: @no_cpu_attr() #1 { + +# MCPU: attributes #0 = { "target-cpu"="fiji" } +# MCPU: attributes #1 = { "target-cpu"="hawaii" } # MATTR: attributes #0 = { "target-cpu"="fiji" "target-features"="+unaligned-buffer-access" } # MATTR: attributes #1 = { "target-features"="+unaligned-buffer-access" } diff --git a/llvm/test/CodeGen/X86/avoid-sfb-overlaps.ll b/llvm/test/CodeGen/X86/avoid-sfb-overlaps.ll index bc48ed11711..38b4e2ee0b0 100644 --- a/llvm/test/CodeGen/X86/avoid-sfb-overlaps.ll +++ b/llvm/test/CodeGen/X86/avoid-sfb-overlaps.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=x86_64-linux -verify-machineinstrs | FileCheck %s -check-prefix=CHECK -; RUN: llc < %s -mtriple=x86_64-linux --x86-disable-avoid-SFB -verify-machineinstrs | FileCheck %s --check-prefix=DISABLED +; RUN: llc < %s -mtriple=x86_64-linux -mcpu=x86-64 -verify-machineinstrs | FileCheck %s -check-prefix=CHECK +; RUN: llc < %s -mtriple=x86_64-linux -mcpu=x86-64 --x86-disable-avoid-SFB -verify-machineinstrs | FileCheck %s --check-prefix=DISABLED ; RUN: llc < %s -mtriple=x86_64-linux -mcpu=core-avx2 -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-AVX2 ; RUN: llc < %s -mtriple=x86_64-linux -mcpu=skx -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-AVX512 @@ -515,7 +515,6 @@ entry: ret void } -attributes #0 = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-cpu"="x86-64" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } -attributes #1 = { argmemonly nounwind } - +attributes #0 = { nounwind uwtable "correctly-rounded-divide-sqrt-fp-math"="false" "disable-tail-calls"="false" "less-precise-fpmad"="false" "frame-pointer"="none" "no-infs-fp-math"="false" "no-jump-tables"="false" "no-nans-fp-math"="false" "no-signed-zeros-fp-math"="false" "no-trapping-math"="false" "stack-protector-buffer-size"="8" "target-features"="+fxsr,+mmx,+sse,+sse2,+x87" "unsafe-fp-math"="false" "use-soft-float"="false" } +attributes #1 = { argmemonly nounwind } diff --git a/llvm/test/CodeGen/X86/avoid-sfb.ll b/llvm/test/CodeGen/X86/avoid-sfb.ll index 9d6c6c9c02e..37f235288cc 100644 --- a/llvm/test/CodeGen/X86/avoid-sfb.ll +++ b/llvm/test/CodeGen/X86/avoid-sfb.ll @@ -1,6 +1,6 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py -; RUN: llc < %s -mtriple=x86_64-linux -verify-machineinstrs | FileCheck %s -check-prefix=CHECK -; RUN: llc < %s -mtriple=x86_64-linux --x86-disable-avoid-SFB -verify-machineinstrs | FileCheck %s --check-prefix=DISABLED +; RUN: llc < %s -mtriple=x86_64-linux -mcpu=x86-64 -verify-machineinstrs | FileCheck %s -check-prefix=CHECK +; RUN: llc < %s -mtriple=x86_64-linux -mcpu=x86-64 --x86-disable-avoid-SFB -verify-machineinstrs | FileCheck %s --check-prefix=DISABLED ; RUN: llc < %s -mtriple=x86_64-linux -mcpu=core-avx2 -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-AVX2 ; RUN: llc < %s -mtriple=x86_64-linux -mcpu=skx -verify-machineinstrs | FileCheck %s -check-prefix=CHECK-AVX512 @@ -1243,11 +1243,6 @@ if.end: ; preds = %if.then, %entry declare void @bar(%struct.S*) local_unnamed_addr #1 -; Function Attrs: argmemonly nounwind -declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i32, i1) #1 - -attributes #0 = { nounwind uwtable "target-cpu"="x86-64" } - %struct.S7 = type { float, float, float , float, float, float, float, float } ; Function Attrs: nounwind uwtable @@ -1527,5 +1522,7 @@ entry: ret void } +; Function Attrs: argmemonly nounwind +declare void @llvm.memcpy.p0i8.p0i8.i64(i8* nocapture writeonly, i8* nocapture readonly, i64, i32, i1) #1 - +attributes #0 = { nounwind uwtable } diff --git a/llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll b/llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll index 293ceee3be9..228f2031bab 100644 --- a/llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll +++ b/llvm/test/CodeGen/X86/llc-override-mcpu-mattr.ll @@ -1,12 +1,12 @@ ; RUN: llc < %s -mtriple=x86_64-- -mcpu=broadwell | FileCheck %s ; RUN: llc < %s -mtriple=x86_64-- -mattr=+avx2 | FileCheck %s -; Check that llc can overide function attributes target-cpu and target-features +; Check that llc can set function attributes target-cpu and target-features ; using command line options -mcpu and -mattr. ; CHECK: vpsadbw (%r{{si|dx}}), %ymm{{[0-9]+}}, %ymm{{[0-9]+}} -define <4 x i64> @foo1(<4 x i64>* %s1, <4 x i64>* %s2) #0 { +define <4 x i64> @foo1(<4 x i64>* %s1, <4 x i64>* %s2) { entry: %ps1 = load <4 x i64>, <4 x i64>* %s1 %ps2 = load <4 x i64>, <4 x i64>* %s2 @@ -17,5 +17,3 @@ entry: } declare <4 x i64> @llvm.x86.avx2.psad.bw(<32 x i8>, <32 x i8>) - -attributes #0 = { "target-cpu"="core2" "target-features"="+ssse3,+cx16,+sse4.2,+sse4.1,+sse,+sse2,+sse3,+avx,+popcnt" } |
