diff options
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/ARM64/misched-basic-A53.ll | 2 | ||||
| -rw-r--r-- | llvm/test/CodeGen/ARM64/misched-forwarding-A53.ll | 21 |
2 files changed, 21 insertions, 2 deletions
diff --git a/llvm/test/CodeGen/ARM64/misched-basic-A53.ll b/llvm/test/CodeGen/ARM64/misched-basic-A53.ll index 9f0caa35429..608e5b65b63 100644 --- a/llvm/test/CodeGen/ARM64/misched-basic-A53.ll +++ b/llvm/test/CodeGen/ARM64/misched-basic-A53.ll @@ -8,9 +8,7 @@ ; CHECK: ********** MI Scheduling ********** ; CHECK: main ; CHECK: *** Final schedule for BB#2 *** -; CHECK: SU(13) ; CHECK: MADDWrrr -; CHECK: SU(4) ; CHECK: ADDWri ; CHECK: ********** INTERVALS ********** @main.x = private unnamed_addr constant [8 x i32] [i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1], align 4 diff --git a/llvm/test/CodeGen/ARM64/misched-forwarding-A53.ll b/llvm/test/CodeGen/ARM64/misched-forwarding-A53.ll new file mode 100644 index 00000000000..97bfb5ca9d3 --- /dev/null +++ b/llvm/test/CodeGen/ARM64/misched-forwarding-A53.ll @@ -0,0 +1,21 @@ +; REQUIRES: asserts +; RUN: llc < %s -mtriple=arm64-linux-gnu -mcpu=cortex-a53 -pre-RA-sched=source -enable-misched -verify-misched -debug-only=misched -o - 2>&1 > /dev/null | FileCheck %s +; +; For Cortex-A53, shiftable operands that are not actually shifted +; are not needed for an additional two cycles. +; +; CHECK: ********** MI Scheduling ********** +; CHECK: shiftable +; CHECK: *** Final schedule for BB#0 *** +; CHECK: ADDXrr %vreg0, %vreg2 +; CHECK: ADDXrs %vreg0, %vreg2, 5 +; CHECK: ********** INTERVALS ********** +define i64 @shiftable(i64 %A, i64 %B) { + %tmp0 = sub i64 %B, 20 + %tmp1 = shl i64 %tmp0, 5; + %tmp2 = add i64 %A, %tmp1; + %tmp3 = add i64 %A, %tmp0 + %tmp4 = mul i64 %tmp2, %tmp3 + + ret i64 %tmp4 +} |
