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-rw-r--r--llvm/test/CodeGen/X86/avx-schedule.ll8
-rw-r--r--llvm/test/CodeGen/X86/schedule-x86_64.ll60
2 files changed, 34 insertions, 34 deletions
diff --git a/llvm/test/CodeGen/X86/avx-schedule.ll b/llvm/test/CodeGen/X86/avx-schedule.ll
index e4a5b83f076..6e1c54c3451 100644
--- a/llvm/test/CodeGen/X86/avx-schedule.ll
+++ b/llvm/test/CodeGen/X86/avx-schedule.ll
@@ -4695,7 +4695,7 @@ define i32 @test_testpd(<2 x double> %a0, <2 x double> %a1, <2 x double> *%a2) {
; BTVER2-NEXT: vtestpd %xmm1, %xmm0 # sched: [3:1.00]
; BTVER2-NEXT: setb %al # sched: [1:0.50]
; BTVER2-NEXT: vtestpd (%rdi), %xmm0 # sched: [8:1.00]
-; BTVER2-NEXT: adcl $0, %eax # sched: [1:0.50]
+; BTVER2-NEXT: adcl $0, %eax # sched: [1:1.00]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_testpd:
@@ -4781,7 +4781,7 @@ define i32 @test_testpd_ymm(<4 x double> %a0, <4 x double> %a1, <4 x double> *%a
; BTVER2-NEXT: vtestpd %ymm1, %ymm0 # sched: [4:2.00]
; BTVER2-NEXT: setb %al # sched: [1:0.50]
; BTVER2-NEXT: vtestpd (%rdi), %ymm0 # sched: [9:2.00]
-; BTVER2-NEXT: adcl $0, %eax # sched: [1:0.50]
+; BTVER2-NEXT: adcl $0, %eax # sched: [1:1.00]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_testpd_ymm:
@@ -4862,7 +4862,7 @@ define i32 @test_testps(<4 x float> %a0, <4 x float> %a1, <4 x float> *%a2) {
; BTVER2-NEXT: vtestps %xmm1, %xmm0 # sched: [3:1.00]
; BTVER2-NEXT: setb %al # sched: [1:0.50]
; BTVER2-NEXT: vtestps (%rdi), %xmm0 # sched: [8:1.00]
-; BTVER2-NEXT: adcl $0, %eax # sched: [1:0.50]
+; BTVER2-NEXT: adcl $0, %eax # sched: [1:1.00]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_testps:
@@ -4948,7 +4948,7 @@ define i32 @test_testps_ymm(<8 x float> %a0, <8 x float> %a1, <8 x float> *%a2)
; BTVER2-NEXT: vtestps %ymm1, %ymm0 # sched: [4:2.00]
; BTVER2-NEXT: setb %al # sched: [1:0.50]
; BTVER2-NEXT: vtestps (%rdi), %ymm0 # sched: [9:2.00]
-; BTVER2-NEXT: adcl $0, %eax # sched: [1:0.50]
+; BTVER2-NEXT: adcl $0, %eax # sched: [1:1.00]
; BTVER2-NEXT: retq # sched: [4:1.00]
;
; ZNVER1-LABEL: test_testps_ymm:
diff --git a/llvm/test/CodeGen/X86/schedule-x86_64.ll b/llvm/test/CodeGen/X86/schedule-x86_64.ll
index 3f22a0154d2..56f3558200e 100644
--- a/llvm/test/CodeGen/X86/schedule-x86_64.ll
+++ b/llvm/test/CodeGen/X86/schedule-x86_64.ll
@@ -111,10 +111,10 @@ define void @test_adc_8(i8 %a0, i8* %a1) optsize {
; BTVER2-LABEL: test_adc_8:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: adcb $7, %al # sched: [1:0.50]
-; BTVER2-NEXT: adcb $7, %dil # sched: [1:0.50]
+; BTVER2-NEXT: adcb $7, %al # sched: [1:1.00]
+; BTVER2-NEXT: adcb $7, %dil # sched: [1:1.00]
; BTVER2-NEXT: adcb $7, (%rsi) # sched: [5:1.00]
-; BTVER2-NEXT: adcb %dil, %dil # sched: [1:0.50]
+; BTVER2-NEXT: adcb %dil, %dil # sched: [1:1.00]
; BTVER2-NEXT: adcb %dil, (%rsi) # sched: [5:1.00]
; BTVER2-NEXT: adcb (%rsi), %dil # sched: [4:1.00]
; BTVER2-NEXT: #NO_APP
@@ -275,14 +275,14 @@ define void @test_adc_16(i16 %a0, i16* %a1) optsize {
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: adcw $511, %ax # imm = 0x1FF
-; BTVER2-NEXT: # sched: [1:0.50]
+; BTVER2-NEXT: # sched: [1:1.00]
; BTVER2-NEXT: adcw $511, %di # imm = 0x1FF
-; BTVER2-NEXT: # sched: [1:0.50]
+; BTVER2-NEXT: # sched: [1:1.00]
; BTVER2-NEXT: adcw $511, (%rsi) # imm = 0x1FF
; BTVER2-NEXT: # sched: [5:1.00]
-; BTVER2-NEXT: adcw $7, %di # sched: [1:0.50]
+; BTVER2-NEXT: adcw $7, %di # sched: [1:1.00]
; BTVER2-NEXT: adcw $7, (%rsi) # sched: [5:1.00]
-; BTVER2-NEXT: adcw %di, %di # sched: [1:0.50]
+; BTVER2-NEXT: adcw %di, %di # sched: [1:1.00]
; BTVER2-NEXT: adcw %di, (%rsi) # sched: [5:1.00]
; BTVER2-NEXT: adcw (%rsi), %di # sched: [4:1.00]
; BTVER2-NEXT: #NO_APP
@@ -448,14 +448,14 @@ define void @test_adc_32(i32 %a0, i32* %a1) optsize {
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: adcl $665536, %eax # imm = 0xA27C0
-; BTVER2-NEXT: # sched: [1:0.50]
+; BTVER2-NEXT: # sched: [1:1.00]
; BTVER2-NEXT: adcl $665536, %edi # imm = 0xA27C0
-; BTVER2-NEXT: # sched: [1:0.50]
+; BTVER2-NEXT: # sched: [1:1.00]
; BTVER2-NEXT: adcl $665536, (%rsi) # imm = 0xA27C0
; BTVER2-NEXT: # sched: [5:1.00]
-; BTVER2-NEXT: adcl $7, %edi # sched: [1:0.50]
+; BTVER2-NEXT: adcl $7, %edi # sched: [1:1.00]
; BTVER2-NEXT: adcl $7, (%rsi) # sched: [5:1.00]
-; BTVER2-NEXT: adcl %edi, %edi # sched: [1:0.50]
+; BTVER2-NEXT: adcl %edi, %edi # sched: [1:1.00]
; BTVER2-NEXT: adcl %edi, (%rsi) # sched: [5:1.00]
; BTVER2-NEXT: adcl (%rsi), %edi # sched: [4:1.00]
; BTVER2-NEXT: #NO_APP
@@ -621,14 +621,14 @@ define void @test_adc_64(i64 %a0, i64* %a1) optsize {
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: adcq $665536, %rax # imm = 0xA27C0
-; BTVER2-NEXT: # sched: [1:0.50]
+; BTVER2-NEXT: # sched: [1:1.00]
; BTVER2-NEXT: adcq $665536, %rdi # imm = 0xA27C0
-; BTVER2-NEXT: # sched: [1:0.50]
+; BTVER2-NEXT: # sched: [1:1.00]
; BTVER2-NEXT: adcq $665536, (%rsi) # imm = 0xA27C0
; BTVER2-NEXT: # sched: [5:1.00]
-; BTVER2-NEXT: adcq $7, %rdi # sched: [1:0.50]
+; BTVER2-NEXT: adcq $7, %rdi # sched: [1:1.00]
; BTVER2-NEXT: adcq $7, (%rsi) # sched: [5:1.00]
-; BTVER2-NEXT: adcq %rdi, %rdi # sched: [1:0.50]
+; BTVER2-NEXT: adcq %rdi, %rdi # sched: [1:1.00]
; BTVER2-NEXT: adcq %rdi, (%rsi) # sched: [5:1.00]
; BTVER2-NEXT: adcq (%rsi), %rdi # sched: [4:1.00]
; BTVER2-NEXT: #NO_APP
@@ -12873,10 +12873,10 @@ define void @test_sbb_8(i8 %a0, i8* %a1) optsize {
; BTVER2-LABEL: test_sbb_8:
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
-; BTVER2-NEXT: sbbb $7, %al # sched: [1:0.50]
-; BTVER2-NEXT: sbbb $7, %dil # sched: [1:0.50]
+; BTVER2-NEXT: sbbb $7, %al # sched: [1:1.00]
+; BTVER2-NEXT: sbbb $7, %dil # sched: [1:1.00]
; BTVER2-NEXT: sbbb $7, (%rsi) # sched: [5:1.00]
-; BTVER2-NEXT: sbbb %dil, %dil # sched: [1:0.50]
+; BTVER2-NEXT: sbbb %dil, %dil # sched: [1:1.00]
; BTVER2-NEXT: sbbb %dil, (%rsi) # sched: [5:1.00]
; BTVER2-NEXT: sbbb (%rsi), %dil # sched: [4:1.00]
; BTVER2-NEXT: #NO_APP
@@ -13037,14 +13037,14 @@ define void @test_sbb_16(i16 %a0, i16* %a1) optsize {
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: sbbw $511, %ax # imm = 0x1FF
-; BTVER2-NEXT: # sched: [1:0.50]
+; BTVER2-NEXT: # sched: [1:1.00]
; BTVER2-NEXT: sbbw $511, %di # imm = 0x1FF
-; BTVER2-NEXT: # sched: [1:0.50]
+; BTVER2-NEXT: # sched: [1:1.00]
; BTVER2-NEXT: sbbw $511, (%rsi) # imm = 0x1FF
; BTVER2-NEXT: # sched: [5:1.00]
-; BTVER2-NEXT: sbbw $7, %di # sched: [1:0.50]
+; BTVER2-NEXT: sbbw $7, %di # sched: [1:1.00]
; BTVER2-NEXT: sbbw $7, (%rsi) # sched: [5:1.00]
-; BTVER2-NEXT: sbbw %di, %di # sched: [1:0.50]
+; BTVER2-NEXT: sbbw %di, %di # sched: [1:1.00]
; BTVER2-NEXT: sbbw %di, (%rsi) # sched: [5:1.00]
; BTVER2-NEXT: sbbw (%rsi), %di # sched: [4:1.00]
; BTVER2-NEXT: #NO_APP
@@ -13210,14 +13210,14 @@ define void @test_sbb_32(i32 %a0, i32* %a1) optsize {
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: sbbl $665536, %eax # imm = 0xA27C0
-; BTVER2-NEXT: # sched: [1:0.50]
+; BTVER2-NEXT: # sched: [1:1.00]
; BTVER2-NEXT: sbbl $665536, %edi # imm = 0xA27C0
-; BTVER2-NEXT: # sched: [1:0.50]
+; BTVER2-NEXT: # sched: [1:1.00]
; BTVER2-NEXT: sbbl $665536, (%rsi) # imm = 0xA27C0
; BTVER2-NEXT: # sched: [5:1.00]
-; BTVER2-NEXT: sbbl $7, %edi # sched: [1:0.50]
+; BTVER2-NEXT: sbbl $7, %edi # sched: [1:1.00]
; BTVER2-NEXT: sbbl $7, (%rsi) # sched: [5:1.00]
-; BTVER2-NEXT: sbbl %edi, %edi # sched: [1:0.50]
+; BTVER2-NEXT: sbbl %edi, %edi # sched: [1:1.00]
; BTVER2-NEXT: sbbl %edi, (%rsi) # sched: [5:1.00]
; BTVER2-NEXT: sbbl (%rsi), %edi # sched: [4:1.00]
; BTVER2-NEXT: #NO_APP
@@ -13383,14 +13383,14 @@ define void @test_sbb_64(i64 %a0, i64* %a1) optsize {
; BTVER2: # %bb.0:
; BTVER2-NEXT: #APP
; BTVER2-NEXT: sbbq $665536, %rax # imm = 0xA27C0
-; BTVER2-NEXT: # sched: [1:0.50]
+; BTVER2-NEXT: # sched: [1:1.00]
; BTVER2-NEXT: sbbq $665536, %rdi # imm = 0xA27C0
-; BTVER2-NEXT: # sched: [1:0.50]
+; BTVER2-NEXT: # sched: [1:1.00]
; BTVER2-NEXT: sbbq $665536, (%rsi) # imm = 0xA27C0
; BTVER2-NEXT: # sched: [5:1.00]
-; BTVER2-NEXT: sbbq $7, %rdi # sched: [1:0.50]
+; BTVER2-NEXT: sbbq $7, %rdi # sched: [1:1.00]
; BTVER2-NEXT: sbbq $7, (%rsi) # sched: [5:1.00]
-; BTVER2-NEXT: sbbq %rdi, %rdi # sched: [1:0.50]
+; BTVER2-NEXT: sbbq %rdi, %rdi # sched: [1:1.00]
; BTVER2-NEXT: sbbq %rdi, (%rsi) # sched: [5:1.00]
; BTVER2-NEXT: sbbq (%rsi), %rdi # sched: [4:1.00]
; BTVER2-NEXT: #NO_APP
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