diff options
Diffstat (limited to 'llvm/test/CodeGen')
44 files changed, 220 insertions, 220 deletions
diff --git a/llvm/test/CodeGen/AArch64/aarch64-2014-08-11-MachineCombinerCrash.ll b/llvm/test/CodeGen/AArch64/aarch64-2014-08-11-MachineCombinerCrash.ll index a1eed7bb1a9..d52703f0b54 100644 --- a/llvm/test/CodeGen/AArch64/aarch64-2014-08-11-MachineCombinerCrash.ll +++ b/llvm/test/CodeGen/AArch64/aarch64-2014-08-11-MachineCombinerCrash.ll @@ -16,7 +16,7 @@ for.body: ; preds = %for.body, %entry %add53 = add nsw i64 %n1, 0, !dbg !52 %add55 = add nsw i64 %n1, 0, !dbg !53 %mul63 = mul nsw i64 %add53, -20995, !dbg !54 - tail call void @llvm.dbg.value(metadata !{i64 %mul63}, i64 0, metadata !30, metadata !{}), !dbg !55 + tail call void @llvm.dbg.value(metadata !{i64 %mul63}, i64 0, metadata !30), !dbg !55 %mul65 = mul nsw i64 %add55, -3196, !dbg !56 %add67 = add nsw i64 0, %mul65, !dbg !57 %add80 = add i64 0, 1024, !dbg !58 @@ -35,7 +35,7 @@ for.body: ; preds = %for.body, %entry } ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 +declare void @llvm.dbg.value(metadata, i64, metadata) #1 attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { nounwind readnone } diff --git a/llvm/test/CodeGen/AArch64/arm64-2011-03-17-AsmPrinterCrash.ll b/llvm/test/CodeGen/AArch64/arm64-2011-03-17-AsmPrinterCrash.ll index dd5dfb7ab28..2b083d80491 100644 --- a/llvm/test/CodeGen/AArch64/arm64-2011-03-17-AsmPrinterCrash.ll +++ b/llvm/test/CodeGen/AArch64/arm64-2011-03-17-AsmPrinterCrash.ll @@ -11,12 +11,12 @@ if.then24: ; preds = %entry unreachable if.else295: ; preds = %entry - call void @llvm.dbg.declare(metadata !{i32* %do_tab_convert}, metadata !16, metadata !{}), !dbg !18 + call void @llvm.dbg.declare(metadata !{i32* %do_tab_convert}, metadata !16), !dbg !18 store i32 0, i32* %do_tab_convert, align 4, !dbg !19 unreachable } -declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone !llvm.dbg.gv = !{!0} !llvm.dbg.sp = !{!1, !7, !10, !11, !12} diff --git a/llvm/test/CodeGen/ARM/2009-10-16-Scope.ll b/llvm/test/CodeGen/ARM/2009-10-16-Scope.ll index c27b3e59c23..570fcf96e64 100644 --- a/llvm/test/CodeGen/ARM/2009-10-16-Scope.ll +++ b/llvm/test/CodeGen/ARM/2009-10-16-Scope.ll @@ -9,7 +9,7 @@ entry: br label %do.body, !dbg !0 do.body: ; preds = %entry - call void @llvm.dbg.declare(metadata !{i32* %count_}, metadata !4, metadata !{}) + call void @llvm.dbg.declare(metadata !{i32* %count_}, metadata !4) %conv = ptrtoint i32* %count_ to i32, !dbg !0 ; <i32> [#uses=1] %call = call i32 @foo(i32 %conv) ssp, !dbg !0 ; <i32> [#uses=0] br label %do.end, !dbg !0 @@ -18,7 +18,7 @@ do.end: ; preds = %do.body ret void, !dbg !7 } -declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone declare i32 @foo(i32) ssp diff --git a/llvm/test/CodeGen/ARM/2010-04-15-ScavengerDebugValue.ll b/llvm/test/CodeGen/ARM/2010-04-15-ScavengerDebugValue.ll index 9da47bec537..35739d76eae 100644 --- a/llvm/test/CodeGen/ARM/2010-04-15-ScavengerDebugValue.ll +++ b/llvm/test/CodeGen/ARM/2010-04-15-ScavengerDebugValue.ll @@ -5,12 +5,12 @@ target triple = "armv4t-apple-darwin10" define hidden i32 @__addvsi3(i32 %a, i32 %b) nounwind { entry: - tail call void @llvm.dbg.value(metadata !{i32 %b}, i64 0, metadata !0, metadata !{}) + tail call void @llvm.dbg.value(metadata !{i32 %b}, i64 0, metadata !0) %0 = add nsw i32 %b, %a, !dbg !9 ; <i32> [#uses=1] ret i32 %0, !dbg !11 } -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!3} !llvm.module.flags = !{!15} diff --git a/llvm/test/CodeGen/ARM/2010-06-25-Thumb2ITInvalidIterator.ll b/llvm/test/CodeGen/ARM/2010-06-25-Thumb2ITInvalidIterator.ll index a367ecb86ac..a53200e72c3 100644 --- a/llvm/test/CodeGen/ARM/2010-06-25-Thumb2ITInvalidIterator.ll +++ b/llvm/test/CodeGen/ARM/2010-06-25-Thumb2ITInvalidIterator.ll @@ -7,16 +7,16 @@ target triple = "thumbv7-apple-darwin3.0.0-iphoneos" define void @x0(i8* nocapture %buf, i32 %nbytes) nounwind optsize { entry: - tail call void @llvm.dbg.value(metadata !{i8* %buf}, i64 0, metadata !0, metadata !{}), !dbg !15 - tail call void @llvm.dbg.value(metadata !{i32 %nbytes}, i64 0, metadata !8, metadata !{}), !dbg !16 + tail call void @llvm.dbg.value(metadata !{i8* %buf}, i64 0, metadata !0), !dbg !15 + tail call void @llvm.dbg.value(metadata !{i32 %nbytes}, i64 0, metadata !8), !dbg !16 %tmp = load i32* @length, !dbg !17 ; <i32> [#uses=3] %cmp = icmp eq i32 %tmp, -1, !dbg !17 ; <i1> [#uses=1] %cmp.not = xor i1 %cmp, true ; <i1> [#uses=1] %cmp3 = icmp ult i32 %tmp, %nbytes, !dbg !17 ; <i1> [#uses=1] %or.cond = and i1 %cmp.not, %cmp3 ; <i1> [#uses=1] - tail call void @llvm.dbg.value(metadata !{i32 %tmp}, i64 0, metadata !8, metadata !{}), !dbg !17 + tail call void @llvm.dbg.value(metadata !{i32 %tmp}, i64 0, metadata !8), !dbg !17 %nbytes.addr.0 = select i1 %or.cond, i32 %tmp, i32 %nbytes ; <i32> [#uses=1] - tail call void @llvm.dbg.value(metadata !18, i64 0, metadata !10, metadata !{}), !dbg !19 + tail call void @llvm.dbg.value(metadata !18, i64 0, metadata !10), !dbg !19 br label %while.cond, !dbg !20 while.cond: ; preds = %while.body, %entry @@ -42,7 +42,7 @@ while.end: ; preds = %land.rhs, %while.co declare i32 @x1() optsize -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.lv.fn = !{!0, !8, !10, !12} !llvm.dbg.gv = !{!14} diff --git a/llvm/test/CodeGen/ARM/2010-08-04-StackVariable.ll b/llvm/test/CodeGen/ARM/2010-08-04-StackVariable.ll index 13baf253ca4..1e86c5099d1 100644 --- a/llvm/test/CodeGen/ARM/2010-08-04-StackVariable.ll +++ b/llvm/test/CodeGen/ARM/2010-08-04-StackVariable.ll @@ -6,8 +6,8 @@ define i32 @_Z3fooi4SVal(i32 %i, %struct.SVal* noalias %location) nounwind ssp { entry: %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] - call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !23, metadata !{}), !dbg !24 - call void @llvm.dbg.value(metadata !{%struct.SVal* %location}, i64 0, metadata !25, metadata !{}), !dbg !24 + call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !23), !dbg !24 + call void @llvm.dbg.value(metadata !{%struct.SVal* %location}, i64 0, metadata !25), !dbg !24 %0 = icmp ne i32 %i, 0, !dbg !27 ; <i1> [#uses=1] br i1 %0, label %bb, label %bb1, !dbg !27 @@ -34,7 +34,7 @@ return: ; preds = %bb2 define linkonce_odr void @_ZN4SValC1Ev(%struct.SVal* %this) nounwind ssp align 2 { entry: %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] - call void @llvm.dbg.value(metadata !{%struct.SVal* %this}, i64 0, metadata !31, metadata !{}), !dbg !34 + call void @llvm.dbg.value(metadata !{%struct.SVal* %this}, i64 0, metadata !31), !dbg !34 %0 = getelementptr inbounds %struct.SVal* %this, i32 0, i32 0, !dbg !34 ; <i8**> [#uses=1] store i8* null, i8** %0, align 8, !dbg !34 %1 = getelementptr inbounds %struct.SVal* %this, i32 0, i32 1, !dbg !34 ; <i32*> [#uses=1] @@ -45,14 +45,14 @@ return: ; preds = %entry ret void, !dbg !35 } -declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone define i32 @main() nounwind ssp { entry: %0 = alloca %struct.SVal ; <%struct.SVal*> [#uses=3] %v = alloca %struct.SVal ; <%struct.SVal*> [#uses=4] %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] - call void @llvm.dbg.declare(metadata !{%struct.SVal* %v}, metadata !38, metadata !{}), !dbg !41 + call void @llvm.dbg.declare(metadata !{%struct.SVal* %v}, metadata !38), !dbg !41 call void @_ZN4SValC1Ev(%struct.SVal* %v) nounwind, !dbg !41 %1 = getelementptr inbounds %struct.SVal* %v, i32 0, i32 1, !dbg !42 ; <i32*> [#uses=1] store i32 1, i32* %1, align 8, !dbg !42 @@ -65,14 +65,14 @@ entry: %7 = load i32* %6, align 8, !dbg !43 ; <i32> [#uses=1] store i32 %7, i32* %5, align 8, !dbg !43 %8 = call i32 @_Z3fooi4SVal(i32 2, %struct.SVal* noalias %0) nounwind, !dbg !43 ; <i32> [#uses=0] - call void @llvm.dbg.value(metadata !{i32 %8}, i64 0, metadata !44, metadata !{}), !dbg !43 + call void @llvm.dbg.value(metadata !{i32 %8}, i64 0, metadata !44), !dbg !43 br label %return, !dbg !45 return: ; preds = %entry ret i32 0, !dbg !45 } -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!3} !llvm.module.flags = !{!49} diff --git a/llvm/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll b/llvm/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll index 9a8642ae750..902c9cbbc6e 100644 --- a/llvm/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll +++ b/llvm/test/CodeGen/ARM/2011-01-19-MergedGlobalDbg.ll @@ -30,47 +30,47 @@ target triple = "thumbv7-apple-darwin10" define zeroext i8 @get1(i8 zeroext %a) nounwind optsize { entry: - tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !10, metadata !{}), !dbg !30 + tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !10), !dbg !30 %0 = load i8* @x1, align 4, !dbg !30 - tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !11, metadata !{}), !dbg !30 + tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !11), !dbg !30 store i8 %a, i8* @x1, align 4, !dbg !30 ret i8 %0, !dbg !31 } -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone define zeroext i8 @get2(i8 zeroext %a) nounwind optsize { entry: - tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !18, metadata !{}), !dbg !32 + tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !18), !dbg !32 %0 = load i8* @x2, align 4, !dbg !32 - tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !19, metadata !{}), !dbg !32 + tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !19), !dbg !32 store i8 %a, i8* @x2, align 4, !dbg !32 ret i8 %0, !dbg !33 } define zeroext i8 @get3(i8 zeroext %a) nounwind optsize { entry: - tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !21, metadata !{}), !dbg !34 + tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !21), !dbg !34 %0 = load i8* @x3, align 4, !dbg !34 - tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !22, metadata !{}), !dbg !34 + tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !22), !dbg !34 store i8 %a, i8* @x3, align 4, !dbg !34 ret i8 %0, !dbg !35 } define zeroext i8 @get4(i8 zeroext %a) nounwind optsize { entry: - tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !24, metadata !{}), !dbg !36 + tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !24), !dbg !36 %0 = load i8* @x4, align 4, !dbg !36 - tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !25, metadata !{}), !dbg !36 + tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !25), !dbg !36 store i8 %a, i8* @x4, align 4, !dbg !36 ret i8 %0, !dbg !37 } define zeroext i8 @get5(i8 zeroext %a) nounwind optsize { entry: - tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !27, metadata !{}), !dbg !38 + tail call void @llvm.dbg.value(metadata !{i8 %a}, i64 0, metadata !27), !dbg !38 %0 = load i8* @x5, align 4, !dbg !38 - tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !28, metadata !{}), !dbg !38 + tail call void @llvm.dbg.value(metadata !{i8 %0}, i64 0, metadata !28), !dbg !38 store i8 %a, i8* @x5, align 4, !dbg !38 ret i8 %0, !dbg !39 } diff --git a/llvm/test/CodeGen/ARM/2011-08-02-MergedGlobalDbg.ll b/llvm/test/CodeGen/ARM/2011-08-02-MergedGlobalDbg.ll index 243b5ad4ce1..6f7c081396c 100644 --- a/llvm/test/CodeGen/ARM/2011-08-02-MergedGlobalDbg.ll +++ b/llvm/test/CodeGen/ARM/2011-08-02-MergedGlobalDbg.ll @@ -29,46 +29,46 @@ target triple = "thumbv7-apple-macosx10.7.0" @x5 = global i32 0, align 4 define i32 @get1(i32 %a) nounwind optsize ssp { - tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !10, metadata !{}), !dbg !30 + tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !10), !dbg !30 %1 = load i32* @x1, align 4, !dbg !31 - tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !11, metadata !{}), !dbg !31 + tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !11), !dbg !31 store i32 %a, i32* @x1, align 4, !dbg !31 ret i32 %1, !dbg !31 } define i32 @get2(i32 %a) nounwind optsize ssp { - tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !13, metadata !{}), !dbg !32 + tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !13), !dbg !32 %1 = load i32* @x2, align 4, !dbg !33 - tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !14, metadata !{}), !dbg !33 + tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !14), !dbg !33 store i32 %a, i32* @x2, align 4, !dbg !33 ret i32 %1, !dbg !33 } define i32 @get3(i32 %a) nounwind optsize ssp { - tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !16, metadata !{}), !dbg !34 + tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !16), !dbg !34 %1 = load i32* @x3, align 4, !dbg !35 - tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !17, metadata !{}), !dbg !35 + tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !17), !dbg !35 store i32 %a, i32* @x3, align 4, !dbg !35 ret i32 %1, !dbg !35 } define i32 @get4(i32 %a) nounwind optsize ssp { - tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !19, metadata !{}), !dbg !36 + tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !19), !dbg !36 %1 = load i32* @x4, align 4, !dbg !37 - tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !20, metadata !{}), !dbg !37 + tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !20), !dbg !37 store i32 %a, i32* @x4, align 4, !dbg !37 ret i32 %1, !dbg !37 } define i32 @get5(i32 %a) nounwind optsize ssp { - tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !27, metadata !{}), !dbg !38 + tail call void @llvm.dbg.value(metadata !{i32 %a}, i64 0, metadata !27), !dbg !38 %1 = load i32* @x5, align 4, !dbg !39 - tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !28, metadata !{}), !dbg !39 + tail call void @llvm.dbg.value(metadata !{i32 %1}, i64 0, metadata !28), !dbg !39 store i32 %a, i32* @x5, align 4, !dbg !39 ret i32 %1, !dbg !39 } -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!0} !llvm.module.flags = !{!49} diff --git a/llvm/test/CodeGen/ARM/coalesce-dbgvalue.ll b/llvm/test/CodeGen/ARM/coalesce-dbgvalue.ll index 6f44deee2ce..606c9bc52d6 100644 --- a/llvm/test/CodeGen/ARM/coalesce-dbgvalue.ll +++ b/llvm/test/CodeGen/ARM/coalesce-dbgvalue.ll @@ -27,11 +27,11 @@ for.cond1: ; preds = %for.end9, %for.cond for.body2: ; preds = %for.cond1 store i32 %storemerge11, i32* @b, align 4, !dbg !26 - tail call void @llvm.dbg.value(metadata !27, i64 0, metadata !11, metadata !{}), !dbg !28 + tail call void @llvm.dbg.value(metadata !27, i64 0, metadata !11), !dbg !28 %0 = load i64* @a, align 8, !dbg !29 %xor = xor i64 %0, %e.1.ph, !dbg !29 %conv3 = trunc i64 %xor to i32, !dbg !29 - tail call void @llvm.dbg.value(metadata !{i32 %conv3}, i64 0, metadata !10, metadata !{}), !dbg !29 + tail call void @llvm.dbg.value(metadata !{i32 %conv3}, i64 0, metadata !10), !dbg !29 %tobool4 = icmp eq i32 %conv3, 0, !dbg !29 br i1 %tobool4, label %land.end, label %land.rhs, !dbg !29 @@ -69,7 +69,7 @@ declare i32 @fn2(...) #1 declare i32 @fn3(...) #1 ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 +declare void @llvm.dbg.value(metadata, i64, metadata) #2 attributes #0 = { nounwind ssp "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/ARM/debug-info-arg.ll b/llvm/test/CodeGen/ARM/debug-info-arg.ll index 362a69ebd04..ebe2e934d12 100644 --- a/llvm/test/CodeGen/ARM/debug-info-arg.ll +++ b/llvm/test/CodeGen/ARM/debug-info-arg.ll @@ -7,13 +7,13 @@ target triple = "thumbv7-apple-ios" %struct.tag_s = type { i32, i32, i32 } define void @foo(%struct.tag_s* nocapture %this, %struct.tag_s* %c, i64 %x, i64 %y, %struct.tag_s* nocapture %ptr1, %struct.tag_s* nocapture %ptr2) nounwind ssp { - tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %this}, i64 0, metadata !5, metadata !{}), !dbg !20 - tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %c}, i64 0, metadata !13, metadata !{}), !dbg !21 - tail call void @llvm.dbg.value(metadata !{i64 %x}, i64 0, metadata !14, metadata !{}), !dbg !22 - tail call void @llvm.dbg.value(metadata !{i64 %y}, i64 0, metadata !17, metadata !{}), !dbg !23 + tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %this}, i64 0, metadata !5), !dbg !20 + tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %c}, i64 0, metadata !13), !dbg !21 + tail call void @llvm.dbg.value(metadata !{i64 %x}, i64 0, metadata !14), !dbg !22 + tail call void @llvm.dbg.value(metadata !{i64 %y}, i64 0, metadata !17), !dbg !23 ;CHECK: @DEBUG_VALUE: foo:y <- [R7+8] - tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %ptr1}, i64 0, metadata !18, metadata !{}), !dbg !24 - tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %ptr2}, i64 0, metadata !19, metadata !{}), !dbg !25 + tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %ptr1}, i64 0, metadata !18), !dbg !24 + tail call void @llvm.dbg.value(metadata !{%struct.tag_s* %ptr2}, i64 0, metadata !19), !dbg !25 %1 = icmp eq %struct.tag_s* %c, null, !dbg !26 br i1 %1, label %3, label %2, !dbg !26 @@ -27,7 +27,7 @@ define void @foo(%struct.tag_s* nocapture %this, %struct.tag_s* %c, i64 %x, i64 declare void @foobar(i64, i64) -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!0} !llvm.module.flags = !{!33} diff --git a/llvm/test/CodeGen/ARM/debug-info-blocks.ll b/llvm/test/CodeGen/ARM/debug-info-blocks.ll index c11c530737a..2b1513c1e8b 100644 --- a/llvm/test/CodeGen/ARM/debug-info-blocks.ll +++ b/llvm/test/CodeGen/ARM/debug-info-blocks.ll @@ -19,11 +19,11 @@ target triple = "thumbv7-apple-ios" @"OBJC_IVAR_$_MyWork._data" = external hidden global i32, section "__DATA, __objc_const", align 4 @"\01L_OBJC_SELECTOR_REFERENCES_222" = external hidden global i8*, section "__DATA, __objc_selrefs, literal_pointers, no_dead_strip" -declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone declare i8* @objc_msgSend(i8*, i8*, ...) -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture, i8* nocapture, i32, i32, i1) nounwind @@ -31,22 +31,22 @@ define hidden void @foobar_func_block_invoke_0(i8* %.block_descriptor, %0* %load %1 = alloca %0*, align 4 %bounds = alloca %struct.CR, align 4 %data = alloca %struct.CR, align 4 - call void @llvm.dbg.value(metadata !{i8* %.block_descriptor}, i64 0, metadata !27, metadata !{}), !dbg !129 + call void @llvm.dbg.value(metadata !{i8* %.block_descriptor}, i64 0, metadata !27), !dbg !129 store %0* %loadedMydata, %0** %1, align 4 - call void @llvm.dbg.declare(metadata !{%0** %1}, metadata !130, metadata !{}), !dbg !131 + call void @llvm.dbg.declare(metadata !{%0** %1}, metadata !130), !dbg !131 %2 = bitcast %struct.CR* %bounds to %1* %3 = getelementptr %1* %2, i32 0, i32 0 store [4 x i32] %bounds.coerce0, [4 x i32]* %3 - call void @llvm.dbg.declare(metadata !{%struct.CR* %bounds}, metadata !132, metadata !{}), !dbg !133 + call void @llvm.dbg.declare(metadata !{%struct.CR* %bounds}, metadata !132), !dbg !133 %4 = bitcast %struct.CR* %data to %1* %5 = getelementptr %1* %4, i32 0, i32 0 store [4 x i32] %data.coerce0, [4 x i32]* %5 - call void @llvm.dbg.declare(metadata !{%struct.CR* %data}, metadata !134, metadata !{}), !dbg !135 + call void @llvm.dbg.declare(metadata !{%struct.CR* %data}, metadata !134), !dbg !135 %6 = bitcast i8* %.block_descriptor to %2* %7 = getelementptr inbounds %2* %6, i32 0, i32 6 - call void @llvm.dbg.declare(metadata !{%2* %6}, metadata !136, metadata !163), !dbg !137 - call void @llvm.dbg.declare(metadata !{%2* %6}, metadata !138, metadata !164), !dbg !137 - call void @llvm.dbg.declare(metadata !{%2* %6}, metadata !139, metadata !165), !dbg !140 + call void @llvm.dbg.declare(metadata !{%2* %6}, metadata !136), !dbg !137 + call void @llvm.dbg.declare(metadata !{%2* %6}, metadata !138), !dbg !137 + call void @llvm.dbg.declare(metadata !{%2* %6}, metadata !139), !dbg !140 %8 = load %0** %1, align 4, !dbg !141 %9 = load i8** @"\01L_OBJC_SELECTOR_REFERENCES_13", !dbg !141 %10 = bitcast %0* %8 to i8*, !dbg !141 @@ -231,10 +231,10 @@ define hidden void @foobar_func_block_invoke_0(i8* %.block_descriptor, %0* %load !133 = metadata !{i32 609, i32 175, metadata !23, null} !134 = metadata !{i32 786689, metadata !23, metadata !"data", metadata !24, i32 67109473, metadata !108, i32 0, null} ; [ DW_TAG_arg_variable ] !135 = metadata !{i32 609, i32 190, metadata !23, null} -!136 = metadata !{i32 786688, metadata !23, metadata !"mydata", metadata !24, i32 604, metadata !50, i32 0, null} ;; [ DW_TAG_auto_variable ] +!136 = metadata !{i32 786688, metadata !23, metadata !"mydata", metadata !24, i32 604, metadata !50, i32 0, null, metadata !163} ; [ DW_TAG_auto_variable ] !137 = metadata !{i32 604, i32 49, metadata !23, null} -!138 = metadata !{i32 786688, metadata !23, metadata !"self", metadata !40, i32 604, metadata !90, i32 0, null} ;; [ DW_TAG_auto_variable ] -!139 = metadata !{i32 786688, metadata !23, metadata !"semi", metadata !24, i32 607, metadata !125, i32 0, null} ;; [ DW_TAG_auto_variable ] +!138 = metadata !{i32 786688, metadata !23, metadata !"self", metadata !40, i32 604, metadata !90, i32 0, null, metadata !164} ; [ DW_TAG_auto_variable ] +!139 = metadata !{i32 786688, metadata !23, metadata !"semi", metadata !24, i32 607, metadata !125, i32 0, null, metadata !165} ; [ DW_TAG_auto_variable ] !140 = metadata !{i32 607, i32 30, metadata !23, null} !141 = metadata !{i32 610, i32 17, metadata !142, null} !142 = metadata !{i32 786443, metadata !152, metadata !23, i32 609, i32 200, i32 94} ; [ DW_TAG_lexical_block ] @@ -258,6 +258,6 @@ define hidden void @foobar_func_block_invoke_0(i8* %.block_descriptor, %0* %load !160 = metadata !{metadata !"header.h", metadata !"/Volumes/Sandbox/llvm"} !161 = metadata !{metadata !"header2.h", metadata !"/Volumes/Sandbox/llvm"} !162 = metadata !{i32 1, metadata !"Debug Info Version", i32 1} -!163 = metadata !{i32 786690, i64 34, i64 20, i64 6, i64 34, i64 4, i64 6, i64 34, i64 24} ; [DW_OP_plus 20 DW_OP_deref DW_OP_plus 4 DW_OP_deref DW_OP_plus 24] -!164 = metadata !{i32 786690, i64 34, i64 24} ; [DW_OP_plus 24] -!165 = metadata !{i32 786690, i64 34, i64 28} ; [DW_OP_plus 28] +!163 = metadata !{i64 1, i64 20, i64 2, i64 1, i64 4, i64 2, i64 1, i64 24} +!164 = metadata !{i64 1, i64 24} +!165 = metadata !{i64 1, i64 28} diff --git a/llvm/test/CodeGen/ARM/debug-info-branch-folding.ll b/llvm/test/CodeGen/ARM/debug-info-branch-folding.ll index 52937bac050..f2a51d6a96a 100644 --- a/llvm/test/CodeGen/ARM/debug-info-branch-folding.ll +++ b/llvm/test/CodeGen/ARM/debug-info-branch-folding.ll @@ -20,9 +20,9 @@ entry: for.body9: ; preds = %for.body9, %entry %add19 = fadd <4 x float> undef, <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00>, !dbg !39 - tail call void @llvm.dbg.value(metadata !{<4 x float> %add19}, i64 0, metadata !27, metadata !{}), !dbg !39 + tail call void @llvm.dbg.value(metadata !{<4 x float> %add19}, i64 0, metadata !27), !dbg !39 %add20 = fadd <4 x float> undef, <float 0.000000e+00, float 0.000000e+00, float 0.000000e+00, float 1.000000e+00>, !dbg !39 - tail call void @llvm.dbg.value(metadata !{<4 x float> %add20}, i64 0, metadata !28, metadata !{}), !dbg !39 + tail call void @llvm.dbg.value(metadata !{<4 x float> %add20}, i64 0, metadata !28), !dbg !39 br i1 %cond, label %for.end54, label %for.body9, !dbg !44 for.end54: ; preds = %for.body9 @@ -37,7 +37,7 @@ for.end54: ; preds = %for.body9 declare i32 @printf(i8* nocapture, ...) nounwind -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.module.flags = !{!56} !llvm.dbg.cu = !{!2} diff --git a/llvm/test/CodeGen/ARM/debug-info-d16-reg.ll b/llvm/test/CodeGen/ARM/debug-info-d16-reg.ll index 42704219ae9..84fb57e51a9 100644 --- a/llvm/test/CodeGen/ARM/debug-info-d16-reg.ll +++ b/llvm/test/CodeGen/ARM/debug-info-d16-reg.ll @@ -12,9 +12,9 @@ target triple = "thumbv7-apple-darwin10" define i32 @inlineprinter(i8* %ptr, double %val, i8 zeroext %c) nounwind optsize { entry: - tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !19, metadata !{}), !dbg !26 - tail call void @llvm.dbg.value(metadata !{double %val}, i64 0, metadata !20, metadata !{}), !dbg !26 - tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !21, metadata !{}), !dbg !26 + tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !19), !dbg !26 + tail call void @llvm.dbg.value(metadata !{double %val}, i64 0, metadata !20), !dbg !26 + tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !21), !dbg !26 %0 = zext i8 %c to i32, !dbg !27 %1 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %val, i32 %0) nounwind, !dbg !27 ret i32 0, !dbg !29 @@ -22,9 +22,9 @@ entry: define i32 @printer(i8* %ptr, double %val, i8 zeroext %c) nounwind optsize noinline { entry: - tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !16, metadata !{}), !dbg !30 - tail call void @llvm.dbg.value(metadata !{double %val}, i64 0, metadata !17, metadata !{}), !dbg !30 - tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !18, metadata !{}), !dbg !30 + tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !16), !dbg !30 + tail call void @llvm.dbg.value(metadata !{double %val}, i64 0, metadata !17), !dbg !30 + tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !18), !dbg !30 %0 = zext i8 %c to i32, !dbg !31 %1 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %val, i32 %0) nounwind, !dbg !31 ret i32 0, !dbg !33 @@ -32,22 +32,22 @@ entry: declare i32 @printf(i8* nocapture, ...) nounwind -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone define i32 @main(i32 %argc, i8** nocapture %argv) nounwind optsize { entry: - tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !22, metadata !{}), !dbg !34 - tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !23, metadata !{}), !dbg !34 + tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !22), !dbg !34 + tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !23), !dbg !34 %0 = sitofp i32 %argc to double, !dbg !35 %1 = fadd double %0, 5.555552e+05, !dbg !35 - tail call void @llvm.dbg.value(metadata !{double %1}, i64 0, metadata !24, metadata !{}), !dbg !35 + tail call void @llvm.dbg.value(metadata !{double %1}, i64 0, metadata !24), !dbg !35 %2 = tail call i32 @puts(i8* getelementptr inbounds ([6 x i8]* @.str1, i32 0, i32 0)) nounwind, !dbg !36 %3 = getelementptr inbounds i8* bitcast (i32 (i32, i8**)* @main to i8*), i32 %argc, !dbg !37 %4 = trunc i32 %argc to i8, !dbg !37 %5 = add i8 %4, 97, !dbg !37 - tail call void @llvm.dbg.value(metadata !{i8* %3}, i64 0, metadata !19, metadata !{}) nounwind, !dbg !38 - tail call void @llvm.dbg.value(metadata !{double %1}, i64 0, metadata !20, metadata !{}) nounwind, !dbg !38 - tail call void @llvm.dbg.value(metadata !{i8 %5}, i64 0, metadata !21, metadata !{}) nounwind, !dbg !38 + tail call void @llvm.dbg.value(metadata !{i8* %3}, i64 0, metadata !19) nounwind, !dbg !38 + tail call void @llvm.dbg.value(metadata !{double %1}, i64 0, metadata !20) nounwind, !dbg !38 + tail call void @llvm.dbg.value(metadata !{i8 %5}, i64 0, metadata !21) nounwind, !dbg !38 %6 = zext i8 %5 to i32, !dbg !39 %7 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str, i32 0, i32 0), i8* %3, double %1, i32 %6) nounwind, !dbg !39 %8 = tail call i32 @printer(i8* %3, double %1, i8 zeroext %5) nounwind, !dbg !40 diff --git a/llvm/test/CodeGen/ARM/debug-info-qreg.ll b/llvm/test/CodeGen/ARM/debug-info-qreg.ll index cd2b9993abd..b7f88123ac2 100644 --- a/llvm/test/CodeGen/ARM/debug-info-qreg.ll +++ b/llvm/test/CodeGen/ARM/debug-info-qreg.ll @@ -26,7 +26,7 @@ for.body9: ; preds = %for.body9, %entry br i1 undef, label %for.end54, label %for.body9, !dbg !44 for.end54: ; preds = %for.body9 - tail call void @llvm.dbg.value(metadata !{<4 x float> %add19}, i64 0, metadata !27, metadata !{}), !dbg !39 + tail call void @llvm.dbg.value(metadata !{<4 x float> %add19}, i64 0, metadata !27), !dbg !39 %tmp115 = extractelement <4 x float> %add19, i32 1 %conv6.i75 = fpext float %tmp115 to double, !dbg !45 %call.i82 = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([13 x i8]* @.str, i32 0, i32 0), double undef, double %conv6.i75, double undef, double undef) nounwind, !dbg !45 @@ -35,7 +35,7 @@ for.end54: ; preds = %for.body9 declare i32 @printf(i8* nocapture, ...) nounwind -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!2} !llvm.module.flags = !{!56} diff --git a/llvm/test/CodeGen/ARM/debug-info-s16-reg.ll b/llvm/test/CodeGen/ARM/debug-info-s16-reg.ll index 79fc0575715..6d992d9a4f5 100644 --- a/llvm/test/CodeGen/ARM/debug-info-s16-reg.ll +++ b/llvm/test/CodeGen/ARM/debug-info-s16-reg.ll @@ -15,9 +15,9 @@ target triple = "thumbv7-apple-macosx10.6.7" define i32 @inlineprinter(i8* %ptr, float %val, i8 zeroext %c) nounwind optsize ssp { entry: - tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !8, metadata !{}), !dbg !24 - tail call void @llvm.dbg.value(metadata !{float %val}, i64 0, metadata !10, metadata !{}), !dbg !25 - tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !12, metadata !{}), !dbg !26 + tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !8), !dbg !24 + tail call void @llvm.dbg.value(metadata !{float %val}, i64 0, metadata !10), !dbg !25 + tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !12), !dbg !26 %conv = fpext float %val to double, !dbg !27 %conv3 = zext i8 %c to i32, !dbg !27 %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %conv, i32 %conv3) nounwind optsize, !dbg !27 @@ -28,9 +28,9 @@ declare i32 @printf(i8* nocapture, ...) nounwind optsize define i32 @printer(i8* %ptr, float %val, i8 zeroext %c) nounwind optsize noinline ssp { entry: - tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !14, metadata !{}), !dbg !30 - tail call void @llvm.dbg.value(metadata !{float %val}, i64 0, metadata !15, metadata !{}), !dbg !31 - tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !16, metadata !{}), !dbg !32 + tail call void @llvm.dbg.value(metadata !{i8* %ptr}, i64 0, metadata !14), !dbg !30 + tail call void @llvm.dbg.value(metadata !{float %val}, i64 0, metadata !15), !dbg !31 + tail call void @llvm.dbg.value(metadata !{i8 %c}, i64 0, metadata !16), !dbg !32 %conv = fpext float %val to double, !dbg !33 %conv3 = zext i8 %c to i32, !dbg !33 %call = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str, i32 0, i32 0), i8* %ptr, double %conv, i32 %conv3) nounwind optsize, !dbg !33 @@ -39,19 +39,19 @@ entry: define i32 @main(i32 %argc, i8** nocapture %argv) nounwind optsize ssp { entry: - tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !17, metadata !{}), !dbg !36 - tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !18, metadata !{}), !dbg !37 + tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !17), !dbg !36 + tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !18), !dbg !37 %conv = sitofp i32 %argc to double, !dbg !38 %add = fadd double %conv, 5.555552e+05, !dbg !38 %conv1 = fptrunc double %add to float, !dbg !38 - tail call void @llvm.dbg.value(metadata !{float %conv1}, i64 0, metadata !22, metadata !{}), !dbg !38 + tail call void @llvm.dbg.value(metadata !{float %conv1}, i64 0, metadata !22), !dbg !38 %call = tail call i32 @puts(i8* getelementptr inbounds ([6 x i8]* @.str1, i32 0, i32 0)) nounwind optsize, !dbg !39 %add.ptr = getelementptr i8* bitcast (i32 (i32, i8**)* @main to i8*), i32 %argc, !dbg !40 %add5 = add nsw i32 %argc, 97, !dbg !40 %conv6 = trunc i32 %add5 to i8, !dbg !40 - tail call void @llvm.dbg.value(metadata !{i8* %add.ptr}, i64 0, metadata !8, metadata !{}) nounwind, !dbg !41 - tail call void @llvm.dbg.value(metadata !{float %conv1}, i64 0, metadata !10, metadata !{}) nounwind, !dbg !42 - tail call void @llvm.dbg.value(metadata !{i8 %conv6}, i64 0, metadata !12, metadata !{}) nounwind, !dbg !43 + tail call void @llvm.dbg.value(metadata !{i8* %add.ptr}, i64 0, metadata !8) nounwind, !dbg !41 + tail call void @llvm.dbg.value(metadata !{float %conv1}, i64 0, metadata !10) nounwind, !dbg !42 + tail call void @llvm.dbg.value(metadata !{i8 %conv6}, i64 0, metadata !12) nounwind, !dbg !43 %conv.i = fpext float %conv1 to double, !dbg !44 %conv3.i = and i32 %add5, 255, !dbg !44 %call.i = tail call i32 (i8*, ...)* @printf(i8* getelementptr inbounds ([11 x i8]* @.str, i32 0, i32 0), i8* %add.ptr, double %conv.i, i32 %conv3.i) nounwind optsize, !dbg !44 @@ -61,7 +61,7 @@ entry: declare i32 @puts(i8* nocapture) nounwind optsize -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!2} !llvm.module.flags = !{!53} diff --git a/llvm/test/CodeGen/ARM/debug-info-sreg2.ll b/llvm/test/CodeGen/ARM/debug-info-sreg2.ll index dd93c1b6658..c74bd43c4f2 100644 --- a/llvm/test/CodeGen/ARM/debug-info-sreg2.ll +++ b/llvm/test/CodeGen/ARM/debug-info-sreg2.ll @@ -15,7 +15,7 @@ target triple = "thumbv7-apple-macosx10.6.7" define void @_Z3foov() optsize ssp { entry: %call = tail call float @_Z3barv() optsize, !dbg !11 - tail call void @llvm.dbg.value(metadata !{float %call}, i64 0, metadata !5, metadata !{}), !dbg !11 + tail call void @llvm.dbg.value(metadata !{float %call}, i64 0, metadata !5), !dbg !11 %call16 = tail call float @_Z2f2v() optsize, !dbg !12 %cmp7 = fcmp olt float %call, %call16, !dbg !12 br i1 %cmp7, label %for.body, label %for.end, !dbg !12 @@ -38,7 +38,7 @@ declare float @_Z2f2v() optsize declare float @_Z2f3f(float) optsize -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!0} !llvm.module.flags = !{!20} diff --git a/llvm/test/CodeGen/Generic/dbg_value.ll b/llvm/test/CodeGen/Generic/dbg_value.ll index 83ac8e557c7..840eeb0cbf3 100644 --- a/llvm/test/CodeGen/Generic/dbg_value.ll +++ b/llvm/test/CodeGen/Generic/dbg_value.ll @@ -4,11 +4,11 @@ %0 = type { i32, i32 } define void @t(%0*, i32, i32, i32, i32) nounwind { - tail call void @llvm.dbg.value(metadata !{%0* %0}, i64 0, metadata !0, metadata !{}) + tail call void @llvm.dbg.value(metadata !{%0* %0}, i64 0, metadata !0) unreachable } -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone ; !0 should conform to the format of DIVariable. !0 = metadata !{i32 786689, null, metadata !"a", null, i32 0, null, i32 0, i32 0} ; diff --git a/llvm/test/CodeGen/Hexagon/hwloop-dbg.ll b/llvm/test/CodeGen/Hexagon/hwloop-dbg.ll index 11864d16d9e..67e12df84d2 100644 --- a/llvm/test/CodeGen/Hexagon/hwloop-dbg.ll +++ b/llvm/test/CodeGen/Hexagon/hwloop-dbg.ll @@ -5,9 +5,9 @@ target triple = "hexagon" define void @foo(i32* nocapture %a, i32* nocapture %b) nounwind { entry: - tail call void @llvm.dbg.value(metadata !{i32* %a}, i64 0, metadata !13, metadata !{}), !dbg !17 - tail call void @llvm.dbg.value(metadata !{i32* %b}, i64 0, metadata !14, metadata !{}), !dbg !18 - tail call void @llvm.dbg.value(metadata !30, i64 0, metadata !15, metadata !{}), !dbg !19 + tail call void @llvm.dbg.value(metadata !{i32* %a}, i64 0, metadata !13), !dbg !17 + tail call void @llvm.dbg.value(metadata !{i32* %b}, i64 0, metadata !14), !dbg !18 + tail call void @llvm.dbg.value(metadata !30, i64 0, metadata !15), !dbg !19 br label %for.body, !dbg !19 for.body: ; preds = %for.body, %entry @@ -18,11 +18,11 @@ for.body: ; preds = %for.body, %entry %i.02 = phi i32 [ 0, %entry ], [ %inc, %for.body ] %b.addr.01 = phi i32* [ %b, %entry ], [ %incdec.ptr, %for.body ] %incdec.ptr = getelementptr inbounds i32* %b.addr.01, i32 1, !dbg !21 - tail call void @llvm.dbg.value(metadata !{i32* %incdec.ptr}, i64 0, metadata !14, metadata !{}), !dbg !21 + tail call void @llvm.dbg.value(metadata !{i32* %incdec.ptr}, i64 0, metadata !14), !dbg !21 %0 = load i32* %b.addr.01, align 4, !dbg !21 store i32 %0, i32* %arrayidx.phi, align 4, !dbg !21 %inc = add nsw i32 %i.02, 1, !dbg !26 - tail call void @llvm.dbg.value(metadata !{i32 %inc}, i64 0, metadata !15, metadata !{}), !dbg !26 + tail call void @llvm.dbg.value(metadata !{i32 %inc}, i64 0, metadata !15), !dbg !26 %exitcond = icmp eq i32 %inc, 10, !dbg !19 %arrayidx.inc = getelementptr i32* %arrayidx.phi, i32 1 br i1 %exitcond, label %for.end, label %for.body, !dbg !19 @@ -31,7 +31,7 @@ for.end: ; preds = %for.body ret void, !dbg !27 } -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!0} diff --git a/llvm/test/CodeGen/Inputs/DbgValueOtherTargets.ll b/llvm/test/CodeGen/Inputs/DbgValueOtherTargets.ll index 97937676f41..953e576af85 100644 --- a/llvm/test/CodeGen/Inputs/DbgValueOtherTargets.ll +++ b/llvm/test/CodeGen/Inputs/DbgValueOtherTargets.ll @@ -3,13 +3,13 @@ define i32 @main() nounwind ssp { entry: ; CHECK: DEBUG_VALUE - call void @llvm.dbg.value(metadata !6, i64 0, metadata !7, metadata !{}), !dbg !9 + call void @llvm.dbg.value(metadata !6, i64 0, metadata !7), !dbg !9 ret i32 0, !dbg !10 } -declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!2} !llvm.module.flags = !{!13} diff --git a/llvm/test/CodeGen/PowerPC/dbg.ll b/llvm/test/CodeGen/PowerPC/dbg.ll index dd7b8f56215..6beea558c0d 100644 --- a/llvm/test/CodeGen/PowerPC/dbg.ll +++ b/llvm/test/CodeGen/PowerPC/dbg.ll @@ -6,13 +6,13 @@ target triple = "powerpc64-unknown-linux-gnu" define i32 @main(i32 %argc, i8** nocapture %argv) nounwind readnone { entry: - tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !15, metadata !{}), !dbg !17 - tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !16, metadata !{}), !dbg !18 + tail call void @llvm.dbg.value(metadata !{i32 %argc}, i64 0, metadata !15), !dbg !17 + tail call void @llvm.dbg.value(metadata !{i8** %argv}, i64 0, metadata !16), !dbg !18 %add = add nsw i32 %argc, 1, !dbg !19 ret i32 %add, !dbg !19 } -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!0} !llvm.module.flags = !{!22} diff --git a/llvm/test/CodeGen/PowerPC/pr17168.ll b/llvm/test/CodeGen/PowerPC/pr17168.ll index ee8f0cd1fa2..24bcda02b3a 100644 --- a/llvm/test/CodeGen/PowerPC/pr17168.ll +++ b/llvm/test/CodeGen/PowerPC/pr17168.ll @@ -25,7 +25,7 @@ for.cond968.preheader: ; preds = %for.cond968.prehead for.end1042: ; preds = %for.cond968.preheader, %for.cond964.preheader, %entry %0 = phi i32 [ undef, %for.cond964.preheader ], [ undef, %for.cond968.preheader ], [ undef, %entry ] %1 = load i32* getelementptr inbounds ([3 x i32]* @grid_points, i64 0, i64 0), align 4, !dbg !443, !tbaa !444 - tail call void @llvm.dbg.value(metadata !447, i64 0, metadata !119, metadata !{}), !dbg !448 + tail call void @llvm.dbg.value(metadata !447, i64 0, metadata !119), !dbg !448 %sub10454270 = add nsw i32 %0, -1, !dbg !448 %cmp10464271 = icmp sgt i32 %sub10454270, 1, !dbg !448 %sub11134263 = add nsw i32 %1, -1, !dbg !450 @@ -46,7 +46,7 @@ for.cond1816.preheader.for.inc1898_crit_edge: ; preds = %for.cond1816.prehea } ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #1 +declare void @llvm.dbg.value(metadata, i64, metadata) #1 attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { nounwind readnone } diff --git a/llvm/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll b/llvm/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll index b536ffa62ab..ffc9584199c 100644 --- a/llvm/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll +++ b/llvm/test/CodeGen/Thumb/2010-07-15-debugOrdering.ll @@ -25,7 +25,7 @@ define void @_Z19getClosestDiagonal3ii(%0* noalias sret, i32, i32) nounwind { %storemerge = phi double [ -1.000000e+00, %4 ], [ 1.000000e+00, %3 ], [ 1.000000e+00, %3 ] ; <double> [#uses=1] %v_6 = icmp slt i32 %1, 2 ; <i1> [#uses=1] %storemerge1 = select i1 %v_6, double 1.000000e+00, double -1.000000e+00 ; <double> [#uses=3] - call void @llvm.dbg.value(metadata !{double %storemerge}, i64 0, metadata !91, metadata !{}), !dbg !0 + call void @llvm.dbg.value(metadata !{double %storemerge}, i64 0, metadata !91), !dbg !0 %v_7 = icmp eq i32 %2, 1, !dbg !92 ; <i1> [#uses=1] %storemerge2 = select i1 %v_7, double 1.000000e+00, double -1.000000e+00 ; <double> [#uses=3] %v_8 = getelementptr inbounds %0* %0, i32 0, i32 0, i32 0 ; <double*> [#uses=1] @@ -40,11 +40,11 @@ define void @_Z19getClosestDiagonal3ii(%0* noalias sret, i32, i32) nounwind { ret void, !dbg !98 } -declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone declare double @sqrt(double) nounwind readonly -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!5} !llvm.module.flags = !{!104} diff --git a/llvm/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll b/llvm/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll index f079e4edab8..296f0ca135b 100644 --- a/llvm/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll +++ b/llvm/test/CodeGen/X86/2009-02-12-DebugInfoVLA.ll @@ -14,9 +14,9 @@ entry: %2 = alloca i64 ; <i64*> [#uses=1] %3 = alloca i64 ; <i64*> [#uses=6] %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] - call void @llvm.dbg.declare(metadata !{i8** %s1_addr}, metadata !0, metadata !{}), !dbg !7 + call void @llvm.dbg.declare(metadata !{i8** %s1_addr}, metadata !0), !dbg !7 store i8* %s1, i8** %s1_addr - call void @llvm.dbg.declare(metadata !{[0 x i8]** %str.0}, metadata !8, metadata !{}), !dbg !7 + call void @llvm.dbg.declare(metadata !{[0 x i8]** %str.0}, metadata !8), !dbg !7 %4 = call i8* @llvm.stacksave(), !dbg !7 ; <i8*> [#uses=1] store i8* %4, i8** %saved_stack.1, align 8, !dbg !7 %5 = load i8** %s1_addr, align 8, !dbg !13 ; <i8*> [#uses=1] @@ -58,7 +58,7 @@ return: ; preds = %entry ret i8 %retval12, !dbg !16 } -declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone declare i8* @llvm.stacksave() nounwind diff --git a/llvm/test/CodeGen/X86/2009-10-16-Scope.ll b/llvm/test/CodeGen/X86/2009-10-16-Scope.ll index 724db38ad83..a936edc120d 100644 --- a/llvm/test/CodeGen/X86/2009-10-16-Scope.ll +++ b/llvm/test/CodeGen/X86/2009-10-16-Scope.ll @@ -9,7 +9,7 @@ entry: br label %do.body, !dbg !0 do.body: ; preds = %entry - call void @llvm.dbg.declare(metadata !{i32* %count_}, metadata !4, metadata !{}) + call void @llvm.dbg.declare(metadata !{i32* %count_}, metadata !4) %conv = ptrtoint i32* %count_ to i32, !dbg !0 ; <i32> [#uses=1] %call = call i32 @foo(i32 %conv) ssp, !dbg !0 ; <i32> [#uses=0] br label %do.end, !dbg !0 @@ -18,7 +18,7 @@ do.end: ; preds = %do.body ret void, !dbg !7 } -declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone declare i32 @foo(i32) ssp diff --git a/llvm/test/CodeGen/X86/2010-01-18-DbgValue.ll b/llvm/test/CodeGen/X86/2010-01-18-DbgValue.ll index 7d3381528e1..f99e6824281 100644 --- a/llvm/test/CodeGen/X86/2010-01-18-DbgValue.ll +++ b/llvm/test/CodeGen/X86/2010-01-18-DbgValue.ll @@ -12,7 +12,7 @@ entry: %retval = alloca double ; <double*> [#uses=2] %0 = alloca double ; <double*> [#uses=2] %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] - call void @llvm.dbg.declare(metadata !{%struct.Rect* %my_r0}, metadata !0, metadata !{}), !dbg !15 + call void @llvm.dbg.declare(metadata !{%struct.Rect* %my_r0}, metadata !0), !dbg !15 %1 = getelementptr inbounds %struct.Rect* %my_r0, i32 0, i32 0, !dbg !16 ; <%struct.Pt*> [#uses=1] %2 = getelementptr inbounds %struct.Pt* %1, i32 0, i32 0, !dbg !16 ; <double*> [#uses=1] %3 = load double* %2, align 8, !dbg !16 ; <double> [#uses=1] @@ -26,7 +26,7 @@ return: ; preds = %entry ret double %retval1, !dbg !16 } -declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone !llvm.dbg.cu = !{!3} !llvm.module.flags = !{!21} diff --git a/llvm/test/CodeGen/X86/2010-02-01-DbgValueCrash.ll b/llvm/test/CodeGen/X86/2010-02-01-DbgValueCrash.ll index 5980a3771d3..4d4e8c197d8 100644 --- a/llvm/test/CodeGen/X86/2010-02-01-DbgValueCrash.ll +++ b/llvm/test/CodeGen/X86/2010-02-01-DbgValueCrash.ll @@ -8,12 +8,12 @@ define i32 @"main(tart.core.String[])->int32"(i32 %args) { entry: - tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8, metadata !{}) + tail call void @llvm.dbg.value(metadata !14, i64 0, metadata !8) tail call void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType* @.type.SwitchStmtTest) ; <%tart.core.Object*> [#uses=2] ret i32 3 } -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone declare void @"tart.reflect.ComplexType.create->tart.core.Object"(%tart.reflect.ComplexType*) nounwind readnone !0 = metadata !{i32 458769, metadata !15, i32 1, metadata !"4.2.1 (Based on Apple Inc. build 5658) (LLVM build)", i1 true, metadata !"", i32 0, metadata !16, metadata !16, null, null, null, i32 0} ; [ DW_TAG_compile_unit ] diff --git a/llvm/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll b/llvm/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll index 7df12867fe2..d9f51759981 100644 --- a/llvm/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll +++ b/llvm/test/CodeGen/X86/2010-05-25-DotDebugLoc.ll @@ -11,10 +11,10 @@ define hidden %0 @__divsc3(float %a, float %b, float %c, float %d) nounwind readnone { entry: - tail call void @llvm.dbg.value(metadata !{float %a}, i64 0, metadata !0, metadata !{}) - tail call void @llvm.dbg.value(metadata !{float %b}, i64 0, metadata !11, metadata !{}) - tail call void @llvm.dbg.value(metadata !{float %c}, i64 0, metadata !12, metadata !{}) - tail call void @llvm.dbg.value(metadata !{float %d}, i64 0, metadata !13, metadata !{}) + tail call void @llvm.dbg.value(metadata !{float %a}, i64 0, metadata !0) + tail call void @llvm.dbg.value(metadata !{float %b}, i64 0, metadata !11) + tail call void @llvm.dbg.value(metadata !{float %c}, i64 0, metadata !12) + tail call void @llvm.dbg.value(metadata !{float %d}, i64 0, metadata !13) %0 = tail call float @fabsf(float %c) nounwind readnone, !dbg !19 ; <float> [#uses=1] %1 = tail call float @fabsf(float %d) nounwind readnone, !dbg !19 ; <float> [#uses=1] %2 = fcmp olt float %0, %1, !dbg !19 ; <i1> [#uses=1] @@ -22,34 +22,34 @@ entry: bb: ; preds = %entry %3 = fdiv float %c, %d, !dbg !20 ; <float> [#uses=3] - tail call void @llvm.dbg.value(metadata !{float %3}, i64 0, metadata !16, metadata !{}), !dbg !20 + tail call void @llvm.dbg.value(metadata !{float %3}, i64 0, metadata !16), !dbg !20 %4 = fmul float %3, %c, !dbg !21 ; <float> [#uses=1] %5 = fadd float %4, %d, !dbg !21 ; <float> [#uses=2] - tail call void @llvm.dbg.value(metadata !{float %5}, i64 0, metadata !14, metadata !{}), !dbg !21 + tail call void @llvm.dbg.value(metadata !{float %5}, i64 0, metadata !14), !dbg !21 %6 = fmul float %3, %a, !dbg !22 ; <float> [#uses=1] %7 = fadd float %6, %b, !dbg !22 ; <float> [#uses=1] %8 = fdiv float %7, %5, !dbg !22 ; <float> [#uses=1] - tail call void @llvm.dbg.value(metadata !{float %8}, i64 0, metadata !17, metadata !{}), !dbg !22 + tail call void @llvm.dbg.value(metadata !{float %8}, i64 0, metadata !17), !dbg !22 %9 = fmul float %3, %b, !dbg !23 ; <float> [#uses=1] %10 = fsub float %9, %a, !dbg !23 ; <float> [#uses=1] %11 = fdiv float %10, %5, !dbg !23 ; <float> [#uses=1] - tail call void @llvm.dbg.value(metadata !{float %11}, i64 0, metadata !18, metadata !{}), !dbg !23 + tail call void @llvm.dbg.value(metadata !{float %11}, i64 0, metadata !18), !dbg !23 br label %bb2, !dbg !23 bb1: ; preds = %entry %12 = fdiv float %d, %c, !dbg !24 ; <float> [#uses=3] - tail call void @llvm.dbg.value(metadata !{float %12}, i64 0, metadata !16, metadata !{}), !dbg !24 + tail call void @llvm.dbg.value(metadata !{float %12}, i64 0, metadata !16), !dbg !24 %13 = fmul float %12, %d, !dbg !25 ; <float> [#uses=1] %14 = fadd float %13, %c, !dbg !25 ; <float> [#uses=2] - tail call void @llvm.dbg.value(metadata !{float %14}, i64 0, metadata !14, metadata !{}), !dbg !25 + tail call void @llvm.dbg.value(metadata !{float %14}, i64 0, metadata !14), !dbg !25 %15 = fmul float %12, %b, !dbg !26 ; <float> [#uses=1] %16 = fadd float %15, %a, !dbg !26 ; <float> [#uses=1] %17 = fdiv float %16, %14, !dbg !26 ; <float> [#uses=1] - tail call void @llvm.dbg.value(metadata !{float %17}, i64 0, metadata !17, metadata !{}), !dbg !26 + tail call void @llvm.dbg.value(metadata !{float %17}, i64 0, metadata !17), !dbg !26 %18 = fmul float %12, %a, !dbg !27 ; <float> [#uses=1] %19 = fsub float %b, %18, !dbg !27 ; <float> [#uses=1] %20 = fdiv float %19, %14, !dbg !27 ; <float> [#uses=1] - tail call void @llvm.dbg.value(metadata !{float %20}, i64 0, metadata !18, metadata !{}), !dbg !27 + tail call void @llvm.dbg.value(metadata !{float %20}, i64 0, metadata !18), !dbg !27 br label %bb2, !dbg !27 bb2: ; preds = %bb1, %bb @@ -75,9 +75,9 @@ bb6: ; preds = %bb4 bb8: ; preds = %bb6 %27 = tail call float @copysignf(float 0x7FF0000000000000, float %c) nounwind readnone, !dbg !30 ; <float> [#uses=2] %28 = fmul float %27, %a, !dbg !30 ; <float> [#uses=1] - tail call void @llvm.dbg.value(metadata !{float %28}, i64 0, metadata !17, metadata !{}), !dbg !30 + tail call void @llvm.dbg.value(metadata !{float %28}, i64 0, metadata !17), !dbg !30 %29 = fmul float %27, %b, !dbg !31 ; <float> [#uses=1] - tail call void @llvm.dbg.value(metadata !{float %29}, i64 0, metadata !18, metadata !{}), !dbg !31 + tail call void @llvm.dbg.value(metadata !{float %29}, i64 0, metadata !18), !dbg !31 br label %bb46, !dbg !31 bb9: ; preds = %bb6, %bb4 @@ -107,24 +107,24 @@ bb15: ; preds = %bb14 bb16: ; preds = %bb15 %iftmp.0.0 = select i1 %33, float 1.000000e+00, float 0.000000e+00 ; <float> [#uses=1] %42 = tail call float @copysignf(float %iftmp.0.0, float %a) nounwind readnone, !dbg !33 ; <float> [#uses=2] - tail call void @llvm.dbg.value(metadata !{float %42}, i64 0, metadata !0, metadata !{}), !dbg !33 + tail call void @llvm.dbg.value(metadata !{float %42}, i64 0, metadata !0), !dbg !33 %43 = fcmp ord float %b, 0.000000e+00 ; <i1> [#uses=1] %44 = fsub float %b, %b, !dbg !34 ; <float> [#uses=1] %45 = fcmp uno float %44, 0.000000e+00 ; <i1> [#uses=1] %46 = and i1 %43, %45, !dbg !34 ; <i1> [#uses=1] %iftmp.1.0 = select i1 %46, float 1.000000e+00, float 0.000000e+00 ; <float> [#uses=1] %47 = tail call float @copysignf(float %iftmp.1.0, float %b) nounwind readnone, !dbg !34 ; <float> [#uses=2] - tail call void @llvm.dbg.value(metadata !{float %47}, i64 0, metadata !11, metadata !{}), !dbg !34 + tail call void @llvm.dbg.value(metadata !{float %47}, i64 0, metadata !11), !dbg !34 %48 = fmul float %42, %c, !dbg !35 ; <float> [#uses=1] %49 = fmul float %47, %d, !dbg !35 ; <float> [#uses=1] %50 = fadd float %48, %49, !dbg !35 ; <float> [#uses=1] %51 = fmul float %50, 0x7FF0000000000000, !dbg !35 ; <float> [#uses=1] - tail call void @llvm.dbg.value(metadata !{float %51}, i64 0, metadata !17, metadata !{}), !dbg !35 + tail call void @llvm.dbg.value(metadata !{float %51}, i64 0, metadata !17), !dbg !35 %52 = fmul float %47, %c, !dbg !36 ; <float> [#uses=1] %53 = fmul float %42, %d, !dbg !36 ; <float> [#uses=1] %54 = fsub float %52, %53, !dbg !36 ; <float> [#uses=1] %55 = fmul float %54, 0x7FF0000000000000, !dbg !36 ; <float> [#uses=1] - tail call void @llvm.dbg.value(metadata !{float %55}, i64 0, metadata !18, metadata !{}), !dbg !36 + tail call void @llvm.dbg.value(metadata !{float %55}, i64 0, metadata !18), !dbg !36 br label %bb46, !dbg !36 bb27: ; preds = %bb15, %bb14, %bb11 @@ -155,24 +155,24 @@ bb34: ; preds = %bb33, %bb30 bb35: ; preds = %bb34 %iftmp.2.0 = select i1 %59, float 1.000000e+00, float 0.000000e+00 ; <float> [#uses=1] %67 = tail call float @copysignf(float %iftmp.2.0, float %c) nounwind readnone, !dbg !38 ; <float> [#uses=2] - tail call void @llvm.dbg.value(metadata !{float %67}, i64 0, metadata !12, metadata !{}), !dbg !38 + tail call void @llvm.dbg.value(metadata !{float %67}, i64 0, metadata !12), !dbg !38 %68 = fcmp ord float %d, 0.000000e+00 ; <i1> [#uses=1] %69 = fsub float %d, %d, !dbg !39 ; <float> [#uses=1] %70 = fcmp uno float %69, 0.000000e+00 ; <i1> [#uses=1] %71 = and i1 %68, %70, !dbg !39 ; <i1> [#uses=1] %iftmp.3.0 = select i1 %71, float 1.000000e+00, float 0.000000e+00 ; <float> [#uses=1] %72 = tail call float @copysignf(float %iftmp.3.0, float %d) nounwind readnone, !dbg !39 ; <float> [#uses=2] - tail call void @llvm.dbg.value(metadata !{float %72}, i64 0, metadata !13, metadata !{}), !dbg !39 + tail call void @llvm.dbg.value(metadata !{float %72}, i64 0, metadata !13), !dbg !39 %73 = fmul float %67, %a, !dbg !40 ; <float> [#uses=1] %74 = fmul float %72, %b, !dbg !40 ; <float> [#uses=1] %75 = fadd float %73, %74, !dbg !40 ; <float> [#uses=1] %76 = fmul float %75, 0.000000e+00, !dbg !40 ; <float> [#uses=1] - tail call void @llvm.dbg.value(metadata !{float %76}, i64 0, metadata !17, metadata !{}), !dbg !40 + tail call void @llvm.dbg.value(metadata !{float %76}, i64 0, metadata !17), !dbg !40 %77 = fmul float %67, %b, !dbg !41 ; <float> [#uses=1] %78 = fmul float %72, %a, !dbg !41 ; <float> [#uses=1] %79 = fsub float %77, %78, !dbg !41 ; <float> [#uses=1] %80 = fmul float %79, 0.000000e+00, !dbg !41 ; <float> [#uses=1] - tail call void @llvm.dbg.value(metadata !{float %80}, i64 0, metadata !18, metadata !{}), !dbg !41 + tail call void @llvm.dbg.value(metadata !{float %80}, i64 0, metadata !18), !dbg !41 br label %bb46, !dbg !41 bb46: ; preds = %bb35, %bb34, %bb33, %bb30, %bb16, %bb8, %bb2 @@ -196,7 +196,7 @@ declare float @fabsf(float) declare float @copysignf(float, float) nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!3} !llvm.module.flags = !{!48} diff --git a/llvm/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll b/llvm/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll index e3b54fb1358..55ef1c8f547 100644 --- a/llvm/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll +++ b/llvm/test/CodeGen/X86/2010-05-26-DotDebugLoc.ll @@ -9,7 +9,7 @@ target triple = "x86_64-apple-darwin10" define i8* @bar(%struct.a* %myvar) nounwind optsize noinline ssp { entry: - tail call void @llvm.dbg.value(metadata !{%struct.a* %myvar}, i64 0, metadata !8, metadata !{}) + tail call void @llvm.dbg.value(metadata !{%struct.a* %myvar}, i64 0, metadata !8) %0 = getelementptr inbounds %struct.a* %myvar, i64 0, i32 0, !dbg !28 ; <i32*> [#uses=1] %1 = load i32* %0, align 8, !dbg !28 ; <i32> [#uses=1] tail call void @foo(i32 %1) nounwind optsize noinline ssp, !dbg !28 @@ -19,7 +19,7 @@ entry: declare void @foo(i32) nounwind optsize noinline ssp -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!2} !llvm.module.flags = !{!38} diff --git a/llvm/test/CodeGen/X86/2010-05-28-Crash.ll b/llvm/test/CodeGen/X86/2010-05-28-Crash.ll index 9031b1fa03b..a50892afa77 100644 --- a/llvm/test/CodeGen/X86/2010-05-28-Crash.ll +++ b/llvm/test/CodeGen/X86/2010-05-28-Crash.ll @@ -4,19 +4,19 @@ define i32 @foo(i32 %y) nounwind optsize ssp { entry: - tail call void @llvm.dbg.value(metadata !{i32 %y}, i64 0, metadata !0, metadata !{}) + tail call void @llvm.dbg.value(metadata !{i32 %y}, i64 0, metadata !0) %0 = tail call i32 (...)* @zoo(i32 %y) nounwind, !dbg !9 ; <i32> [#uses=1] ret i32 %0, !dbg !9 } declare i32 @zoo(...) -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone define i32 @bar(i32 %x) nounwind optsize ssp { entry: - tail call void @llvm.dbg.value(metadata !{i32 %x}, i64 0, metadata !7, metadata !{}) - tail call void @llvm.dbg.value(metadata !11, i64 0, metadata !0, metadata !{}) nounwind + tail call void @llvm.dbg.value(metadata !{i32 %x}, i64 0, metadata !7) + tail call void @llvm.dbg.value(metadata !11, i64 0, metadata !0) nounwind %0 = tail call i32 (...)* @zoo(i32 1) nounwind, !dbg !12 ; <i32> [#uses=1] %1 = add nsw i32 %0, %x, !dbg !13 ; <i32> [#uses=1] ret i32 %1, !dbg !13 diff --git a/llvm/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll b/llvm/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll index e9e46f375fe..4181c269b4a 100644 --- a/llvm/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll +++ b/llvm/test/CodeGen/X86/2010-06-01-DeadArg-DbgInfo.ll @@ -10,14 +10,14 @@ target triple = "x86_64-apple-darwin10.2" define i32 @_ZN3foo3bazEi(%struct.foo* nocapture %this, i32 %x) nounwind readnone optsize noinline ssp align 2 { ;CHECK: DEBUG_VALUE: baz:this <- RDI{{$}} entry: - tail call void @llvm.dbg.value(metadata !{%struct.foo* %this}, i64 0, metadata !15, metadata !{}) - tail call void @llvm.dbg.value(metadata !{i32 %x}, i64 0, metadata !16, metadata !{}) + tail call void @llvm.dbg.value(metadata !{%struct.foo* %this}, i64 0, metadata !15) + tail call void @llvm.dbg.value(metadata !{i32 %x}, i64 0, metadata !16) %0 = mul nsw i32 %x, 7, !dbg !29 ; <i32> [#uses=1] %1 = add nsw i32 %0, 1, !dbg !29 ; <i32> [#uses=1] ret i32 %1, !dbg !29 } -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!4} !llvm.module.flags = !{!34} diff --git a/llvm/test/CodeGen/X86/2010-07-06-DbgCrash.ll b/llvm/test/CodeGen/X86/2010-07-06-DbgCrash.ll index eae60696f7e..b49aec3af87 100644 --- a/llvm/test/CodeGen/X86/2010-07-06-DbgCrash.ll +++ b/llvm/test/CodeGen/X86/2010-07-06-DbgCrash.ll @@ -23,9 +23,9 @@ define i32 @main() nounwind ssp { bb.nph: - tail call void @llvm.dbg.declare(metadata !101, metadata !102, metadata !{}), !dbg !107 + tail call void @llvm.dbg.declare(metadata !101, metadata !102), !dbg !107 ret i32 0, !dbg !107 } -declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone diff --git a/llvm/test/CodeGen/X86/2010-08-04-StackVariable.ll b/llvm/test/CodeGen/X86/2010-08-04-StackVariable.ll index 60fdc4e93c1..4a73141461f 100644 --- a/llvm/test/CodeGen/X86/2010-08-04-StackVariable.ll +++ b/llvm/test/CodeGen/X86/2010-08-04-StackVariable.ll @@ -6,8 +6,8 @@ define i32 @_Z3fooi4SVal(i32 %i, %struct.SVal* noalias %location) nounwind ssp { entry: %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] - call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !23, metadata !{}), !dbg !24 - call void @llvm.dbg.value(metadata !{%struct.SVal* %location}, i64 0, metadata !25, metadata !{}), !dbg !24 + call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !23), !dbg !24 + call void @llvm.dbg.value(metadata !{%struct.SVal* %location}, i64 0, metadata !25), !dbg !24 %0 = icmp ne i32 %i, 0, !dbg !27 ; <i1> [#uses=1] br i1 %0, label %bb, label %bb1, !dbg !27 @@ -34,7 +34,7 @@ return: ; preds = %bb2 define linkonce_odr void @_ZN4SValC1Ev(%struct.SVal* %this) nounwind ssp align 2 { entry: %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] - call void @llvm.dbg.value(metadata !{%struct.SVal* %this}, i64 0, metadata !31, metadata !{}), !dbg !34 + call void @llvm.dbg.value(metadata !{%struct.SVal* %this}, i64 0, metadata !31), !dbg !34 %0 = getelementptr inbounds %struct.SVal* %this, i32 0, i32 0, !dbg !34 ; <i8**> [#uses=1] store i8* null, i8** %0, align 8, !dbg !34 %1 = getelementptr inbounds %struct.SVal* %this, i32 0, i32 1, !dbg !34 ; <i32*> [#uses=1] @@ -45,14 +45,14 @@ return: ; preds = %entry ret void, !dbg !35 } -declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone define i32 @main() nounwind ssp { entry: %0 = alloca %struct.SVal ; <%struct.SVal*> [#uses=3] %v = alloca %struct.SVal ; <%struct.SVal*> [#uses=4] %"alloca point" = bitcast i32 0 to i32 ; <i32> [#uses=0] - call void @llvm.dbg.declare(metadata !{%struct.SVal* %v}, metadata !38, metadata !{}), !dbg !41 + call void @llvm.dbg.declare(metadata !{%struct.SVal* %v}, metadata !38), !dbg !41 call void @_ZN4SValC1Ev(%struct.SVal* %v) nounwind, !dbg !41 %1 = getelementptr inbounds %struct.SVal* %v, i32 0, i32 1, !dbg !42 ; <i32*> [#uses=1] store i32 1, i32* %1, align 8, !dbg !42 @@ -65,14 +65,14 @@ entry: %7 = load i32* %6, align 8, !dbg !43 ; <i32> [#uses=1] store i32 %7, i32* %5, align 8, !dbg !43 %8 = call i32 @_Z3fooi4SVal(i32 2, %struct.SVal* noalias %0) nounwind, !dbg !43 ; <i32> [#uses=0] - call void @llvm.dbg.value(metadata !{i32 %8}, i64 0, metadata !44, metadata !{}), !dbg !43 + call void @llvm.dbg.value(metadata !{i32 %8}, i64 0, metadata !44), !dbg !43 br label %return, !dbg !45 return: ; preds = %entry ret i32 0, !dbg !45 } -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!3} !llvm.module.flags = !{!49} diff --git a/llvm/test/CodeGen/X86/2010-11-02-DbgParameter.ll b/llvm/test/CodeGen/X86/2010-11-02-DbgParameter.ll index b62bfcb7e60..21ac7c9079e 100644 --- a/llvm/test/CodeGen/X86/2010-11-02-DbgParameter.ll +++ b/llvm/test/CodeGen/X86/2010-11-02-DbgParameter.ll @@ -9,11 +9,11 @@ target triple = "i386-apple-darwin11.0.0" define i32 @foo(%struct.bar* nocapture %i) nounwind readnone optsize noinline ssp { ; CHECK: TAG_formal_parameter entry: - tail call void @llvm.dbg.value(metadata !{%struct.bar* %i}, i64 0, metadata !6, metadata !{}), !dbg !12 + tail call void @llvm.dbg.value(metadata !{%struct.bar* %i}, i64 0, metadata !6), !dbg !12 ret i32 1, !dbg !13 } -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!2} !llvm.module.flags = !{!19} diff --git a/llvm/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll b/llvm/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll index 52c82aa6e15..a4fdee961c8 100644 --- a/llvm/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll +++ b/llvm/test/CodeGen/X86/2011-01-24-DbgValue-Before-Use.ll @@ -22,8 +22,8 @@ target triple = "x86_64-apple-darwin10.0.0" define i64 @gcd(i64 %a, i64 %b) nounwind readnone optsize noinline ssp { entry: - tail call void @llvm.dbg.value(metadata !{i64 %a}, i64 0, metadata !10, metadata !{}), !dbg !18 - tail call void @llvm.dbg.value(metadata !{i64 %b}, i64 0, metadata !11, metadata !{}), !dbg !19 + tail call void @llvm.dbg.value(metadata !{i64 %a}, i64 0, metadata !10), !dbg !18 + tail call void @llvm.dbg.value(metadata !{i64 %b}, i64 0, metadata !11), !dbg !19 br label %while.body, !dbg !20 while.body: ; preds = %while.body, %entry @@ -34,14 +34,14 @@ while.body: ; preds = %while.body, %entry br i1 %cmp, label %if.then, label %while.body, !dbg !23 if.then: ; preds = %while.body - tail call void @llvm.dbg.value(metadata !{i64 %rem}, i64 0, metadata !12, metadata !{}), !dbg !21 + tail call void @llvm.dbg.value(metadata !{i64 %rem}, i64 0, metadata !12), !dbg !21 ret i64 %b.addr.0, !dbg !23 } define i32 @main() nounwind optsize ssp { entry: %call = tail call i32 @rand() nounwind optsize, !dbg !24 - tail call void @llvm.dbg.value(metadata !{i32 %call}, i64 0, metadata !14, metadata !{}), !dbg !24 + tail call void @llvm.dbg.value(metadata !{i32 %call}, i64 0, metadata !14), !dbg !24 %cmp = icmp ugt i32 %call, 21, !dbg !25 br i1 %cmp, label %cond.true, label %cond.end, !dbg !25 @@ -51,7 +51,7 @@ cond.true: ; preds = %entry cond.end: ; preds = %entry, %cond.true %cond = phi i32 [ %call1, %cond.true ], [ %call, %entry ], !dbg !25 - tail call void @llvm.dbg.value(metadata !{i32 %cond}, i64 0, metadata !17, metadata !{}), !dbg !25 + tail call void @llvm.dbg.value(metadata !{i32 %cond}, i64 0, metadata !17), !dbg !25 %conv = sext i32 %cond to i64, !dbg !26 %conv5 = zext i32 %call to i64, !dbg !26 %call6 = tail call i64 @gcd(i64 %conv, i64 %conv5) optsize, !dbg !26 @@ -71,7 +71,7 @@ declare i32 @rand() optsize declare i32 @printf(i8* nocapture, ...) nounwind optsize -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone declare i32 @puts(i8* nocapture) nounwind diff --git a/llvm/test/CodeGen/X86/2012-11-30-handlemove-dbg.ll b/llvm/test/CodeGen/X86/2012-11-30-handlemove-dbg.ll index f2f39940571..3538b27dec4 100644 --- a/llvm/test/CodeGen/X86/2012-11-30-handlemove-dbg.ll +++ b/llvm/test/CodeGen/X86/2012-11-30-handlemove-dbg.ll @@ -12,11 +12,11 @@ %struct.hgstruct.2.29 = type { %struct.bnode.1.28*, [3 x double], double, [3 x double] } %struct.bnode.1.28 = type { i16, double, [3 x double], i32, i32, [3 x double], [3 x double], [3 x double], double, %struct.bnode.1.28*, %struct.bnode.1.28* } -declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone define signext i16 @subdivp(%struct.node.0.27* nocapture %p, double %dsq, double %tolsq, %struct.hgstruct.2.29* nocapture byval align 8 %hg) nounwind uwtable readonly ssp { entry: - call void @llvm.dbg.declare(metadata !{%struct.hgstruct.2.29* %hg}, metadata !4, metadata !{}) + call void @llvm.dbg.declare(metadata !{%struct.hgstruct.2.29* %hg}, metadata !4) %type = getelementptr inbounds %struct.node.0.27* %p, i64 0, i32 0 %0 = load i16* %type, align 2 %cmp = icmp eq i16 %0, 1 @@ -33,7 +33,7 @@ return: ; preds = %for.cond.preheader, ret i16 %retval.0 } -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!0} !llvm.module.flags = !{!12} diff --git a/llvm/test/CodeGen/X86/2012-11-30-misched-dbg.ll b/llvm/test/CodeGen/X86/2012-11-30-misched-dbg.ll index 4b7979d4626..80bb98f666a 100644 --- a/llvm/test/CodeGen/X86/2012-11-30-misched-dbg.ll +++ b/llvm/test/CodeGen/X86/2012-11-30-misched-dbg.ll @@ -12,7 +12,7 @@ @.str15 = external hidden unnamed_addr constant [6 x i8], align 1 -declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone define i32 @AttachGalley(%union.rec** nocapture %suspend_pt) nounwind uwtable ssp { entry: @@ -43,7 +43,7 @@ if.then3344: br label %if.then4073 if.then4073: ; preds = %if.then3344 - call void @llvm.dbg.declare(metadata !{[20 x i8]* %num14075}, metadata !4, metadata !{}) + call void @llvm.dbg.declare(metadata !{[20 x i8]* %num14075}, metadata !4) %arraydecay4078 = getelementptr inbounds [20 x i8]* %num14075, i64 0, i64 0 %0 = load i32* undef, align 4 %add4093 = add nsw i32 %0, 0 @@ -108,7 +108,7 @@ cond.true: ; preds = %entry unreachable cond.end: ; preds = %entry - call void @llvm.dbg.declare(metadata !{%"class.__gnu_cxx::hash_map"* %X}, metadata !31, metadata !{}) + call void @llvm.dbg.declare(metadata !{%"class.__gnu_cxx::hash_map"* %X}, metadata !31) %_M_num_elements.i.i.i.i = getelementptr inbounds %"class.__gnu_cxx::hash_map"* %X, i64 0, i32 0, i32 5 invoke void @_Znwm() to label %exit.i unwind label %lpad2.i.i.i.i diff --git a/llvm/test/CodeGen/X86/2012-11-30-regpres-dbg.ll b/llvm/test/CodeGen/X86/2012-11-30-regpres-dbg.ll index d0ef3629dca..678d39917f1 100644 --- a/llvm/test/CodeGen/X86/2012-11-30-regpres-dbg.ll +++ b/llvm/test/CodeGen/X86/2012-11-30-regpres-dbg.ll @@ -9,7 +9,7 @@ %struct.btCompoundLeafCallback = type { i32, i32 } -declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone define void @test() unnamed_addr uwtable ssp align 2 { entry: @@ -20,7 +20,7 @@ if.then: ; preds = %entry unreachable if.end: ; preds = %entry - call void @llvm.dbg.declare(metadata !{%struct.btCompoundLeafCallback* %callback}, metadata !3, metadata !{}) + call void @llvm.dbg.declare(metadata !{%struct.btCompoundLeafCallback* %callback}, metadata !3) %m = getelementptr inbounds %struct.btCompoundLeafCallback* %callback, i64 0, i32 1 store i32 0, i32* undef, align 8 %cmp12447 = icmp sgt i32 undef, 0 diff --git a/llvm/test/CodeGen/X86/MachineSink-DbgValue.ll b/llvm/test/CodeGen/X86/MachineSink-DbgValue.ll index b11c0487088..c03cc361394 100644 --- a/llvm/test/CodeGen/X86/MachineSink-DbgValue.ll +++ b/llvm/test/CodeGen/X86/MachineSink-DbgValue.ll @@ -4,10 +4,10 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3 target triple = "x86_64-apple-macosx10.7.0" define i32 @foo(i32 %i, i32* nocapture %c) nounwind uwtable readonly ssp { - tail call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !6, metadata !{}), !dbg !12 + tail call void @llvm.dbg.value(metadata !{i32 %i}, i64 0, metadata !6), !dbg !12 %ab = load i32* %c, align 1, !dbg !14 - tail call void @llvm.dbg.value(metadata !{i32* %c}, i64 0, metadata !7, metadata !{}), !dbg !13 - tail call void @llvm.dbg.value(metadata !{i32 %ab}, i64 0, metadata !10, metadata !{}), !dbg !14 + tail call void @llvm.dbg.value(metadata !{i32* %c}, i64 0, metadata !7), !dbg !13 + tail call void @llvm.dbg.value(metadata !{i32 %ab}, i64 0, metadata !10), !dbg !14 %cd = icmp eq i32 %i, 42, !dbg !15 br i1 %cd, label %bb1, label %bb2, !dbg !15 @@ -23,7 +23,7 @@ bb2: ret i32 %.0, !dbg !17 } -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) nounwind readnone +declare void @llvm.dbg.value(metadata, i64, metadata) nounwind readnone !llvm.dbg.cu = !{!0} !llvm.module.flags = !{!22} diff --git a/llvm/test/CodeGen/X86/StackColoring-dbg.ll b/llvm/test/CodeGen/X86/StackColoring-dbg.ll index a105d46ef3d..51d0d1775c6 100644 --- a/llvm/test/CodeGen/X86/StackColoring-dbg.ll +++ b/llvm/test/CodeGen/X86/StackColoring-dbg.ll @@ -5,7 +5,7 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128" target triple = "x86_64-apple-macosx10.8.0" -declare void @llvm.dbg.declare(metadata, metadata, metadata) nounwind readnone +declare void @llvm.dbg.declare(metadata, metadata) nounwind readnone define void @foo() nounwind uwtable ssp { entry: @@ -17,7 +17,7 @@ entry: for.body: call void @llvm.lifetime.end(i64 -1, i8* %0) nounwind call void @llvm.lifetime.start(i64 -1, i8* %x.i) nounwind - call void @llvm.dbg.declare(metadata !{i8* %x.i}, metadata !22, metadata !{}) nounwind + call void @llvm.dbg.declare(metadata !{i8* %x.i}, metadata !22) nounwind br label %for.body } diff --git a/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll b/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll index 9b268835b9c..4912213e724 100644 --- a/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll +++ b/llvm/test/CodeGen/X86/dbg-changes-codegen-branch-folding.ll @@ -52,48 +52,48 @@ define void @_Z3barii(i32 %param1, i32 %param2) #0 { entry: %var1 = alloca %struct.AAA3, align 1 %var2 = alloca %struct.AAA3, align 1 - tail call void @llvm.dbg.value(metadata !{i32 %param1}, i64 0, metadata !30, metadata !{}), !dbg !47 - tail call void @llvm.dbg.value(metadata !{i32 %param2}, i64 0, metadata !31, metadata !{}), !dbg !47 - tail call void @llvm.dbg.value(metadata !48, i64 0, metadata !32, metadata !{}), !dbg !49 + tail call void @llvm.dbg.value(metadata !{i32 %param1}, i64 0, metadata !30), !dbg !47 + tail call void @llvm.dbg.value(metadata !{i32 %param2}, i64 0, metadata !31), !dbg !47 + tail call void @llvm.dbg.value(metadata !48, i64 0, metadata !32), !dbg !49 %tobool = icmp eq i32 %param2, 0, !dbg !50 br i1 %tobool, label %if.end, label %if.then, !dbg !50 if.then: ; preds = %entry %call = tail call i8* @_Z5i2stri(i32 %param2), !dbg !52 - tail call void @llvm.dbg.value(metadata !{i8* %call}, i64 0, metadata !32, metadata !{}), !dbg !49 + tail call void @llvm.dbg.value(metadata !{i8* %call}, i64 0, metadata !32), !dbg !49 br label %if.end, !dbg !54 if.end: ; preds = %entry, %if.then - tail call void @llvm.dbg.value(metadata !{%struct.AAA3* %var1}, i64 0, metadata !33, metadata !{}), !dbg !55 - tail call void @llvm.dbg.value(metadata !{%struct.AAA3* %var1}, i64 0, metadata !56, metadata !{}), !dbg !57 - tail call void @llvm.dbg.value(metadata !58, i64 0, metadata !59, metadata !{}), !dbg !60 + tail call void @llvm.dbg.value(metadata !{%struct.AAA3* %var1}, i64 0, metadata !33), !dbg !55 + tail call void @llvm.dbg.value(metadata !{%struct.AAA3* %var1}, i64 0, metadata !56), !dbg !57 + tail call void @llvm.dbg.value(metadata !58, i64 0, metadata !59), !dbg !60 %arraydecay.i = getelementptr inbounds %struct.AAA3* %var1, i64 0, i32 0, i64 0, !dbg !61 call void @_Z3fooPcjPKc(i8* %arraydecay.i, i32 4, i8* getelementptr inbounds ([1 x i8]* @.str, i64 0, i64 0)), !dbg !61 - call void @llvm.dbg.value(metadata !{%struct.AAA3* %var2}, i64 0, metadata !34, metadata !{}), !dbg !63 - call void @llvm.dbg.value(metadata !{%struct.AAA3* %var2}, i64 0, metadata !64, metadata !{}), !dbg !65 - call void @llvm.dbg.value(metadata !58, i64 0, metadata !66, metadata !{}), !dbg !67 + call void @llvm.dbg.value(metadata !{%struct.AAA3* %var2}, i64 0, metadata !34), !dbg !63 + call void @llvm.dbg.value(metadata !{%struct.AAA3* %var2}, i64 0, metadata !64), !dbg !65 + call void @llvm.dbg.value(metadata !58, i64 0, metadata !66), !dbg !67 %arraydecay.i5 = getelementptr inbounds %struct.AAA3* %var2, i64 0, i32 0, i64 0, !dbg !68 call void @_Z3fooPcjPKc(i8* %arraydecay.i5, i32 4, i8* getelementptr inbounds ([1 x i8]* @.str, i64 0, i64 0)), !dbg !68 %tobool1 = icmp eq i32 %param1, 0, !dbg !69 - call void @llvm.dbg.value(metadata !{%struct.AAA3* %var2}, i64 0, metadata !34, metadata !{}), !dbg !63 + call void @llvm.dbg.value(metadata !{%struct.AAA3* %var2}, i64 0, metadata !34), !dbg !63 br i1 %tobool1, label %if.else, label %if.then2, !dbg !69 if.then2: ; preds = %if.end - call void @llvm.dbg.value(metadata !{%struct.AAA3* %var2}, i64 0, metadata !71, metadata !{}), !dbg !73 - call void @llvm.dbg.value(metadata !74, i64 0, metadata !75, metadata !{}), !dbg !76 + call void @llvm.dbg.value(metadata !{%struct.AAA3* %var2}, i64 0, metadata !71), !dbg !73 + call void @llvm.dbg.value(metadata !74, i64 0, metadata !75), !dbg !76 call void @_Z3fooPcjPKc(i8* %arraydecay.i5, i32 4, i8* getelementptr inbounds ([2 x i8]* @.str1, i64 0, i64 0)), !dbg !76 br label %if.end3, !dbg !72 if.else: ; preds = %if.end - call void @llvm.dbg.value(metadata !{%struct.AAA3* %var2}, i64 0, metadata !77, metadata !{}), !dbg !79 - call void @llvm.dbg.value(metadata !80, i64 0, metadata !81, metadata !{}), !dbg !82 + call void @llvm.dbg.value(metadata !{%struct.AAA3* %var2}, i64 0, metadata !77), !dbg !79 + call void @llvm.dbg.value(metadata !80, i64 0, metadata !81), !dbg !82 call void @_Z3fooPcjPKc(i8* %arraydecay.i5, i32 4, i8* getelementptr inbounds ([2 x i8]* @.str2, i64 0, i64 0)), !dbg !82 br label %if.end3 if.end3: ; preds = %if.else, %if.then2 - call void @llvm.dbg.value(metadata !{%struct.AAA3* %var1}, i64 0, metadata !33, metadata !{}), !dbg !55 - call void @llvm.dbg.value(metadata !{%struct.AAA3* %var1}, i64 0, metadata !83, metadata !{}), !dbg !85 - call void @llvm.dbg.value(metadata !58, i64 0, metadata !86, metadata !{}), !dbg !87 + call void @llvm.dbg.value(metadata !{%struct.AAA3* %var1}, i64 0, metadata !33), !dbg !55 + call void @llvm.dbg.value(metadata !{%struct.AAA3* %var1}, i64 0, metadata !83), !dbg !85 + call void @llvm.dbg.value(metadata !58, i64 0, metadata !86), !dbg !87 call void @_Z3fooPcjPKc(i8* %arraydecay.i, i32 4, i8* getelementptr inbounds ([1 x i8]* @.str, i64 0, i64 0)), !dbg !87 ret void, !dbg !88 } @@ -103,7 +103,7 @@ declare i8* @_Z5i2stri(i32) #1 declare void @_Z3fooPcjPKc(i8*, i32, i8*) #1 ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 +declare void @llvm.dbg.value(metadata, i64, metadata) #2 attributes #0 = { uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/X86/dbg-changes-codegen.ll b/llvm/test/CodeGen/X86/dbg-changes-codegen.ll index 1a2b490852b..0b17c455408 100644 --- a/llvm/test/CodeGen/X86/dbg-changes-codegen.ll +++ b/llvm/test/CodeGen/X86/dbg-changes-codegen.ll @@ -44,7 +44,7 @@ define zeroext i1 @_ZN3Foo3batEv(%struct.Foo* %this) #0 align 2 { entry: %0 = load %struct.Foo** @pfoo, align 8 - tail call void @llvm.dbg.value(metadata !{%struct.Foo* %0}, i64 0, metadata !62, metadata !{}) + tail call void @llvm.dbg.value(metadata !{%struct.Foo* %0}, i64 0, metadata !62) %cmp.i = icmp eq %struct.Foo* %0, %this ret i1 %cmp.i } @@ -53,7 +53,7 @@ entry: define void @_Z3bazv() #1 { entry: %0 = load %struct.Wibble** @wibble1, align 8 - tail call void @llvm.dbg.value(metadata !64, i64 0, metadata !65, metadata !{}) + tail call void @llvm.dbg.value(metadata !64, i64 0, metadata !65) %1 = load %struct.Wibble** @wibble2, align 8 %cmp.i = icmp ugt %struct.Wibble* %1, %0 br i1 %cmp.i, label %if.then.i, label %_ZN7Flibble3barEP6Wibble.exit @@ -69,7 +69,7 @@ _ZN7Flibble3barEP6Wibble.exit: ; preds = %entry, %if.then.i } ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) #2 +declare void @llvm.dbg.value(metadata, i64, metadata) #2 attributes #0 = { nounwind readonly uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } attributes #1 = { nounwind uwtable "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-frame-pointer-elim-non-leaf"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "unsafe-fp-math"="false" "use-soft-float"="false" } diff --git a/llvm/test/CodeGen/X86/fpstack-debuginstr-kill.ll b/llvm/test/CodeGen/X86/fpstack-debuginstr-kill.ll index a22751f060e..1c8c66abdad 100644 --- a/llvm/test/CodeGen/X86/fpstack-debuginstr-kill.ll +++ b/llvm/test/CodeGen/X86/fpstack-debuginstr-kill.ll @@ -32,14 +32,14 @@ sw.bb735: ; preds = %if.end511 unreachable if.end41.i2210: ; preds = %if.end511 - call void @llvm.dbg.value(metadata !{x86_fp80 %src.sroa.0.0.src.sroa.0.0.2280}, i64 0, metadata !20, metadata !{}) + call void @llvm.dbg.value(metadata !{x86_fp80 %src.sroa.0.0.src.sroa.0.0.2280}, i64 0, metadata !20) unreachable sw.bb992: ; preds = %if.end511 ret void } -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) +declare void @llvm.dbg.value(metadata, i64, metadata) !llvm.dbg.cu = !{!0} !llvm.module.flags = !{!24, !25} diff --git a/llvm/test/CodeGen/X86/stack-protector-dbginfo.ll b/llvm/test/CodeGen/X86/stack-protector-dbginfo.ll index 4ec3de119d6..8cd4454edb9 100644 --- a/llvm/test/CodeGen/X86/stack-protector-dbginfo.ll +++ b/llvm/test/CodeGen/X86/stack-protector-dbginfo.ll @@ -10,15 +10,15 @@ ; Function Attrs: nounwind sspreq define i32 @_Z18read_response_sizev() #0 { entry: - tail call void @llvm.dbg.value(metadata !22, i64 0, metadata !23, metadata !{}), !dbg !39 + tail call void @llvm.dbg.value(metadata !22, i64 0, metadata !23), !dbg !39 %0 = load i64* getelementptr inbounds ({ i64, [56 x i8] }* @a, i32 0, i32 0), align 8, !dbg !40 - tail call void @llvm.dbg.value(metadata !63, i64 0, metadata !64, metadata !{}), !dbg !71 + tail call void @llvm.dbg.value(metadata !63, i64 0, metadata !64), !dbg !71 %1 = trunc i64 %0 to i32 ret i32 %1 } ; Function Attrs: nounwind readnone -declare void @llvm.dbg.value(metadata, i64, metadata, metadata) +declare void @llvm.dbg.value(metadata, i64, metadata) attributes #0 = { sspreq } diff --git a/llvm/test/CodeGen/XCore/dwarf_debug.ll b/llvm/test/CodeGen/XCore/dwarf_debug.ll index ffa0ccfb3c7..2f4b23111bb 100644 --- a/llvm/test/CodeGen/XCore/dwarf_debug.ll +++ b/llvm/test/CodeGen/XCore/dwarf_debug.ll @@ -13,13 +13,13 @@ define i32 @f(i32 %a) { entry: %a.addr = alloca i32, align 4 store i32 %a, i32* %a.addr, align 4 - call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !11, metadata !{}), !dbg !12 + call void @llvm.dbg.declare(metadata !{i32* %a.addr}, metadata !11), !dbg !12 %0 = load i32* %a.addr, align 4, !dbg !12 %add = add nsw i32 %0, 1, !dbg !12 ret i32 %add, !dbg !12 } -declare void @llvm.dbg.declare(metadata, metadata, metadata) +declare void @llvm.dbg.declare(metadata, metadata) !llvm.dbg.cu = !{!0} !llvm.module.flags = !{!9, !10} |
