summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/test/CodeGen')
-rw-r--r--llvm/test/CodeGen/X86/rtm.ll10
1 files changed, 6 insertions, 4 deletions
diff --git a/llvm/test/CodeGen/X86/rtm.ll b/llvm/test/CodeGen/X86/rtm.ll
index 7215c482ffa..a8562677c7b 100644
--- a/llvm/test/CodeGen/X86/rtm.ll
+++ b/llvm/test/CodeGen/X86/rtm.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+rtm | FileCheck %s --check-prefix=X86
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+rtm | FileCheck %s --check-prefix=X64
+; RUN: llc -verify-machineinstrs < %s -mtriple=i686-unknown-unknown -mattr=+rtm | FileCheck %s --check-prefix=X86
+; RUN: llc -verify-machineinstrs < %s -mtriple=x86_64-unknown-unknown -mattr=+rtm | FileCheck %s --check-prefix=X64
declare i32 @llvm.x86.xbegin() nounwind
declare void @llvm.x86.xend() nounwind
@@ -13,7 +13,8 @@ define i32 @test_xbegin() nounwind uwtable {
; X86-NEXT: xbegin .LBB0_2
; X86-NEXT: # BB#1: # %entry
; X86-NEXT: movl $-1, %eax
-; X86-NEXT: .LBB0_2: # %entry
+; X86: .LBB0_2: # %entry
+; X86-NEXT: # XABORT DEF
; X86-NEXT: retl
;
; X64-LABEL: test_xbegin:
@@ -21,7 +22,8 @@ define i32 @test_xbegin() nounwind uwtable {
; X64-NEXT: xbegin .LBB0_2
; X64-NEXT: # BB#1: # %entry
; X64-NEXT: movl $-1, %eax
-; X64-NEXT: .LBB0_2: # %entry
+; X64: .LBB0_2: # %entry
+; X64-NEXT: # XABORT DEF
; X64-NEXT: retq
entry:
%0 = tail call i32 @llvm.x86.xbegin() nounwind
OpenPOWER on IntegriCloud