diff options
Diffstat (limited to 'llvm/test/CodeGen')
| -rw-r--r-- | llvm/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir index 6b8a9900039..c07dd60ee6a 100644 --- a/llvm/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir +++ b/llvm/test/CodeGen/AArch64/GlobalISel/arm64-instructionselect.mir @@ -36,6 +36,8 @@ define void @mul_s32_gpr() { ret void } define void @mul_s64_gpr() { ret void } + define void @mulh_s64_gpr() { ret void } + define void @sdiv_s32_gpr() { ret void } define void @sdiv_s64_gpr() { ret void } @@ -699,6 +701,34 @@ body: | ... --- +# Same as mul_s32_gpr for the s64 type. +# CHECK-LABEL: name: mulh_s64_gpr +name: mulh_s64_gpr +legalized: true +regBankSelected: true + +# CHECK: registers: +# CHECK-NEXT: - { id: 0, class: gpr64 } +# CHECK-NEXT: - { id: 1, class: gpr64 } +# CHECK-NEXT: - { id: 2, class: gpr64 } +# CHECK-NEXT: - { id: 3, class: gpr64 } + +# CHECK: body: +# CHECK: %0 = COPY %x0 +# CHECK: %1 = COPY %x1 +# CHECK: %2 = SMULHrr %0, %1 +# CHECK: %3 = UMULHrr %0, %1 +body: | + bb.0: + liveins: %x0, %x1 + + %0:gpr(s64) = COPY %x0 + %1:gpr(s64) = COPY %x1 + %2:gpr(s64) = G_SMULH %0, %1 + %3:gpr(s64) = G_UMULH %0, %1 +... + +--- # Same as add_s32_gpr, for G_SDIV operations. # CHECK-LABEL: name: sdiv_s32_gpr name: sdiv_s32_gpr |

