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-rw-r--r--llvm/test/CodeGen/ARM/Stats/2007-03-13-InstrSched.ll (renamed from llvm/test/CodeGen/ARM/2007-03-13-InstrSched.ll)0
-rw-r--r--llvm/test/CodeGen/ARM/Stats/2011-12-14-machine-sink.ll (renamed from llvm/test/CodeGen/ARM/2011-12-14-machine-sink.ll)0
-rw-r--r--llvm/test/CodeGen/ARM/Stats/addrmode.ll (renamed from llvm/test/CodeGen/ARM/addrmode.ll)0
-rw-r--r--llvm/test/CodeGen/ARM/Stats/lit.local.cfg8
-rw-r--r--llvm/test/CodeGen/PowerPC/Stats/iabs.ll (renamed from llvm/test/CodeGen/PowerPC/iabs.ll)0
-rw-r--r--llvm/test/CodeGen/PowerPC/Stats/lit.local.cfg8
-rw-r--r--llvm/test/CodeGen/PowerPC/Stats/rlwimi3.ll (renamed from llvm/test/CodeGen/PowerPC/rlwimi3.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/2003-08-03-CallArgLiveRanges.ll (renamed from llvm/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/2006-03-02-InstrSchedBug.ll (renamed from llvm/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/2006-05-01-SchedCausingSpills.ll (renamed from llvm/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/2006-05-02-InstrSched1.ll (renamed from llvm/test/CodeGen/X86/2006-05-02-InstrSched1.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/2006-05-02-InstrSched2.ll (renamed from llvm/test/CodeGen/X86/2006-05-02-InstrSched2.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/2006-05-11-InstrSched.ll (renamed from llvm/test/CodeGen/X86/2006-05-11-InstrSched.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/2008-02-18-TailMergingBug.ll (renamed from llvm/test/CodeGen/X86/2008-02-18-TailMergingBug.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/2008-10-27-CoalescerBug.ll (renamed from llvm/test/CodeGen/X86/2008-10-27-CoalescerBug.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/2009-02-25-CommuteBug.ll (renamed from llvm/test/CodeGen/X86/2009-02-25-CommuteBug.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/2009-02-26-MachineLICMBug.ll (renamed from llvm/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/2009-03-23-MultiUseSched.ll (renamed from llvm/test/CodeGen/X86/2009-03-23-MultiUseSched.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/2009-04-16-SpillerUnfold.ll (renamed from llvm/test/CodeGen/X86/2009-04-16-SpillerUnfold.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/2010-01-19-OptExtBug.ll (renamed from llvm/test/CodeGen/X86/2010-01-19-OptExtBug.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/2011-06-12-FastAllocSpill.ll (renamed from llvm/test/CodeGen/X86/2011-06-12-FastAllocSpill.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/2012-03-26-PostRALICMBug.ll (renamed from llvm/test/CodeGen/X86/2012-03-26-PostRALICMBug.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/MachineSink-PHIUse.ll (renamed from llvm/test/CodeGen/X86/MachineSink-PHIUse.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/constant-pool-remat-0.ll (renamed from llvm/test/CodeGen/X86/constant-pool-remat-0.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/convert-2-addr-3-addr-inc64.ll (renamed from llvm/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/dagcombine-cse.ll (renamed from llvm/test/CodeGen/X86/dagcombine-cse.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/hoist-invariant-load.ll (renamed from llvm/test/CodeGen/X86/hoist-invariant-load.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/licm-nested.ll (renamed from llvm/test/CodeGen/X86/licm-nested.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/lit.local.cfg8
-rw-r--r--llvm/test/CodeGen/X86/Stats/phi-immediate-factoring.ll (renamed from llvm/test/CodeGen/X86/phi-immediate-factoring.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/pr3522.ll (renamed from llvm/test/CodeGen/X86/pr3522.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/regpressure.ll (renamed from llvm/test/CodeGen/X86/regpressure.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/twoaddr-coalesce-2.ll (renamed from llvm/test/CodeGen/X86/twoaddr-coalesce-2.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/twoaddr-pass-sink.ll (renamed from llvm/test/CodeGen/X86/twoaddr-pass-sink.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/vec_insert-6.ll (renamed from llvm/test/CodeGen/X86/vec_insert-6.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/vec_shuffle-19.ll (renamed from llvm/test/CodeGen/X86/vec_shuffle-19.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/vec_shuffle-20.ll (renamed from llvm/test/CodeGen/X86/vec_shuffle-20.ll)0
-rw-r--r--llvm/test/CodeGen/X86/Stats/zero-remat.ll (renamed from llvm/test/CodeGen/X86/zero-remat.ll)0
38 files changed, 24 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/ARM/2007-03-13-InstrSched.ll b/llvm/test/CodeGen/ARM/Stats/2007-03-13-InstrSched.ll
index a63cdd46e2d..a63cdd46e2d 100644
--- a/llvm/test/CodeGen/ARM/2007-03-13-InstrSched.ll
+++ b/llvm/test/CodeGen/ARM/Stats/2007-03-13-InstrSched.ll
diff --git a/llvm/test/CodeGen/ARM/2011-12-14-machine-sink.ll b/llvm/test/CodeGen/ARM/Stats/2011-12-14-machine-sink.ll
index b21bb006e32..b21bb006e32 100644
--- a/llvm/test/CodeGen/ARM/2011-12-14-machine-sink.ll
+++ b/llvm/test/CodeGen/ARM/Stats/2011-12-14-machine-sink.ll
diff --git a/llvm/test/CodeGen/ARM/addrmode.ll b/llvm/test/CodeGen/ARM/Stats/addrmode.ll
index 6da90897b94..6da90897b94 100644
--- a/llvm/test/CodeGen/ARM/addrmode.ll
+++ b/llvm/test/CodeGen/ARM/Stats/addrmode.ll
diff --git a/llvm/test/CodeGen/ARM/Stats/lit.local.cfg b/llvm/test/CodeGen/ARM/Stats/lit.local.cfg
new file mode 100644
index 00000000000..f6194d24218
--- /dev/null
+++ b/llvm/test/CodeGen/ARM/Stats/lit.local.cfg
@@ -0,0 +1,8 @@
+config.suffixes = ['.ll', '.c', '.cpp']
+
+targets = set(config.root.targets_to_build.split())
+if not 'ARM' in targets:
+ config.unsupported = True
+
+if not config.root.enable_assertions:
+ config.unsupported = True
diff --git a/llvm/test/CodeGen/PowerPC/iabs.ll b/llvm/test/CodeGen/PowerPC/Stats/iabs.ll
index 7d089bbd653..7d089bbd653 100644
--- a/llvm/test/CodeGen/PowerPC/iabs.ll
+++ b/llvm/test/CodeGen/PowerPC/Stats/iabs.ll
diff --git a/llvm/test/CodeGen/PowerPC/Stats/lit.local.cfg b/llvm/test/CodeGen/PowerPC/Stats/lit.local.cfg
new file mode 100644
index 00000000000..2608e139e90
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/Stats/lit.local.cfg
@@ -0,0 +1,8 @@
+config.suffixes = ['.ll', '.c', '.cpp']
+
+targets = set(config.root.targets_to_build.split())
+if not 'PowerPC' in targets:
+ config.unsupported = True
+
+if not config.root.enable_assertions:
+ config.unsupported = True
diff --git a/llvm/test/CodeGen/PowerPC/rlwimi3.ll b/llvm/test/CodeGen/PowerPC/Stats/rlwimi3.ll
index 7efdbe9634f..7efdbe9634f 100644
--- a/llvm/test/CodeGen/PowerPC/rlwimi3.ll
+++ b/llvm/test/CodeGen/PowerPC/Stats/rlwimi3.ll
diff --git a/llvm/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll b/llvm/test/CodeGen/X86/Stats/2003-08-03-CallArgLiveRanges.ll
index 0af2445d7fb..0af2445d7fb 100644
--- a/llvm/test/CodeGen/X86/2003-08-03-CallArgLiveRanges.ll
+++ b/llvm/test/CodeGen/X86/Stats/2003-08-03-CallArgLiveRanges.ll
diff --git a/llvm/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll b/llvm/test/CodeGen/X86/Stats/2006-03-02-InstrSchedBug.ll
index 1a3d74918d1..1a3d74918d1 100644
--- a/llvm/test/CodeGen/X86/2006-03-02-InstrSchedBug.ll
+++ b/llvm/test/CodeGen/X86/Stats/2006-03-02-InstrSchedBug.ll
diff --git a/llvm/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll b/llvm/test/CodeGen/X86/Stats/2006-05-01-SchedCausingSpills.ll
index 5cba3efeefb..5cba3efeefb 100644
--- a/llvm/test/CodeGen/X86/2006-05-01-SchedCausingSpills.ll
+++ b/llvm/test/CodeGen/X86/Stats/2006-05-01-SchedCausingSpills.ll
diff --git a/llvm/test/CodeGen/X86/2006-05-02-InstrSched1.ll b/llvm/test/CodeGen/X86/Stats/2006-05-02-InstrSched1.ll
index 1c75f93915a..1c75f93915a 100644
--- a/llvm/test/CodeGen/X86/2006-05-02-InstrSched1.ll
+++ b/llvm/test/CodeGen/X86/Stats/2006-05-02-InstrSched1.ll
diff --git a/llvm/test/CodeGen/X86/2006-05-02-InstrSched2.ll b/llvm/test/CodeGen/X86/Stats/2006-05-02-InstrSched2.ll
index 95eefa1e719..95eefa1e719 100644
--- a/llvm/test/CodeGen/X86/2006-05-02-InstrSched2.ll
+++ b/llvm/test/CodeGen/X86/Stats/2006-05-02-InstrSched2.ll
diff --git a/llvm/test/CodeGen/X86/2006-05-11-InstrSched.ll b/llvm/test/CodeGen/X86/Stats/2006-05-11-InstrSched.ll
index 37c510786a5..37c510786a5 100644
--- a/llvm/test/CodeGen/X86/2006-05-11-InstrSched.ll
+++ b/llvm/test/CodeGen/X86/Stats/2006-05-11-InstrSched.ll
diff --git a/llvm/test/CodeGen/X86/2008-02-18-TailMergingBug.ll b/llvm/test/CodeGen/X86/Stats/2008-02-18-TailMergingBug.ll
index a1b973d7ccf..a1b973d7ccf 100644
--- a/llvm/test/CodeGen/X86/2008-02-18-TailMergingBug.ll
+++ b/llvm/test/CodeGen/X86/Stats/2008-02-18-TailMergingBug.ll
diff --git a/llvm/test/CodeGen/X86/2008-10-27-CoalescerBug.ll b/llvm/test/CodeGen/X86/Stats/2008-10-27-CoalescerBug.ll
index b2cf34cd203..b2cf34cd203 100644
--- a/llvm/test/CodeGen/X86/2008-10-27-CoalescerBug.ll
+++ b/llvm/test/CodeGen/X86/Stats/2008-10-27-CoalescerBug.ll
diff --git a/llvm/test/CodeGen/X86/2009-02-25-CommuteBug.ll b/llvm/test/CodeGen/X86/Stats/2009-02-25-CommuteBug.ll
index 9cbf3509406..9cbf3509406 100644
--- a/llvm/test/CodeGen/X86/2009-02-25-CommuteBug.ll
+++ b/llvm/test/CodeGen/X86/Stats/2009-02-25-CommuteBug.ll
diff --git a/llvm/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll b/llvm/test/CodeGen/X86/Stats/2009-02-26-MachineLICMBug.ll
index d50fe6f73a0..d50fe6f73a0 100644
--- a/llvm/test/CodeGen/X86/2009-02-26-MachineLICMBug.ll
+++ b/llvm/test/CodeGen/X86/Stats/2009-02-26-MachineLICMBug.ll
diff --git a/llvm/test/CodeGen/X86/2009-03-23-MultiUseSched.ll b/llvm/test/CodeGen/X86/Stats/2009-03-23-MultiUseSched.ll
index d934ec9a88f..d934ec9a88f 100644
--- a/llvm/test/CodeGen/X86/2009-03-23-MultiUseSched.ll
+++ b/llvm/test/CodeGen/X86/Stats/2009-03-23-MultiUseSched.ll
diff --git a/llvm/test/CodeGen/X86/2009-04-16-SpillerUnfold.ll b/llvm/test/CodeGen/X86/Stats/2009-04-16-SpillerUnfold.ll
index ad18a0c5b94..ad18a0c5b94 100644
--- a/llvm/test/CodeGen/X86/2009-04-16-SpillerUnfold.ll
+++ b/llvm/test/CodeGen/X86/Stats/2009-04-16-SpillerUnfold.ll
diff --git a/llvm/test/CodeGen/X86/2010-01-19-OptExtBug.ll b/llvm/test/CodeGen/X86/Stats/2010-01-19-OptExtBug.ll
index eb4a5c04a2a..eb4a5c04a2a 100644
--- a/llvm/test/CodeGen/X86/2010-01-19-OptExtBug.ll
+++ b/llvm/test/CodeGen/X86/Stats/2010-01-19-OptExtBug.ll
diff --git a/llvm/test/CodeGen/X86/2011-06-12-FastAllocSpill.ll b/llvm/test/CodeGen/X86/Stats/2011-06-12-FastAllocSpill.ll
index 47ef693cc25..47ef693cc25 100644
--- a/llvm/test/CodeGen/X86/2011-06-12-FastAllocSpill.ll
+++ b/llvm/test/CodeGen/X86/Stats/2011-06-12-FastAllocSpill.ll
diff --git a/llvm/test/CodeGen/X86/2012-03-26-PostRALICMBug.ll b/llvm/test/CodeGen/X86/Stats/2012-03-26-PostRALICMBug.ll
index 18a33137735..18a33137735 100644
--- a/llvm/test/CodeGen/X86/2012-03-26-PostRALICMBug.ll
+++ b/llvm/test/CodeGen/X86/Stats/2012-03-26-PostRALICMBug.ll
diff --git a/llvm/test/CodeGen/X86/MachineSink-PHIUse.ll b/llvm/test/CodeGen/X86/Stats/MachineSink-PHIUse.ll
index 33141680aa9..33141680aa9 100644
--- a/llvm/test/CodeGen/X86/MachineSink-PHIUse.ll
+++ b/llvm/test/CodeGen/X86/Stats/MachineSink-PHIUse.ll
diff --git a/llvm/test/CodeGen/X86/constant-pool-remat-0.ll b/llvm/test/CodeGen/X86/Stats/constant-pool-remat-0.ll
index 4be14d2128e..4be14d2128e 100644
--- a/llvm/test/CodeGen/X86/constant-pool-remat-0.ll
+++ b/llvm/test/CodeGen/X86/Stats/constant-pool-remat-0.ll
diff --git a/llvm/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll b/llvm/test/CodeGen/X86/Stats/convert-2-addr-3-addr-inc64.ll
index 064ee364d14..064ee364d14 100644
--- a/llvm/test/CodeGen/X86/convert-2-addr-3-addr-inc64.ll
+++ b/llvm/test/CodeGen/X86/Stats/convert-2-addr-3-addr-inc64.ll
diff --git a/llvm/test/CodeGen/X86/dagcombine-cse.ll b/llvm/test/CodeGen/X86/Stats/dagcombine-cse.ll
index af69531246c..af69531246c 100644
--- a/llvm/test/CodeGen/X86/dagcombine-cse.ll
+++ b/llvm/test/CodeGen/X86/Stats/dagcombine-cse.ll
diff --git a/llvm/test/CodeGen/X86/hoist-invariant-load.ll b/llvm/test/CodeGen/X86/Stats/hoist-invariant-load.ll
index 74ecd045b3d..74ecd045b3d 100644
--- a/llvm/test/CodeGen/X86/hoist-invariant-load.ll
+++ b/llvm/test/CodeGen/X86/Stats/hoist-invariant-load.ll
diff --git a/llvm/test/CodeGen/X86/licm-nested.ll b/llvm/test/CodeGen/X86/Stats/licm-nested.ll
index c3f991d7a9b..c3f991d7a9b 100644
--- a/llvm/test/CodeGen/X86/licm-nested.ll
+++ b/llvm/test/CodeGen/X86/Stats/licm-nested.ll
diff --git a/llvm/test/CodeGen/X86/Stats/lit.local.cfg b/llvm/test/CodeGen/X86/Stats/lit.local.cfg
new file mode 100644
index 00000000000..1a5fd5ec865
--- /dev/null
+++ b/llvm/test/CodeGen/X86/Stats/lit.local.cfg
@@ -0,0 +1,8 @@
+config.suffixes = ['.ll', '.c', '.cpp']
+
+targets = set(config.root.targets_to_build.split())
+if not 'X86' in targets:
+ config.unsupported = True
+
+if not config.root.enable_assertions:
+ config.unsupported = True
diff --git a/llvm/test/CodeGen/X86/phi-immediate-factoring.ll b/llvm/test/CodeGen/X86/Stats/phi-immediate-factoring.ll
index 476bb109983..476bb109983 100644
--- a/llvm/test/CodeGen/X86/phi-immediate-factoring.ll
+++ b/llvm/test/CodeGen/X86/Stats/phi-immediate-factoring.ll
diff --git a/llvm/test/CodeGen/X86/pr3522.ll b/llvm/test/CodeGen/X86/Stats/pr3522.ll
index d8f37781fc6..d8f37781fc6 100644
--- a/llvm/test/CodeGen/X86/pr3522.ll
+++ b/llvm/test/CodeGen/X86/Stats/pr3522.ll
diff --git a/llvm/test/CodeGen/X86/regpressure.ll b/llvm/test/CodeGen/X86/Stats/regpressure.ll
index 52d7b56f182..52d7b56f182 100644
--- a/llvm/test/CodeGen/X86/regpressure.ll
+++ b/llvm/test/CodeGen/X86/Stats/regpressure.ll
diff --git a/llvm/test/CodeGen/X86/twoaddr-coalesce-2.ll b/llvm/test/CodeGen/X86/Stats/twoaddr-coalesce-2.ll
index af6d47af7a0..af6d47af7a0 100644
--- a/llvm/test/CodeGen/X86/twoaddr-coalesce-2.ll
+++ b/llvm/test/CodeGen/X86/Stats/twoaddr-coalesce-2.ll
diff --git a/llvm/test/CodeGen/X86/twoaddr-pass-sink.ll b/llvm/test/CodeGen/X86/Stats/twoaddr-pass-sink.ll
index 513c304e3bf..513c304e3bf 100644
--- a/llvm/test/CodeGen/X86/twoaddr-pass-sink.ll
+++ b/llvm/test/CodeGen/X86/Stats/twoaddr-pass-sink.ll
diff --git a/llvm/test/CodeGen/X86/vec_insert-6.ll b/llvm/test/CodeGen/X86/Stats/vec_insert-6.ll
index 2a4864a48a2..2a4864a48a2 100644
--- a/llvm/test/CodeGen/X86/vec_insert-6.ll
+++ b/llvm/test/CodeGen/X86/Stats/vec_insert-6.ll
diff --git a/llvm/test/CodeGen/X86/vec_shuffle-19.ll b/llvm/test/CodeGen/X86/Stats/vec_shuffle-19.ll
index b26f920e5e2..b26f920e5e2 100644
--- a/llvm/test/CodeGen/X86/vec_shuffle-19.ll
+++ b/llvm/test/CodeGen/X86/Stats/vec_shuffle-19.ll
diff --git a/llvm/test/CodeGen/X86/vec_shuffle-20.ll b/llvm/test/CodeGen/X86/Stats/vec_shuffle-20.ll
index b6b8ba6f846..b6b8ba6f846 100644
--- a/llvm/test/CodeGen/X86/vec_shuffle-20.ll
+++ b/llvm/test/CodeGen/X86/Stats/vec_shuffle-20.ll
diff --git a/llvm/test/CodeGen/X86/zero-remat.ll b/llvm/test/CodeGen/X86/Stats/zero-remat.ll
index 4242530f773..4242530f773 100644
--- a/llvm/test/CodeGen/X86/zero-remat.ll
+++ b/llvm/test/CodeGen/X86/Stats/zero-remat.ll
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