diff options
Diffstat (limited to 'llvm/test/CodeGen/X86')
| -rw-r--r-- | llvm/test/CodeGen/X86/pr40539.ll | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/pr40539.ll b/llvm/test/CodeGen/X86/pr40539.ll new file mode 100644 index 00000000000..65693215daa --- /dev/null +++ b/llvm/test/CodeGen/X86/pr40539.ll @@ -0,0 +1,36 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc < %s -mtriple=i686-unknown-unknown -mcpu=pentium4 | FileCheck %s + +; FIXME: The fstps in the following test case should be between the inline +; assembly expansion and the cmpeqss. The postRA scheduler has rearranged them. + +@f1 = global float 1.000000e+00, align 4 + +define zeroext i1 @_Z9test_log2v() { +; CHECK-LABEL: _Z9test_log2v: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pushl %eax +; CHECK-NEXT: .cfi_def_cfa_offset 8 +; CHECK-NEXT: flds f1 +; CHECK-NEXT: fstps (%esp) +; CHECK-NEXT: xorps %xmm0, %xmm0 +; CHECK-NEXT: #APP +; CHECK-NEXT: fld1 +; CHECK-NEXT: fxch %st(1) +; CHECK-NEXT: fyl2x +; CHECK-NEXT: #NO_APP +; CHECK-NEXT: cmpeqss (%esp), %xmm0 +; CHECK-NEXT: movd %xmm0, %eax +; CHECK-NEXT: andl $1, %eax +; CHECK-NEXT: # kill: def $al killed $al killed $eax +; CHECK-NEXT: popl %ecx +; CHECK-NEXT: .cfi_def_cfa_offset 4 +; CHECK-NEXT: retl +entry: + %0 = load float, float* @f1, align 4 + %1 = fpext float %0 to x86_fp80 + %2 = tail call x86_fp80 asm "fld1; fxch; fyl2x", "={st},0,~{st(1)},~{dirflag},~{fpsr},~{flags}"(x86_fp80 %1) + %conv = fptrunc x86_fp80 %2 to float + %3 = fcmp oeq float %conv, 0.000000e+00 + ret i1 %3 +} |
