summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/X86
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/test/CodeGen/X86')
-rw-r--r--llvm/test/CodeGen/X86/memcmp-optsize.ll10
-rw-r--r--llvm/test/CodeGen/X86/memcmp.ll10
-rw-r--r--llvm/test/CodeGen/X86/vec_insert-7.ll2
-rw-r--r--llvm/test/CodeGen/X86/vec_zero_cse.ll3
-rw-r--r--llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll73
-rw-r--r--llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll24
-rw-r--r--llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll24
-rw-r--r--llvm/test/CodeGen/X86/vselect-avx.ll4
-rw-r--r--llvm/test/CodeGen/X86/widen_arith-4.ll4
-rw-r--r--llvm/test/CodeGen/X86/widen_arith-5.ll2
-rw-r--r--llvm/test/CodeGen/X86/widen_cast-1.ll8
-rw-r--r--llvm/test/CodeGen/X86/widen_shuffle-1.ll2
12 files changed, 60 insertions, 106 deletions
diff --git a/llvm/test/CodeGen/X86/memcmp-optsize.ll b/llvm/test/CodeGen/X86/memcmp-optsize.ll
index d2b390f0943..6af21d93b09 100644
--- a/llvm/test/CodeGen/X86/memcmp-optsize.ll
+++ b/llvm/test/CodeGen/X86/memcmp-optsize.ll
@@ -728,11 +728,9 @@ define i1 @length24_eq_const(i8* %X) nounwind optsize {
; X64-SSE2: # %bb.0:
; X64-SSE2-NEXT: movdqu (%rdi), %xmm0
; X64-SSE2-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
-; X64-SSE2-NEXT: movabsq $3689065127958034230, %rax # imm = 0x3332313039383736
-; X64-SSE2-NEXT: movq %rax, %xmm2
-; X64-SSE2-NEXT: pcmpeqb %xmm1, %xmm2
+; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm1
; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm0
-; X64-SSE2-NEXT: pand %xmm2, %xmm0
+; X64-SSE2-NEXT: pand %xmm1, %xmm0
; X64-SSE2-NEXT: pmovmskb %xmm0, %eax
; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
; X64-SSE2-NEXT: setne %al
@@ -742,9 +740,7 @@ define i1 @length24_eq_const(i8* %X) nounwind optsize {
; X64-AVX2: # %bb.0:
; X64-AVX2-NEXT: vmovdqu (%rdi), %xmm0
; X64-AVX2-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
-; X64-AVX2-NEXT: movabsq $3689065127958034230, %rax # imm = 0x3332313039383736
-; X64-AVX2-NEXT: vmovq %rax, %xmm2
-; X64-AVX2-NEXT: vpcmpeqb %xmm2, %xmm1, %xmm1
+; X64-AVX2-NEXT: vpcmpeqb {{.*}}(%rip), %xmm1, %xmm1
; X64-AVX2-NEXT: vpcmpeqb {{.*}}(%rip), %xmm0, %xmm0
; X64-AVX2-NEXT: vpand %xmm1, %xmm0, %xmm0
; X64-AVX2-NEXT: vpmovmskb %xmm0, %eax
diff --git a/llvm/test/CodeGen/X86/memcmp.ll b/llvm/test/CodeGen/X86/memcmp.ll
index 371c16881ff..83210b44952 100644
--- a/llvm/test/CodeGen/X86/memcmp.ll
+++ b/llvm/test/CodeGen/X86/memcmp.ll
@@ -998,11 +998,9 @@ define i1 @length24_eq_const(i8* %X) nounwind {
; X64-SSE2: # %bb.0:
; X64-SSE2-NEXT: movdqu (%rdi), %xmm0
; X64-SSE2-NEXT: movq {{.*#+}} xmm1 = mem[0],zero
-; X64-SSE2-NEXT: movabsq $3689065127958034230, %rax # imm = 0x3332313039383736
-; X64-SSE2-NEXT: movq %rax, %xmm2
-; X64-SSE2-NEXT: pcmpeqb %xmm1, %xmm2
+; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm1
; X64-SSE2-NEXT: pcmpeqb {{.*}}(%rip), %xmm0
-; X64-SSE2-NEXT: pand %xmm2, %xmm0
+; X64-SSE2-NEXT: pand %xmm1, %xmm0
; X64-SSE2-NEXT: pmovmskb %xmm0, %eax
; X64-SSE2-NEXT: cmpl $65535, %eax # imm = 0xFFFF
; X64-SSE2-NEXT: setne %al
@@ -1012,9 +1010,7 @@ define i1 @length24_eq_const(i8* %X) nounwind {
; X64-AVX: # %bb.0:
; X64-AVX-NEXT: vmovdqu (%rdi), %xmm0
; X64-AVX-NEXT: vmovq {{.*#+}} xmm1 = mem[0],zero
-; X64-AVX-NEXT: movabsq $3689065127958034230, %rax # imm = 0x3332313039383736
-; X64-AVX-NEXT: vmovq %rax, %xmm2
-; X64-AVX-NEXT: vpcmpeqb %xmm2, %xmm1, %xmm1
+; X64-AVX-NEXT: vpcmpeqb {{.*}}(%rip), %xmm1, %xmm1
; X64-AVX-NEXT: vpcmpeqb {{.*}}(%rip), %xmm0, %xmm0
; X64-AVX-NEXT: vpand %xmm1, %xmm0, %xmm0
; X64-AVX-NEXT: vpmovmskb %xmm0, %eax
diff --git a/llvm/test/CodeGen/X86/vec_insert-7.ll b/llvm/test/CodeGen/X86/vec_insert-7.ll
index e0dd070bf4e..94204ee4c3a 100644
--- a/llvm/test/CodeGen/X86/vec_insert-7.ll
+++ b/llvm/test/CodeGen/X86/vec_insert-7.ll
@@ -18,7 +18,7 @@ define x86_mmx @mmx_movzl(x86_mmx %x) nounwind {
; X64-LABEL: mmx_movzl:
; X64: ## %bb.0:
; X64-NEXT: movl $32, %eax
-; X64-NEXT: movd %eax, %xmm0
+; X64-NEXT: movq %rax, %xmm0
; X64-NEXT: retq
%tmp = bitcast x86_mmx %x to <2 x i32>
%tmp3 = insertelement <2 x i32> %tmp, i32 32, i32 0
diff --git a/llvm/test/CodeGen/X86/vec_zero_cse.ll b/llvm/test/CodeGen/X86/vec_zero_cse.ll
index b868cc01407..8629b2141b1 100644
--- a/llvm/test/CodeGen/X86/vec_zero_cse.ll
+++ b/llvm/test/CodeGen/X86/vec_zero_cse.ll
@@ -41,8 +41,7 @@ define void @test2() {
; X64-LABEL: test2:
; X64: # %bb.0:
; X64-NEXT: movq $-1, {{.*}}(%rip)
-; X64-NEXT: movq {{.*}}(%rip), %rax
-; X64-NEXT: movq %rax, {{.*}}(%rip)
+; X64-NEXT: movq $-1, {{.*}}(%rip)
; X64-NEXT: retq
store <1 x i64> < i64 -1 >, <1 x i64>* @M1
store <2 x i32> < i32 -1, i32 -1 >, <2 x i32>* @M2
diff --git a/llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll b/llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
index 732b9019049..cc4669b1c41 100644
--- a/llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
+++ b/llvm/test/CodeGen/X86/vector-shift-ashr-sub128.ll
@@ -2174,19 +2174,13 @@ define <2 x i16> @constant_shift_v2i16(<2 x i16> %a) nounwind {
; X32-SSE-NEXT: psrad $16, %xmm0
; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
; X32-SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
-; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [2,0,0,0,0,0,0,0,3,0,0,0,0,0,0,0]
-; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [0,2147483648,0,2147483648]
-; X32-SSE-NEXT: movdqa %xmm2, %xmm3
-; X32-SSE-NEXT: psrlq %xmm1, %xmm3
-; X32-SSE-NEXT: movdqa {{.*#+}} xmm4 = [3,0,2,0]
-; X32-SSE-NEXT: psrlq %xmm4, %xmm2
-; X32-SSE-NEXT: movsd {{.*#+}} xmm2 = xmm3[0],xmm2[1]
-; X32-SSE-NEXT: movdqa %xmm0, %xmm3
-; X32-SSE-NEXT: psrlq %xmm1, %xmm3
-; X32-SSE-NEXT: psrlq %xmm4, %xmm0
-; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm3[0],xmm0[1]
-; X32-SSE-NEXT: xorpd %xmm2, %xmm0
-; X32-SSE-NEXT: psubq %xmm2, %xmm0
+; X32-SSE-NEXT: movdqa %xmm0, %xmm1
+; X32-SSE-NEXT: psrlq $2, %xmm1
+; X32-SSE-NEXT: psrlq $3, %xmm0
+; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
+; X32-SSE-NEXT: movapd {{.*#+}} xmm1 = [1.4916681462400413E-154,1.2882297539194267E-231]
+; X32-SSE-NEXT: xorpd %xmm1, %xmm0
+; X32-SSE-NEXT: psubq %xmm1, %xmm0
; X32-SSE-NEXT: retl
%shift = ashr <2 x i16> %a, <i16 2, i16 3>
ret <2 x i16> %shift
@@ -2498,19 +2492,13 @@ define <2 x i8> @constant_shift_v2i8(<2 x i8> %a) nounwind {
; X32-SSE-NEXT: psrad $24, %xmm0
; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
; X32-SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
-; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [2,0,0,0,0,0,0,0,3,0,0,0,0,0,0,0]
-; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [0,2147483648,0,2147483648]
-; X32-SSE-NEXT: movdqa %xmm2, %xmm3
-; X32-SSE-NEXT: psrlq %xmm1, %xmm3
-; X32-SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm1[2,3,0,1]
-; X32-SSE-NEXT: psrlq %xmm4, %xmm2
-; X32-SSE-NEXT: movsd {{.*#+}} xmm2 = xmm3[0],xmm2[1]
-; X32-SSE-NEXT: movdqa %xmm0, %xmm3
-; X32-SSE-NEXT: psrlq %xmm1, %xmm3
-; X32-SSE-NEXT: psrlq %xmm4, %xmm0
-; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm3[0],xmm0[1]
-; X32-SSE-NEXT: xorpd %xmm2, %xmm0
-; X32-SSE-NEXT: psubq %xmm2, %xmm0
+; X32-SSE-NEXT: movdqa %xmm0, %xmm1
+; X32-SSE-NEXT: psrlq $2, %xmm1
+; X32-SSE-NEXT: psrlq $3, %xmm0
+; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
+; X32-SSE-NEXT: movapd {{.*#+}} xmm1 = [1.4916681462400413E-154,1.2882297539194267E-231]
+; X32-SSE-NEXT: xorpd %xmm1, %xmm0
+; X32-SSE-NEXT: psubq %xmm1, %xmm0
; X32-SSE-NEXT: retl
%shift = ashr <2 x i8> %a, <i8 2, i8 3>
ret <2 x i8> %shift
@@ -2734,14 +2722,12 @@ define <2 x i16> @splatconstant_shift_v2i16(<2 x i16> %a) nounwind {
; X32-SSE-NEXT: psrad $16, %xmm0
; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
; X32-SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
-; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [3,0,0,0,0,0,0,0,3,0,0,0,0,0,0,0]
-; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [0,2147483648,0,2147483648]
-; X32-SSE-NEXT: psrlq %xmm1, %xmm2
-; X32-SSE-NEXT: movsd {{.*#+}} xmm2 = xmm2[0,1]
-; X32-SSE-NEXT: psrlq %xmm1, %xmm0
-; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm0[0,1]
-; X32-SSE-NEXT: xorpd %xmm2, %xmm0
-; X32-SSE-NEXT: psubq %xmm2, %xmm0
+; X32-SSE-NEXT: movdqa %xmm0, %xmm1
+; X32-SSE-NEXT: psrad $3, %xmm1
+; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
+; X32-SSE-NEXT: psrlq $3, %xmm0
+; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
+; X32-SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; X32-SSE-NEXT: retl
%shift = ashr <2 x i16> %a, <i16 3, i16 3>
ret <2 x i16> %shift
@@ -2913,19 +2899,12 @@ define <2 x i8> @splatconstant_shift_v2i8(<2 x i8> %a) nounwind {
; X32-SSE-NEXT: psrad $24, %xmm0
; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[1,3,2,3]
; X32-SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
-; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [3,0,0,0,0,0,0,0,3,0,0,0,0,0,0,0]
-; X32-SSE-NEXT: movdqa {{.*#+}} xmm2 = [0,2147483648,0,2147483648]
-; X32-SSE-NEXT: movdqa %xmm2, %xmm3
-; X32-SSE-NEXT: psrlq %xmm1, %xmm3
-; X32-SSE-NEXT: pshufd {{.*#+}} xmm4 = xmm1[2,3,0,1]
-; X32-SSE-NEXT: psrlq %xmm4, %xmm2
-; X32-SSE-NEXT: movsd {{.*#+}} xmm2 = xmm3[0],xmm2[1]
-; X32-SSE-NEXT: movdqa %xmm0, %xmm3
-; X32-SSE-NEXT: psrlq %xmm1, %xmm3
-; X32-SSE-NEXT: psrlq %xmm4, %xmm0
-; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm3[0],xmm0[1]
-; X32-SSE-NEXT: xorpd %xmm2, %xmm0
-; X32-SSE-NEXT: psubq %xmm2, %xmm0
+; X32-SSE-NEXT: movdqa %xmm0, %xmm1
+; X32-SSE-NEXT: psrad $3, %xmm1
+; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[1,3,2,3]
+; X32-SSE-NEXT: psrlq $3, %xmm0
+; X32-SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3]
+; X32-SSE-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; X32-SSE-NEXT: retl
%shift = ashr <2 x i8> %a, <i8 3, i8 3>
ret <2 x i8> %shift
diff --git a/llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll b/llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll
index 8b0ae09b964..fc3bb0350af 100644
--- a/llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll
+++ b/llvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll
@@ -1800,8 +1800,8 @@ define <2 x i16> @constant_shift_v2i16(<2 x i16> %a) nounwind {
; X32-SSE: # %bb.0:
; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm0
; X32-SSE-NEXT: movdqa %xmm0, %xmm1
-; X32-SSE-NEXT: psrlq {{\.LCPI.*}}, %xmm1
-; X32-SSE-NEXT: psrlq {{\.LCPI.*}}, %xmm0
+; X32-SSE-NEXT: psrlq $2, %xmm1
+; X32-SSE-NEXT: psrlq $3, %xmm0
; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
; X32-SSE-NEXT: retl
%shift = lshr <2 x i16> %a, <i16 2, i16 3>
@@ -2031,12 +2031,10 @@ define <2 x i8> @constant_shift_v2i8(<2 x i8> %a) nounwind {
; X32-SSE-LABEL: constant_shift_v2i8:
; X32-SSE: # %bb.0:
; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [2,0,0,0,0,0,0,0,3,0,0,0,0,0,0,0]
-; X32-SSE-NEXT: movdqa %xmm0, %xmm2
-; X32-SSE-NEXT: psrlq %xmm1, %xmm2
-; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
-; X32-SSE-NEXT: psrlq %xmm1, %xmm0
-; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1]
+; X32-SSE-NEXT: movdqa %xmm0, %xmm1
+; X32-SSE-NEXT: psrlq $2, %xmm1
+; X32-SSE-NEXT: psrlq $3, %xmm0
+; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
; X32-SSE-NEXT: retl
%shift = lshr <2 x i8> %a, <i8 2, i8 3>
ret <2 x i8> %shift
@@ -2207,8 +2205,7 @@ define <2 x i16> @splatconstant_shift_v2i16(<2 x i16> %a) nounwind {
; X32-SSE-LABEL: splatconstant_shift_v2i16:
; X32-SSE: # %bb.0:
; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE-NEXT: psrlq {{\.LCPI.*}}, %xmm0
-; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm0[0,1]
+; X32-SSE-NEXT: psrlq $3, %xmm0
; X32-SSE-NEXT: retl
%shift = lshr <2 x i16> %a, <i16 3, i16 3>
ret <2 x i16> %shift
@@ -2328,12 +2325,7 @@ define <2 x i8> @splatconstant_shift_v2i8(<2 x i8> %a) nounwind {
; X32-SSE-LABEL: splatconstant_shift_v2i8:
; X32-SSE: # %bb.0:
; X32-SSE-NEXT: pand {{\.LCPI.*}}, %xmm0
-; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [3,0,0,0,0,0,0,0,3,0,0,0,0,0,0,0]
-; X32-SSE-NEXT: movdqa %xmm0, %xmm2
-; X32-SSE-NEXT: psrlq %xmm1, %xmm2
-; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
-; X32-SSE-NEXT: psrlq %xmm1, %xmm0
-; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1]
+; X32-SSE-NEXT: psrlq $3, %xmm0
; X32-SSE-NEXT: retl
%shift = lshr <2 x i8> %a, <i8 3, i8 3>
ret <2 x i8> %shift
diff --git a/llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll b/llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll
index d3f06317e10..bb731655977 100644
--- a/llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll
+++ b/llvm/test/CodeGen/X86/vector-shift-shl-sub128.ll
@@ -1319,8 +1319,8 @@ define <2 x i16> @constant_shift_v2i16(<2 x i16> %a) nounwind {
; X32-SSE-LABEL: constant_shift_v2i16:
; X32-SSE: # %bb.0:
; X32-SSE-NEXT: movdqa %xmm0, %xmm1
-; X32-SSE-NEXT: psllq {{\.LCPI.*}}, %xmm1
-; X32-SSE-NEXT: psllq {{\.LCPI.*}}, %xmm0
+; X32-SSE-NEXT: psllq $2, %xmm1
+; X32-SSE-NEXT: psllq $3, %xmm0
; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
; X32-SSE-NEXT: retl
%shift = shl <2 x i16> %a, <i16 2, i16 3>
@@ -1489,12 +1489,10 @@ define <2 x i8> @constant_shift_v2i8(<2 x i8> %a) nounwind {
;
; X32-SSE-LABEL: constant_shift_v2i8:
; X32-SSE: # %bb.0:
-; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [2,0,0,0,0,0,0,0,3,0,0,0,0,0,0,0]
-; X32-SSE-NEXT: movdqa %xmm0, %xmm2
-; X32-SSE-NEXT: psllq %xmm1, %xmm2
-; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
-; X32-SSE-NEXT: psllq %xmm1, %xmm0
-; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1]
+; X32-SSE-NEXT: movdqa %xmm0, %xmm1
+; X32-SSE-NEXT: psllq $2, %xmm1
+; X32-SSE-NEXT: psllq $3, %xmm0
+; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm1[0],xmm0[1]
; X32-SSE-NEXT: retl
%shift = shl <2 x i8> %a, <i8 2, i8 3>
ret <2 x i8> %shift
@@ -1600,8 +1598,7 @@ define <2 x i16> @splatconstant_shift_v2i16(<2 x i16> %a) nounwind {
;
; X32-SSE-LABEL: splatconstant_shift_v2i16:
; X32-SSE: # %bb.0:
-; X32-SSE-NEXT: psllq {{\.LCPI.*}}, %xmm0
-; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm0[0,1]
+; X32-SSE-NEXT: psllq $3, %xmm0
; X32-SSE-NEXT: retl
%shift = shl <2 x i16> %a, <i16 3, i16 3>
ret <2 x i16> %shift
@@ -1703,12 +1700,7 @@ define <2 x i8> @splatconstant_shift_v2i8(<2 x i8> %a) nounwind {
;
; X32-SSE-LABEL: splatconstant_shift_v2i8:
; X32-SSE: # %bb.0:
-; X32-SSE-NEXT: movdqa {{.*#+}} xmm1 = [3,0,0,0,0,0,0,0,3,0,0,0,0,0,0,0]
-; X32-SSE-NEXT: movdqa %xmm0, %xmm2
-; X32-SSE-NEXT: psllq %xmm1, %xmm2
-; X32-SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm1[2,3,0,1]
-; X32-SSE-NEXT: psllq %xmm1, %xmm0
-; X32-SSE-NEXT: movsd {{.*#+}} xmm0 = xmm2[0],xmm0[1]
+; X32-SSE-NEXT: psllq $3, %xmm0
; X32-SSE-NEXT: retl
%shift = shl <2 x i8> %a, <i8 3, i8 3>
ret <2 x i8> %shift
diff --git a/llvm/test/CodeGen/X86/vselect-avx.ll b/llvm/test/CodeGen/X86/vselect-avx.ll
index 145da66558f..39994f76883 100644
--- a/llvm/test/CodeGen/X86/vselect-avx.ll
+++ b/llvm/test/CodeGen/X86/vselect-avx.ll
@@ -18,9 +18,9 @@ target datalayout = "e-m:o-i64:64-f80:128-n8:16:32:64-S128"
define void @test(<4 x i16>* %a, <4 x i16>* %b) {
; AVX-LABEL: test:
; AVX: ## %bb.0: ## %body
-; AVX-NEXT: movq {{.*}}(%rip), %rax
+; AVX-NEXT: movabsq $4167800517033787389, %rax ## imm = 0x39D7007D007CFFFD
; AVX-NEXT: movq %rax, (%rdi)
-; AVX-NEXT: movq {{.*}}(%rip), %rax
+; AVX-NEXT: movabsq $-281474976645121, %rax ## imm = 0xFFFF00000000FFFF
; AVX-NEXT: movq %rax, (%rsi)
; AVX-NEXT: retq
body:
diff --git a/llvm/test/CodeGen/X86/widen_arith-4.ll b/llvm/test/CodeGen/X86/widen_arith-4.ll
index d97e6d4463f..f25e73ef2a0 100644
--- a/llvm/test/CodeGen/X86/widen_arith-4.ll
+++ b/llvm/test/CodeGen/X86/widen_arith-4.ll
@@ -10,7 +10,7 @@ define void @update(<5 x i16>* %dst, <5 x i16>* %src, i32 %n) nounwind {
; SSE2-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)
; SSE2-NEXT: movq %rsi, -{{[0-9]+}}(%rsp)
; SSE2-NEXT: movl %edx, -{{[0-9]+}}(%rsp)
-; SSE2-NEXT: movq {{.*}}(%rip), %rax
+; SSE2-NEXT: movabsq $4295032833, %rax # imm = 0x100010001
; SSE2-NEXT: movq %rax, -{{[0-9]+}}(%rsp)
; SSE2-NEXT: movw $0, -{{[0-9]+}}(%rsp)
; SSE2-NEXT: movl $0, -{{[0-9]+}}(%rsp)
@@ -44,7 +44,7 @@ define void @update(<5 x i16>* %dst, <5 x i16>* %src, i32 %n) nounwind {
; SSE41-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)
; SSE41-NEXT: movq %rsi, -{{[0-9]+}}(%rsp)
; SSE41-NEXT: movl %edx, -{{[0-9]+}}(%rsp)
-; SSE41-NEXT: movq {{.*}}(%rip), %rax
+; SSE41-NEXT: movabsq $4295032833, %rax # imm = 0x100010001
; SSE41-NEXT: movq %rax, -{{[0-9]+}}(%rsp)
; SSE41-NEXT: movw $0, -{{[0-9]+}}(%rsp)
; SSE41-NEXT: movl $0, -{{[0-9]+}}(%rsp)
diff --git a/llvm/test/CodeGen/X86/widen_arith-5.ll b/llvm/test/CodeGen/X86/widen_arith-5.ll
index 03239397032..6e486bb2ace 100644
--- a/llvm/test/CodeGen/X86/widen_arith-5.ll
+++ b/llvm/test/CodeGen/X86/widen_arith-5.ll
@@ -9,7 +9,7 @@ define void @update(<3 x i32>* %dst, <3 x i32>* %src, i32 %n) nounwind {
; CHECK-NEXT: movq %rdi, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movq %rsi, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movl %edx, -{{[0-9]+}}(%rsp)
-; CHECK-NEXT: movq {{.*}}(%rip), %rax
+; CHECK-NEXT: movabsq $4294967297, %rax # imm = 0x100000001
; CHECK-NEXT: movq %rax, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movl $1, -{{[0-9]+}}(%rsp)
; CHECK-NEXT: movl $0, -{{[0-9]+}}(%rsp)
diff --git a/llvm/test/CodeGen/X86/widen_cast-1.ll b/llvm/test/CodeGen/X86/widen_cast-1.ll
index 41da54cf110..63bb4725550 100644
--- a/llvm/test/CodeGen/X86/widen_cast-1.ll
+++ b/llvm/test/CodeGen/X86/widen_cast-1.ll
@@ -11,7 +11,7 @@ define void @convert(<2 x i32>* %dst, <4 x i16>* %src) nounwind {
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: pushl %eax
; CHECK-NEXT: movl $0, (%esp)
-; CHECK-NEXT: movdqa {{.*#+}} xmm0 = [1,1,1,1]
+; CHECK-NEXT: pcmpeqd %xmm0, %xmm0
; CHECK-NEXT: movdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
; CHECK-NEXT: cmpl $3, (%esp)
; CHECK-NEXT: jg .LBB0_3
@@ -22,7 +22,7 @@ define void @convert(<2 x i32>* %dst, <4 x i16>* %src) nounwind {
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
; CHECK-NEXT: movl {{[0-9]+}}(%esp), %edx
; CHECK-NEXT: pmovzxwd {{.*#+}} xmm2 = mem[0],zero,mem[1],zero,mem[2],zero,mem[3],zero
-; CHECK-NEXT: paddw %xmm0, %xmm2
+; CHECK-NEXT: psubw %xmm0, %xmm2
; CHECK-NEXT: pshufb %xmm1, %xmm2
; CHECK-NEXT: movq %xmm2, (%ecx,%eax,8)
; CHECK-NEXT: incl (%esp)
@@ -35,7 +35,7 @@ define void @convert(<2 x i32>* %dst, <4 x i16>* %src) nounwind {
; ATOM-LABEL: convert:
; ATOM: # %bb.0: # %entry
; ATOM-NEXT: pushl %eax
-; ATOM-NEXT: movdqa {{.*#+}} xmm0 = [1,1,1,1]
+; ATOM-NEXT: pcmpeqd %xmm0, %xmm0
; ATOM-NEXT: movdqa {{.*#+}} xmm1 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15]
; ATOM-NEXT: movl $0, (%esp)
; ATOM-NEXT: cmpl $3, (%esp)
@@ -48,7 +48,7 @@ define void @convert(<2 x i32>* %dst, <4 x i16>* %src) nounwind {
; ATOM-NEXT: movq {{.*#+}} xmm2 = mem[0],zero
; ATOM-NEXT: movl {{[0-9]+}}(%esp), %ecx
; ATOM-NEXT: punpcklwd {{.*#+}} xmm2 = xmm2[0],xmm0[0],xmm2[1],xmm0[1],xmm2[2],xmm0[2],xmm2[3],xmm0[3]
-; ATOM-NEXT: paddw %xmm0, %xmm2
+; ATOM-NEXT: psubw %xmm0, %xmm2
; ATOM-NEXT: pshufb %xmm1, %xmm2
; ATOM-NEXT: movq %xmm2, (%ecx,%eax,8)
; ATOM-NEXT: incl (%esp)
diff --git a/llvm/test/CodeGen/X86/widen_shuffle-1.ll b/llvm/test/CodeGen/X86/widen_shuffle-1.ll
index c0387b3878a..044d76ada74 100644
--- a/llvm/test/CodeGen/X86/widen_shuffle-1.ll
+++ b/llvm/test/CodeGen/X86/widen_shuffle-1.ll
@@ -117,7 +117,7 @@ define void @shuf5(<8 x i8>* %p) nounwind {
;
; X64-LABEL: shuf5:
; X64: # %bb.0:
-; X64-NEXT: movq {{.*}}(%rip), %rax
+; X64-NEXT: movabsq $2387225703656530209, %rax # imm = 0x2121212121212121
; X64-NEXT: movq %rax, (%rdi)
; X64-NEXT: retq
%v = shufflevector <2 x i8> <i8 4, i8 33>, <2 x i8> undef, <8 x i32> <i32 1, i32 1, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef, i32 undef>
OpenPOWER on IntegriCloud