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-rw-r--r--llvm/test/CodeGen/X86/vshift-5.ll82
1 files changed, 65 insertions, 17 deletions
diff --git a/llvm/test/CodeGen/X86/vshift-5.ll b/llvm/test/CodeGen/X86/vshift-5.ll
index a6ae8d54bef..38b391b6439 100644
--- a/llvm/test/CodeGen/X86/vshift-5.ll
+++ b/llvm/test/CodeGen/X86/vshift-5.ll
@@ -1,15 +1,29 @@
-; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-unknown -mattr=+sse2 | FileCheck %s --check-prefix=CHECK --check-prefix=X32
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=CHECK --check-prefix=X64
; When loading the shift amount from memory, avoid generating the splat.
define void @shift5a(<4 x i32> %val, <4 x i32>* %dst, i32* %pamt) nounwind {
+; X32-LABEL: shift5a:
+; X32: # BB#0: # %entry
+; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; X32-NEXT: pslld %xmm1, %xmm0
+; X32-NEXT: movdqa %xmm0, (%eax)
+; X32-NEXT: retl
+;
+; X64-LABEL: shift5a:
+; X64: # BB#0: # %entry
+; X64-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; X64-NEXT: pslld %xmm1, %xmm0
+; X64-NEXT: movdqa %xmm0, (%rdi)
+; X64-NEXT: retq
entry:
-; CHECK-LABEL: shift5a:
-; CHECK: movd
-; CHECK: pslld
- %amt = load i32, i32* %pamt
+ %amt = load i32, i32* %pamt
%tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0
- %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer
+ %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer
%shl = shl <4 x i32> %val, %shamt
store <4 x i32> %shl, <4 x i32>* %dst
ret void
@@ -17,13 +31,25 @@ entry:
define void @shift5b(<4 x i32> %val, <4 x i32>* %dst, i32* %pamt) nounwind {
+; X32-LABEL: shift5b:
+; X32: # BB#0: # %entry
+; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X32-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; X32-NEXT: psrad %xmm1, %xmm0
+; X32-NEXT: movdqa %xmm0, (%eax)
+; X32-NEXT: retl
+;
+; X64-LABEL: shift5b:
+; X64: # BB#0: # %entry
+; X64-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; X64-NEXT: psrad %xmm1, %xmm0
+; X64-NEXT: movdqa %xmm0, (%rdi)
+; X64-NEXT: retq
entry:
-; CHECK-LABEL: shift5b:
-; CHECK: movd
-; CHECK: psrad
- %amt = load i32, i32* %pamt
+ %amt = load i32, i32* %pamt
%tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0
- %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer
+ %shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer
%shr = ashr <4 x i32> %val, %shamt
store <4 x i32> %shr, <4 x i32>* %dst
ret void
@@ -31,10 +57,21 @@ entry:
define void @shift5c(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind {
+; X32-LABEL: shift5c:
+; X32: # BB#0: # %entry
+; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X32-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; X32-NEXT: pslld %xmm1, %xmm0
+; X32-NEXT: movdqa %xmm0, (%eax)
+; X32-NEXT: retl
+;
+; X64-LABEL: shift5c:
+; X64: # BB#0: # %entry
+; X64-NEXT: movd %esi, %xmm1
+; X64-NEXT: pslld %xmm1, %xmm0
+; X64-NEXT: movdqa %xmm0, (%rdi)
+; X64-NEXT: retq
entry:
-; CHECK-LABEL: shift5c:
-; CHECK: movd
-; CHECK: pslld
%tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0
%shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer
%shl = shl <4 x i32> %val, %shamt
@@ -44,10 +81,21 @@ entry:
define void @shift5d(<4 x i32> %val, <4 x i32>* %dst, i32 %amt) nounwind {
+; X32-LABEL: shift5d:
+; X32: # BB#0: # %entry
+; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X32-NEXT: movd {{.*#+}} xmm1 = mem[0],zero,zero,zero
+; X32-NEXT: psrad %xmm1, %xmm0
+; X32-NEXT: movdqa %xmm0, (%eax)
+; X32-NEXT: retl
+;
+; X64-LABEL: shift5d:
+; X64: # BB#0: # %entry
+; X64-NEXT: movd %esi, %xmm1
+; X64-NEXT: psrad %xmm1, %xmm0
+; X64-NEXT: movdqa %xmm0, (%rdi)
+; X64-NEXT: retq
entry:
-; CHECK-LABEL: shift5d:
-; CHECK: movd
-; CHECK: psrad
%tmp0 = insertelement <4 x i32> undef, i32 %amt, i32 0
%shamt = shufflevector <4 x i32> %tmp0, <4 x i32> undef, <4 x i32> zeroinitializer
%shr = ashr <4 x i32> %val, %shamt
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