diff options
Diffstat (limited to 'llvm/test/CodeGen/X86/vector-trunc.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/vector-trunc.ll | 374 |
1 files changed, 187 insertions, 187 deletions
diff --git a/llvm/test/CodeGen/X86/vector-trunc.ll b/llvm/test/CodeGen/X86/vector-trunc.ll index b5ba1ff24da..62428a558de 100644 --- a/llvm/test/CodeGen/X86/vector-trunc.ll +++ b/llvm/test/CodeGen/X86/vector-trunc.ll @@ -11,14 +11,14 @@ define <8 x i32> @trunc8i64_8i32(<8 x i64> %a) { ; SSE-LABEL: trunc8i64_8i32: -; SSE: # BB#0: # %entry +; SSE: # %bb.0: # %entry ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] ; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2] ; SSE-NEXT: movaps %xmm2, %xmm1 ; SSE-NEXT: retq ; ; AVX1-LABEL: trunc8i64_8i32: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vshufps {{.*#+}} xmm1 = xmm1[0,2],xmm2[0,2] ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 @@ -27,7 +27,7 @@ define <8 x i32> @trunc8i64_8i32(<8 x i64> %a) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: trunc8i64_8i32: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] ; AVX2-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,2,2,3] ; AVX2-NEXT: vpermilps {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] @@ -36,7 +36,7 @@ define <8 x i32> @trunc8i64_8i32(<8 x i64> %a) { ; AVX2-NEXT: retq ; ; AVX512-LABEL: trunc8i64_8i32: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpmovqd %zmm0, %ymm0 ; AVX512-NEXT: retq entry: @@ -46,7 +46,7 @@ entry: define <8 x i32> @trunc8i64_8i32_ashr(<8 x i64> %a) { ; SSE2-LABEL: trunc8i64_8i32_ashr: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,3,2,3] ; SSE2-NEXT: psrad $31, %xmm3 ; SSE2-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,3,2,3] @@ -61,7 +61,7 @@ define <8 x i32> @trunc8i64_8i32_ashr(<8 x i64> %a) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: trunc8i64_8i32_ashr: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,3,2,3] ; SSSE3-NEXT: psrad $31, %xmm3 ; SSSE3-NEXT: pshufd {{.*#+}} xmm3 = xmm3[1,3,2,3] @@ -76,7 +76,7 @@ define <8 x i32> @trunc8i64_8i32_ashr(<8 x i64> %a) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: trunc8i64_8i32_ashr: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pshufd {{.*#+}} xmm4 = xmm3[1,1,3,3] ; SSE41-NEXT: psrad $31, %xmm3 ; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm4[0,1],xmm3[2,3],xmm4[4,5],xmm3[6,7] @@ -89,7 +89,7 @@ define <8 x i32> @trunc8i64_8i32_ashr(<8 x i64> %a) { ; SSE41-NEXT: retq ; ; AVX1-LABEL: trunc8i64_8i32_ashr: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 ; AVX1-NEXT: vpsrad $31, %xmm2, %xmm3 ; AVX1-NEXT: vpshufd {{.*#+}} xmm2 = xmm2[1,1,3,3] @@ -104,7 +104,7 @@ define <8 x i32> @trunc8i64_8i32_ashr(<8 x i64> %a) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: trunc8i64_8i32_ashr: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[1,3,2,3,5,7,6,7] ; AVX2-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,2,2,3] ; AVX2-NEXT: vpermilps {{.*#+}} ymm1 = ymm1[1,3,2,3,5,7,6,7] @@ -113,7 +113,7 @@ define <8 x i32> @trunc8i64_8i32_ashr(<8 x i64> %a) { ; AVX2-NEXT: retq ; ; AVX512-LABEL: trunc8i64_8i32_ashr: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpsraq $32, %zmm0, %zmm0 ; AVX512-NEXT: vpmovqd %zmm0, %ymm0 ; AVX512-NEXT: retq @@ -125,7 +125,7 @@ entry: define <8 x i32> @trunc8i64_8i32_lshr(<8 x i64> %a) { ; SSE-LABEL: trunc8i64_8i32_lshr: -; SSE: # BB#0: # %entry +; SSE: # %bb.0: # %entry ; SSE-NEXT: psrlq $32, %xmm3 ; SSE-NEXT: psrlq $32, %xmm2 ; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2] @@ -136,7 +136,7 @@ define <8 x i32> @trunc8i64_8i32_lshr(<8 x i64> %a) { ; SSE-NEXT: retq ; ; AVX1-LABEL: trunc8i64_8i32_lshr: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 ; AVX1-NEXT: vpsrlq $32, %xmm2, %xmm2 ; AVX1-NEXT: vpsrlq $32, %xmm0, %xmm0 @@ -149,7 +149,7 @@ define <8 x i32> @trunc8i64_8i32_lshr(<8 x i64> %a) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: trunc8i64_8i32_lshr: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpsrlq $32, %ymm1, %ymm1 ; AVX2-NEXT: vpsrlq $32, %ymm0, %ymm0 ; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] @@ -160,7 +160,7 @@ define <8 x i32> @trunc8i64_8i32_lshr(<8 x i64> %a) { ; AVX2-NEXT: retq ; ; AVX512-LABEL: trunc8i64_8i32_lshr: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpsrlq $32, %zmm0, %zmm0 ; AVX512-NEXT: vpmovqd %zmm0, %ymm0 ; AVX512-NEXT: retq @@ -172,7 +172,7 @@ entry: define <8 x i16> @trunc8i64_8i16(<8 x i64> %a) { ; SSE2-LABEL: trunc8i64_8i16: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] @@ -187,7 +187,7 @@ define <8 x i16> @trunc8i64_8i16(<8 x i64> %a) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: trunc8i64_8i16: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSSE3-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] @@ -202,7 +202,7 @@ define <8 x i16> @trunc8i64_8i16(<8 x i64> %a) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: trunc8i64_8i16: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pxor %xmm4, %xmm4 ; SSE41-NEXT: pblendw {{.*#+}} xmm3 = xmm3[0],xmm4[1,2,3],xmm3[4],xmm4[5,6,7] ; SSE41-NEXT: pblendw {{.*#+}} xmm2 = xmm2[0],xmm4[1,2,3],xmm2[4],xmm4[5,6,7] @@ -214,7 +214,7 @@ define <8 x i16> @trunc8i64_8i16(<8 x i64> %a) { ; SSE41-NEXT: retq ; ; AVX1-LABEL: trunc8i64_8i16: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 ; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1,2,3],xmm2[4],xmm3[5,6,7] @@ -229,7 +229,7 @@ define <8 x i16> @trunc8i64_8i16(<8 x i64> %a) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: trunc8i64_8i16: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] ; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] ; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] @@ -242,7 +242,7 @@ define <8 x i16> @trunc8i64_8i16(<8 x i64> %a) { ; AVX2-NEXT: retq ; ; AVX512-LABEL: trunc8i64_8i16: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpmovqw %zmm0, %xmm0 ; AVX512-NEXT: vzeroupper ; AVX512-NEXT: retq @@ -253,7 +253,7 @@ entry: define void @trunc8i64_8i8(<8 x i64> %a) { ; SSE-LABEL: trunc8i64_8i8: -; SSE: # BB#0: # %entry +; SSE: # %bb.0: # %entry ; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] ; SSE-NEXT: pand %xmm4, %xmm3 ; SSE-NEXT: pand %xmm4, %xmm2 @@ -267,7 +267,7 @@ define void @trunc8i64_8i8(<8 x i64> %a) { ; SSE-NEXT: retq ; ; AVX1-LABEL: trunc8i64_8i8: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [255,0,0,0,0,0,0,0,255,0,0,0,0,0,0,0] ; AVX1-NEXT: vpand %xmm3, %xmm2, %xmm2 @@ -284,7 +284,7 @@ define void @trunc8i64_8i8(<8 x i64> %a) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: trunc8i64_8i8: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] ; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] ; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] @@ -298,7 +298,7 @@ define void @trunc8i64_8i8(<8 x i64> %a) { ; AVX2-NEXT: retq ; ; AVX512-LABEL: trunc8i64_8i8: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpmovqb %zmm0, (%rax) ; AVX512-NEXT: vzeroupper ; AVX512-NEXT: retq @@ -310,7 +310,7 @@ entry: define <8 x i16> @trunc8i32_8i16(<8 x i32> %a) { ; SSE2-LABEL: trunc8i32_8i16: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: pslld $16, %xmm1 ; SSE2-NEXT: psrad $16, %xmm1 ; SSE2-NEXT: pslld $16, %xmm0 @@ -319,7 +319,7 @@ define <8 x i16> @trunc8i32_8i16(<8 x i32> %a) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: trunc8i32_8i16: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] ; SSSE3-NEXT: pshufb %xmm2, %xmm1 ; SSSE3-NEXT: pshufb %xmm2, %xmm0 @@ -327,7 +327,7 @@ define <8 x i16> @trunc8i32_8i16(<8 x i32> %a) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: trunc8i32_8i16: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] ; SSE41-NEXT: pshufb %xmm2, %xmm1 ; SSE41-NEXT: pshufb %xmm2, %xmm0 @@ -335,7 +335,7 @@ define <8 x i16> @trunc8i32_8i16(<8 x i32> %a) { ; SSE41-NEXT: retq ; ; AVX1-LABEL: trunc8i32_8i16: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] ; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 @@ -345,7 +345,7 @@ define <8 x i16> @trunc8i32_8i16(<8 x i32> %a) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: trunc8i32_8i16: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] ; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] ; AVX2-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill> @@ -353,7 +353,7 @@ define <8 x i16> @trunc8i32_8i16(<8 x i32> %a) { ; AVX2-NEXT: retq ; ; AVX512F-LABEL: trunc8i32_8i16: -; AVX512F: # BB#0: # %entry +; AVX512F: # %bb.0: # %entry ; AVX512F-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def> ; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 ; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill> @@ -361,13 +361,13 @@ define <8 x i16> @trunc8i32_8i16(<8 x i32> %a) { ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: trunc8i32_8i16: -; AVX512VL: # BB#0: # %entry +; AVX512VL: # %bb.0: # %entry ; AVX512VL-NEXT: vpmovdw %ymm0, %xmm0 ; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: trunc8i32_8i16: -; AVX512BW: # BB#0: # %entry +; AVX512BW: # %bb.0: # %entry ; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def> ; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0 ; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill> @@ -375,7 +375,7 @@ define <8 x i16> @trunc8i32_8i16(<8 x i32> %a) { ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: trunc8i32_8i16: -; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL: # %bb.0: # %entry ; AVX512BWVL-NEXT: vpmovdw %ymm0, %xmm0 ; AVX512BWVL-NEXT: vzeroupper ; AVX512BWVL-NEXT: retq @@ -386,14 +386,14 @@ entry: define <8 x i16> @trunc8i32_8i16_ashr(<8 x i32> %a) { ; SSE-LABEL: trunc8i32_8i16_ashr: -; SSE: # BB#0: # %entry +; SSE: # %bb.0: # %entry ; SSE-NEXT: psrad $16, %xmm1 ; SSE-NEXT: psrad $16, %xmm0 ; SSE-NEXT: packssdw %xmm1, %xmm0 ; SSE-NEXT: retq ; ; AVX1-LABEL: trunc8i32_8i16_ashr: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 ; AVX1-NEXT: vpsrad $16, %xmm1, %xmm1 ; AVX1-NEXT: vpsrad $16, %xmm0, %xmm0 @@ -402,7 +402,7 @@ define <8 x i16> @trunc8i32_8i16_ashr(<8 x i32> %a) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: trunc8i32_8i16_ashr: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpsrad $16, %ymm0, %ymm0 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX2-NEXT: vpackssdw %xmm1, %xmm0, %xmm0 @@ -410,7 +410,7 @@ define <8 x i16> @trunc8i32_8i16_ashr(<8 x i32> %a) { ; AVX2-NEXT: retq ; ; AVX512F-LABEL: trunc8i32_8i16_ashr: -; AVX512F: # BB#0: # %entry +; AVX512F: # %bb.0: # %entry ; AVX512F-NEXT: vpsrad $16, %ymm0, %ymm0 ; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 ; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill> @@ -418,14 +418,14 @@ define <8 x i16> @trunc8i32_8i16_ashr(<8 x i32> %a) { ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: trunc8i32_8i16_ashr: -; AVX512VL: # BB#0: # %entry +; AVX512VL: # %bb.0: # %entry ; AVX512VL-NEXT: vpsrad $16, %ymm0, %ymm0 ; AVX512VL-NEXT: vpmovdw %ymm0, %xmm0 ; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: trunc8i32_8i16_ashr: -; AVX512BW: # BB#0: # %entry +; AVX512BW: # %bb.0: # %entry ; AVX512BW-NEXT: vpsrad $16, %ymm0, %ymm0 ; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0 ; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill> @@ -433,7 +433,7 @@ define <8 x i16> @trunc8i32_8i16_ashr(<8 x i32> %a) { ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: trunc8i32_8i16_ashr: -; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL: # %bb.0: # %entry ; AVX512BWVL-NEXT: vpsrad $16, %ymm0, %ymm0 ; AVX512BWVL-NEXT: vpmovdw %ymm0, %xmm0 ; AVX512BWVL-NEXT: vzeroupper @@ -446,7 +446,7 @@ entry: define <8 x i16> @trunc8i32_8i16_lshr(<8 x i32> %a) { ; SSE2-LABEL: trunc8i32_8i16_lshr: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: psrld $16, %xmm0 ; SSE2-NEXT: psrld $16, %xmm1 ; SSE2-NEXT: pslld $16, %xmm1 @@ -457,7 +457,7 @@ define <8 x i16> @trunc8i32_8i16_lshr(<8 x i32> %a) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: trunc8i32_8i16_lshr: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [2,3,6,7,10,11,14,15,10,11,14,15,14,15,255,255] ; SSSE3-NEXT: pshufb %xmm2, %xmm1 ; SSSE3-NEXT: pshufb %xmm2, %xmm0 @@ -465,14 +465,14 @@ define <8 x i16> @trunc8i32_8i16_lshr(<8 x i32> %a) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: trunc8i32_8i16_lshr: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: psrld $16, %xmm1 ; SSE41-NEXT: psrld $16, %xmm0 ; SSE41-NEXT: packusdw %xmm1, %xmm0 ; SSE41-NEXT: retq ; ; AVX1-LABEL: trunc8i32_8i16_lshr: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 ; AVX1-NEXT: vpsrld $16, %xmm1, %xmm1 ; AVX1-NEXT: vpsrld $16, %xmm0, %xmm0 @@ -481,7 +481,7 @@ define <8 x i16> @trunc8i32_8i16_lshr(<8 x i32> %a) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: trunc8i32_8i16_lshr: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpsrld $16, %ymm0, %ymm0 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX2-NEXT: vpackusdw %xmm1, %xmm0, %xmm0 @@ -489,7 +489,7 @@ define <8 x i16> @trunc8i32_8i16_lshr(<8 x i32> %a) { ; AVX2-NEXT: retq ; ; AVX512F-LABEL: trunc8i32_8i16_lshr: -; AVX512F: # BB#0: # %entry +; AVX512F: # %bb.0: # %entry ; AVX512F-NEXT: vpsrld $16, %ymm0, %ymm0 ; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 ; AVX512F-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill> @@ -497,14 +497,14 @@ define <8 x i16> @trunc8i32_8i16_lshr(<8 x i32> %a) { ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: trunc8i32_8i16_lshr: -; AVX512VL: # BB#0: # %entry +; AVX512VL: # %bb.0: # %entry ; AVX512VL-NEXT: vpsrld $16, %ymm0, %ymm0 ; AVX512VL-NEXT: vpmovdw %ymm0, %xmm0 ; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: trunc8i32_8i16_lshr: -; AVX512BW: # BB#0: # %entry +; AVX512BW: # %bb.0: # %entry ; AVX512BW-NEXT: vpsrld $16, %ymm0, %ymm0 ; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0 ; AVX512BW-NEXT: # kill: %xmm0<def> %xmm0<kill> %ymm0<kill> @@ -512,7 +512,7 @@ define <8 x i16> @trunc8i32_8i16_lshr(<8 x i32> %a) { ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: trunc8i32_8i16_lshr: -; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL: # %bb.0: # %entry ; AVX512BWVL-NEXT: vpsrld $16, %ymm0, %ymm0 ; AVX512BWVL-NEXT: vpmovdw %ymm0, %xmm0 ; AVX512BWVL-NEXT: vzeroupper @@ -525,7 +525,7 @@ entry: define void @trunc8i32_8i8(<8 x i32> %a) { ; SSE2-LABEL: trunc8i32_8i8: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] ; SSE2-NEXT: pand %xmm2, %xmm1 ; SSE2-NEXT: pand %xmm2, %xmm0 @@ -535,7 +535,7 @@ define void @trunc8i32_8i8(<8 x i32> %a) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: trunc8i32_8i8: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u> ; SSSE3-NEXT: pshufb %xmm2, %xmm1 ; SSSE3-NEXT: pshufb %xmm2, %xmm0 @@ -544,7 +544,7 @@ define void @trunc8i32_8i8(<8 x i32> %a) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: trunc8i32_8i8: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: movdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u> ; SSE41-NEXT: pshufb %xmm2, %xmm1 ; SSE41-NEXT: pshufb %xmm2, %xmm0 @@ -553,7 +553,7 @@ define void @trunc8i32_8i8(<8 x i32> %a) { ; SSE41-NEXT: retq ; ; AVX1-LABEL: trunc8i32_8i8: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,4,8,12,u,u,u,u,u,u,u,u,u,u,u,u> ; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 @@ -564,7 +564,7 @@ define void @trunc8i32_8i8(<8 x i32> %a) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: trunc8i32_8i8: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpshufb {{.*#+}} ymm0 = ymm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] ; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] ; AVX2-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] @@ -573,7 +573,7 @@ define void @trunc8i32_8i8(<8 x i32> %a) { ; AVX2-NEXT: retq ; ; AVX512F-LABEL: trunc8i32_8i8: -; AVX512F: # BB#0: # %entry +; AVX512F: # %bb.0: # %entry ; AVX512F-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def> ; AVX512F-NEXT: vpmovdw %zmm0, %ymm0 ; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] @@ -582,13 +582,13 @@ define void @trunc8i32_8i8(<8 x i32> %a) { ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: trunc8i32_8i8: -; AVX512VL: # BB#0: # %entry +; AVX512VL: # %bb.0: # %entry ; AVX512VL-NEXT: vpmovdb %ymm0, (%rax) ; AVX512VL-NEXT: vzeroupper ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: trunc8i32_8i8: -; AVX512BW: # BB#0: # %entry +; AVX512BW: # %bb.0: # %entry ; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def> ; AVX512BW-NEXT: vpmovdw %zmm0, %ymm0 ; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] @@ -597,7 +597,7 @@ define void @trunc8i32_8i8(<8 x i32> %a) { ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: trunc8i32_8i8: -; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL: # %bb.0: # %entry ; AVX512BWVL-NEXT: vpmovdb %ymm0, (%rax) ; AVX512BWVL-NEXT: vzeroupper ; AVX512BWVL-NEXT: retq @@ -609,7 +609,7 @@ entry: define void @trunc16i32_16i16(<16 x i32> %a) { ; SSE2-LABEL: trunc16i32_16i16: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: pslld $16, %xmm1 ; SSE2-NEXT: psrad $16, %xmm1 ; SSE2-NEXT: pslld $16, %xmm0 @@ -625,7 +625,7 @@ define void @trunc16i32_16i16(<16 x i32> %a) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: trunc16i32_16i16: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: pslld $16, %xmm1 ; SSSE3-NEXT: psrad $16, %xmm1 ; SSSE3-NEXT: pslld $16, %xmm0 @@ -641,7 +641,7 @@ define void @trunc16i32_16i16(<16 x i32> %a) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: trunc16i32_16i16: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pxor %xmm4, %xmm4 ; SSE41-NEXT: pblendw {{.*#+}} xmm1 = xmm1[0],xmm4[1],xmm1[2],xmm4[3],xmm1[4],xmm4[5],xmm1[6],xmm4[7] ; SSE41-NEXT: pblendw {{.*#+}} xmm0 = xmm0[0],xmm4[1],xmm0[2],xmm4[3],xmm0[4],xmm4[5],xmm0[6],xmm4[7] @@ -654,7 +654,7 @@ define void @trunc16i32_16i16(<16 x i32> %a) { ; SSE41-NEXT: retq ; ; AVX1-LABEL: trunc16i32_16i16: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vpxor %xmm3, %xmm3, %xmm3 ; AVX1-NEXT: vpblendw {{.*#+}} xmm2 = xmm2[0],xmm3[1],xmm2[2],xmm3[3],xmm2[4],xmm3[5],xmm2[6],xmm3[7] @@ -670,7 +670,7 @@ define void @trunc16i32_16i16(<16 x i32> %a) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: trunc16i32_16i16: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] ; AVX2-NEXT: vpshufb %ymm2, %ymm0, %ymm0 ; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] @@ -682,7 +682,7 @@ define void @trunc16i32_16i16(<16 x i32> %a) { ; AVX2-NEXT: retq ; ; AVX512-LABEL: trunc16i32_16i16: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpmovdw %zmm0, (%rax) ; AVX512-NEXT: vzeroupper ; AVX512-NEXT: retq @@ -694,7 +694,7 @@ entry: define void @trunc16i32_16i16_ashr(<16 x i32> %a) { ; SSE-LABEL: trunc16i32_16i16_ashr: -; SSE: # BB#0: # %entry +; SSE: # %bb.0: # %entry ; SSE-NEXT: psrad $16, %xmm3 ; SSE-NEXT: psrad $16, %xmm2 ; SSE-NEXT: packssdw %xmm3, %xmm2 @@ -706,7 +706,7 @@ define void @trunc16i32_16i16_ashr(<16 x i32> %a) { ; SSE-NEXT: retq ; ; AVX1-LABEL: trunc16i32_16i16_ashr: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 ; AVX1-NEXT: vpsrad $16, %xmm2, %xmm2 ; AVX1-NEXT: vpsrad $16, %xmm0, %xmm0 @@ -721,7 +721,7 @@ define void @trunc16i32_16i16_ashr(<16 x i32> %a) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: trunc16i32_16i16_ashr: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpsrad $16, %ymm1, %ymm1 ; AVX2-NEXT: vpsrad $16, %ymm0, %ymm0 ; AVX2-NEXT: vpackssdw %ymm1, %ymm0, %ymm0 @@ -731,7 +731,7 @@ define void @trunc16i32_16i16_ashr(<16 x i32> %a) { ; AVX2-NEXT: retq ; ; AVX512-LABEL: trunc16i32_16i16_ashr: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpsrld $16, %zmm0, %zmm0 ; AVX512-NEXT: vpmovdw %zmm0, (%rax) ; AVX512-NEXT: vzeroupper @@ -745,7 +745,7 @@ entry: define void @trunc16i32_16i16_lshr(<16 x i32> %a) { ; SSE2-LABEL: trunc16i32_16i16_lshr: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: psrld $16, %xmm2 ; SSE2-NEXT: psrld $16, %xmm3 ; SSE2-NEXT: psrld $16, %xmm0 @@ -765,7 +765,7 @@ define void @trunc16i32_16i16_lshr(<16 x i32> %a) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: trunc16i32_16i16_lshr: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: psrld $16, %xmm2 ; SSSE3-NEXT: psrld $16, %xmm3 ; SSSE3-NEXT: psrld $16, %xmm0 @@ -785,7 +785,7 @@ define void @trunc16i32_16i16_lshr(<16 x i32> %a) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: trunc16i32_16i16_lshr: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: psrld $16, %xmm3 ; SSE41-NEXT: psrld $16, %xmm2 ; SSE41-NEXT: packusdw %xmm3, %xmm2 @@ -797,7 +797,7 @@ define void @trunc16i32_16i16_lshr(<16 x i32> %a) { ; SSE41-NEXT: retq ; ; AVX1-LABEL: trunc16i32_16i16_lshr: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 ; AVX1-NEXT: vpsrld $16, %xmm2, %xmm2 ; AVX1-NEXT: vpsrld $16, %xmm0, %xmm0 @@ -812,7 +812,7 @@ define void @trunc16i32_16i16_lshr(<16 x i32> %a) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: trunc16i32_16i16_lshr: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpsrld $16, %ymm1, %ymm1 ; AVX2-NEXT: vpsrld $16, %ymm0, %ymm0 ; AVX2-NEXT: vpackusdw %ymm1, %ymm0, %ymm0 @@ -822,7 +822,7 @@ define void @trunc16i32_16i16_lshr(<16 x i32> %a) { ; AVX2-NEXT: retq ; ; AVX512-LABEL: trunc16i32_16i16_lshr: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpsrld $16, %zmm0, %zmm0 ; AVX512-NEXT: vpmovdw %zmm0, (%rax) ; AVX512-NEXT: vzeroupper @@ -836,7 +836,7 @@ entry: define void @trunc16i32_16i8(<16 x i32> %a) { ; SSE-LABEL: trunc16i32_16i8: -; SSE: # BB#0: # %entry +; SSE: # %bb.0: # %entry ; SSE-NEXT: movdqa {{.*#+}} xmm4 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] ; SSE-NEXT: pand %xmm4, %xmm3 ; SSE-NEXT: pand %xmm4, %xmm2 @@ -849,7 +849,7 @@ define void @trunc16i32_16i8(<16 x i32> %a) { ; SSE-NEXT: retq ; ; AVX1-LABEL: trunc16i32_16i8: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = [255,0,0,0,255,0,0,0,255,0,0,0,255,0,0,0] ; AVX1-NEXT: vpand %xmm3, %xmm2, %xmm2 @@ -865,7 +865,7 @@ define void @trunc16i32_16i8(<16 x i32> %a) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: trunc16i32_16i8: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vmovdqa {{.*#+}} ymm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15,16,17,20,21,24,25,28,29,24,25,28,29,28,29,30,31] ; AVX2-NEXT: vpshufb %ymm2, %ymm1, %ymm1 ; AVX2-NEXT: vpermq {{.*#+}} ymm1 = ymm1[0,2,2,3] @@ -880,7 +880,7 @@ define void @trunc16i32_16i8(<16 x i32> %a) { ; AVX2-NEXT: retq ; ; AVX512-LABEL: trunc16i32_16i8: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpmovdb %zmm0, (%rax) ; AVX512-NEXT: vzeroupper ; AVX512-NEXT: retq @@ -892,7 +892,7 @@ entry: define void @trunc16i32_16i8_ashr(<16 x i32> %a) { ; SSE-LABEL: trunc16i32_16i8_ashr: -; SSE: # BB#0: # %entry +; SSE: # %bb.0: # %entry ; SSE-NEXT: psrad $24, %xmm1 ; SSE-NEXT: psrad $24, %xmm0 ; SSE-NEXT: packssdw %xmm1, %xmm0 @@ -904,7 +904,7 @@ define void @trunc16i32_16i8_ashr(<16 x i32> %a) { ; SSE-NEXT: retq ; ; AVX1-LABEL: trunc16i32_16i8_ashr: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 ; AVX1-NEXT: vpsrad $24, %xmm2, %xmm2 ; AVX1-NEXT: vpsrad $24, %xmm0, %xmm0 @@ -919,7 +919,7 @@ define void @trunc16i32_16i8_ashr(<16 x i32> %a) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: trunc16i32_16i8_ashr: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpsrad $24, %ymm1, %ymm1 ; AVX2-NEXT: vpsrad $24, %ymm0, %ymm0 ; AVX2-NEXT: vpacksswb %ymm1, %ymm0, %ymm0 @@ -931,7 +931,7 @@ define void @trunc16i32_16i8_ashr(<16 x i32> %a) { ; AVX2-NEXT: retq ; ; AVX512-LABEL: trunc16i32_16i8_ashr: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpsrld $24, %zmm0, %zmm0 ; AVX512-NEXT: vpmovdb %zmm0, (%rax) ; AVX512-NEXT: vzeroupper @@ -945,7 +945,7 @@ entry: define void @trunc16i32_16i8_lshr(<16 x i32> %a) { ; SSE2-LABEL: trunc16i32_16i8_lshr: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: psrld $24, %xmm1 ; SSE2-NEXT: psrld $24, %xmm0 ; SSE2-NEXT: packuswb %xmm1, %xmm0 @@ -957,7 +957,7 @@ define void @trunc16i32_16i8_lshr(<16 x i32> %a) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: trunc16i32_16i8_lshr: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: psrld $24, %xmm1 ; SSSE3-NEXT: psrld $24, %xmm0 ; SSSE3-NEXT: packuswb %xmm1, %xmm0 @@ -969,7 +969,7 @@ define void @trunc16i32_16i8_lshr(<16 x i32> %a) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: trunc16i32_16i8_lshr: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: psrld $24, %xmm1 ; SSE41-NEXT: psrld $24, %xmm0 ; SSE41-NEXT: packssdw %xmm1, %xmm0 @@ -981,7 +981,7 @@ define void @trunc16i32_16i8_lshr(<16 x i32> %a) { ; SSE41-NEXT: retq ; ; AVX1-LABEL: trunc16i32_16i8_lshr: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 ; AVX1-NEXT: vpsrld $24, %xmm2, %xmm2 ; AVX1-NEXT: vpsrld $24, %xmm0, %xmm0 @@ -996,7 +996,7 @@ define void @trunc16i32_16i8_lshr(<16 x i32> %a) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: trunc16i32_16i8_lshr: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpsrld $24, %ymm1, %ymm1 ; AVX2-NEXT: vpsrld $24, %ymm0, %ymm0 ; AVX2-NEXT: vpackuswb %ymm1, %ymm0, %ymm0 @@ -1008,7 +1008,7 @@ define void @trunc16i32_16i8_lshr(<16 x i32> %a) { ; AVX2-NEXT: retq ; ; AVX512-LABEL: trunc16i32_16i8_lshr: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vpsrld $24, %zmm0, %zmm0 ; AVX512-NEXT: vpmovdb %zmm0, (%rax) ; AVX512-NEXT: vzeroupper @@ -1023,7 +1023,7 @@ entry: ;PR25684 define void @trunc16i16_16i8(<16 x i16> %a) { ; SSE2-LABEL: trunc16i16_16i8: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] ; SSE2-NEXT: pand %xmm2, %xmm1 ; SSE2-NEXT: pand %xmm2, %xmm0 @@ -1032,7 +1032,7 @@ define void @trunc16i16_16i8(<16 x i16> %a) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: trunc16i16_16i8: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> ; SSSE3-NEXT: pshufb %xmm2, %xmm1 ; SSSE3-NEXT: pshufb %xmm2, %xmm0 @@ -1041,7 +1041,7 @@ define void @trunc16i16_16i8(<16 x i16> %a) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: trunc16i16_16i8: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: movdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> ; SSE41-NEXT: pshufb %xmm2, %xmm1 ; SSE41-NEXT: pshufb %xmm2, %xmm0 @@ -1050,7 +1050,7 @@ define void @trunc16i16_16i8(<16 x i16> %a) { ; SSE41-NEXT: retq ; ; AVX1-LABEL: trunc16i16_16i8: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> ; AVX1-NEXT: vpshufb %xmm2, %xmm1, %xmm1 @@ -1061,7 +1061,7 @@ define void @trunc16i16_16i8(<16 x i16> %a) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: trunc16i16_16i8: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX2-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> ; AVX2-NEXT: vpshufb %xmm2, %xmm1, %xmm1 @@ -1072,7 +1072,7 @@ define void @trunc16i16_16i8(<16 x i16> %a) { ; AVX2-NEXT: retq ; ; AVX512F-LABEL: trunc16i16_16i8: -; AVX512F: # BB#0: # %entry +; AVX512F: # %bb.0: # %entry ; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 ; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 ; AVX512F-NEXT: vmovdqu %xmm0, (%rax) @@ -1080,7 +1080,7 @@ define void @trunc16i16_16i8(<16 x i16> %a) { ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: trunc16i16_16i8: -; AVX512VL: # BB#0: # %entry +; AVX512VL: # %bb.0: # %entry ; AVX512VL-NEXT: vpmovsxwd %ymm0, %zmm0 ; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0 ; AVX512VL-NEXT: vmovdqu %xmm0, (%rax) @@ -1088,7 +1088,7 @@ define void @trunc16i16_16i8(<16 x i16> %a) { ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: trunc16i16_16i8: -; AVX512BW: # BB#0: # %entry +; AVX512BW: # %bb.0: # %entry ; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def> ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 ; AVX512BW-NEXT: vmovdqu %xmm0, (%rax) @@ -1096,7 +1096,7 @@ define void @trunc16i16_16i8(<16 x i16> %a) { ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: trunc16i16_16i8: -; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL: # %bb.0: # %entry ; AVX512BWVL-NEXT: vpmovwb %ymm0, (%rax) ; AVX512BWVL-NEXT: vzeroupper ; AVX512BWVL-NEXT: retq @@ -1108,7 +1108,7 @@ entry: define void @trunc16i16_16i8_ashr(<16 x i16> %a) { ; SSE-LABEL: trunc16i16_16i8_ashr: -; SSE: # BB#0: # %entry +; SSE: # %bb.0: # %entry ; SSE-NEXT: psraw $8, %xmm1 ; SSE-NEXT: psraw $8, %xmm0 ; SSE-NEXT: packsswb %xmm1, %xmm0 @@ -1116,7 +1116,7 @@ define void @trunc16i16_16i8_ashr(<16 x i16> %a) { ; SSE-NEXT: retq ; ; AVX1-LABEL: trunc16i16_16i8_ashr: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 ; AVX1-NEXT: vpsraw $8, %xmm1, %xmm1 ; AVX1-NEXT: vpsraw $8, %xmm0, %xmm0 @@ -1126,7 +1126,7 @@ define void @trunc16i16_16i8_ashr(<16 x i16> %a) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: trunc16i16_16i8_ashr: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpsraw $8, %ymm0, %ymm0 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX2-NEXT: vpacksswb %xmm1, %xmm0, %xmm0 @@ -1135,7 +1135,7 @@ define void @trunc16i16_16i8_ashr(<16 x i16> %a) { ; AVX2-NEXT: retq ; ; AVX512F-LABEL: trunc16i16_16i8_ashr: -; AVX512F: # BB#0: # %entry +; AVX512F: # %bb.0: # %entry ; AVX512F-NEXT: vpsraw $8, %ymm0, %ymm0 ; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 ; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 @@ -1144,7 +1144,7 @@ define void @trunc16i16_16i8_ashr(<16 x i16> %a) { ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: trunc16i16_16i8_ashr: -; AVX512VL: # BB#0: # %entry +; AVX512VL: # %bb.0: # %entry ; AVX512VL-NEXT: vpsraw $8, %ymm0, %ymm0 ; AVX512VL-NEXT: vpmovsxwd %ymm0, %zmm0 ; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0 @@ -1153,7 +1153,7 @@ define void @trunc16i16_16i8_ashr(<16 x i16> %a) { ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: trunc16i16_16i8_ashr: -; AVX512BW: # BB#0: # %entry +; AVX512BW: # %bb.0: # %entry ; AVX512BW-NEXT: vpsraw $8, %ymm0, %ymm0 ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 ; AVX512BW-NEXT: vmovdqu %xmm0, (%rax) @@ -1161,7 +1161,7 @@ define void @trunc16i16_16i8_ashr(<16 x i16> %a) { ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: trunc16i16_16i8_ashr: -; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL: # %bb.0: # %entry ; AVX512BWVL-NEXT: vpsrlw $8, %ymm0, %ymm0 ; AVX512BWVL-NEXT: vpmovwb %ymm0, (%rax) ; AVX512BWVL-NEXT: vzeroupper @@ -1175,7 +1175,7 @@ entry: define void @trunc16i16_16i8_lshr(<16 x i16> %a) { ; SSE-LABEL: trunc16i16_16i8_lshr: -; SSE: # BB#0: # %entry +; SSE: # %bb.0: # %entry ; SSE-NEXT: psrlw $8, %xmm1 ; SSE-NEXT: psrlw $8, %xmm0 ; SSE-NEXT: packuswb %xmm1, %xmm0 @@ -1183,7 +1183,7 @@ define void @trunc16i16_16i8_lshr(<16 x i16> %a) { ; SSE-NEXT: retq ; ; AVX1-LABEL: trunc16i16_16i8_lshr: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm1 ; AVX1-NEXT: vpsrlw $8, %xmm1, %xmm1 ; AVX1-NEXT: vpsrlw $8, %xmm0, %xmm0 @@ -1193,7 +1193,7 @@ define void @trunc16i16_16i8_lshr(<16 x i16> %a) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: trunc16i16_16i8_lshr: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpsrlw $8, %ymm0, %ymm0 ; AVX2-NEXT: vextracti128 $1, %ymm0, %xmm1 ; AVX2-NEXT: vpackuswb %xmm1, %xmm0, %xmm0 @@ -1202,7 +1202,7 @@ define void @trunc16i16_16i8_lshr(<16 x i16> %a) { ; AVX2-NEXT: retq ; ; AVX512F-LABEL: trunc16i16_16i8_lshr: -; AVX512F: # BB#0: # %entry +; AVX512F: # %bb.0: # %entry ; AVX512F-NEXT: vpsrlw $8, %ymm0, %ymm0 ; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 ; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 @@ -1211,7 +1211,7 @@ define void @trunc16i16_16i8_lshr(<16 x i16> %a) { ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: trunc16i16_16i8_lshr: -; AVX512VL: # BB#0: # %entry +; AVX512VL: # %bb.0: # %entry ; AVX512VL-NEXT: vpsrlw $8, %ymm0, %ymm0 ; AVX512VL-NEXT: vpmovsxwd %ymm0, %zmm0 ; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0 @@ -1220,7 +1220,7 @@ define void @trunc16i16_16i8_lshr(<16 x i16> %a) { ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: trunc16i16_16i8_lshr: -; AVX512BW: # BB#0: # %entry +; AVX512BW: # %bb.0: # %entry ; AVX512BW-NEXT: vpsrlw $8, %ymm0, %ymm0 ; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0 ; AVX512BW-NEXT: vmovdqu %xmm0, (%rax) @@ -1228,7 +1228,7 @@ define void @trunc16i16_16i8_lshr(<16 x i16> %a) { ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: trunc16i16_16i8_lshr: -; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL: # %bb.0: # %entry ; AVX512BWVL-NEXT: vpsrlw $8, %ymm0, %ymm0 ; AVX512BWVL-NEXT: vpmovwb %ymm0, (%rax) ; AVX512BWVL-NEXT: vzeroupper @@ -1242,7 +1242,7 @@ entry: define void @trunc32i16_32i8(<32 x i16> %a) { ; SSE2-LABEL: trunc32i16_32i8: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [255,255,255,255,255,255,255,255] ; SSE2-NEXT: pand %xmm4, %xmm1 ; SSE2-NEXT: pand %xmm4, %xmm0 @@ -1255,7 +1255,7 @@ define void @trunc32i16_32i8(<32 x i16> %a) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: trunc32i16_32i8: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> ; SSSE3-NEXT: pshufb %xmm4, %xmm1 ; SSSE3-NEXT: pshufb %xmm4, %xmm0 @@ -1268,7 +1268,7 @@ define void @trunc32i16_32i8(<32 x i16> %a) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: trunc32i16_32i8: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: movdqa {{.*#+}} xmm4 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> ; SSE41-NEXT: pshufb %xmm4, %xmm1 ; SSE41-NEXT: pshufb %xmm4, %xmm0 @@ -1281,7 +1281,7 @@ define void @trunc32i16_32i8(<32 x i16> %a) { ; SSE41-NEXT: retq ; ; AVX1-LABEL: trunc32i16_32i8: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> ; AVX1-NEXT: vpshufb %xmm3, %xmm2, %xmm2 @@ -1297,7 +1297,7 @@ define void @trunc32i16_32i8(<32 x i16> %a) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: trunc32i16_32i8: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vextracti128 $1, %ymm1, %xmm2 ; AVX2-NEXT: vmovdqa {{.*#+}} xmm3 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> ; AVX2-NEXT: vpshufb %xmm3, %xmm2, %xmm2 @@ -1313,7 +1313,7 @@ define void @trunc32i16_32i8(<32 x i16> %a) { ; AVX2-NEXT: retq ; ; AVX512F-LABEL: trunc32i16_32i8: -; AVX512F: # BB#0: # %entry +; AVX512F: # %bb.0: # %entry ; AVX512F-NEXT: vpmovsxwd %ymm0, %zmm0 ; AVX512F-NEXT: vpmovdb %zmm0, %xmm0 ; AVX512F-NEXT: vpmovsxwd %ymm1, %zmm1 @@ -1324,7 +1324,7 @@ define void @trunc32i16_32i8(<32 x i16> %a) { ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: trunc32i16_32i8: -; AVX512VL: # BB#0: # %entry +; AVX512VL: # %bb.0: # %entry ; AVX512VL-NEXT: vpmovsxwd %ymm0, %zmm0 ; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0 ; AVX512VL-NEXT: vpmovsxwd %ymm1, %zmm1 @@ -1335,13 +1335,13 @@ define void @trunc32i16_32i8(<32 x i16> %a) { ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: trunc32i16_32i8: -; AVX512BW: # BB#0: # %entry +; AVX512BW: # %bb.0: # %entry ; AVX512BW-NEXT: vpmovwb %zmm0, (%rax) ; AVX512BW-NEXT: vzeroupper ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: trunc32i16_32i8: -; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL: # %bb.0: # %entry ; AVX512BWVL-NEXT: vpmovwb %zmm0, (%rax) ; AVX512BWVL-NEXT: vzeroupper ; AVX512BWVL-NEXT: retq @@ -1353,14 +1353,14 @@ entry: define <8 x i32> @trunc2x4i64_8i32(<4 x i64> %a, <4 x i64> %b) { ; SSE-LABEL: trunc2x4i64_8i32: -; SSE: # BB#0: # %entry +; SSE: # %bb.0: # %entry ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] ; SSE-NEXT: shufps {{.*#+}} xmm2 = xmm2[0,2],xmm3[0,2] ; SSE-NEXT: movaps %xmm2, %xmm1 ; SSE-NEXT: retq ; ; AVX1-LABEL: trunc2x4i64_8i32: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 ; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm2[0,2] ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 @@ -1369,7 +1369,7 @@ define <8 x i32> @trunc2x4i64_8i32(<4 x i64> %a, <4 x i64> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: trunc2x4i64_8i32: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] ; AVX2-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,2,2,3] ; AVX2-NEXT: vpermilps {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] @@ -1378,7 +1378,7 @@ define <8 x i32> @trunc2x4i64_8i32(<4 x i64> %a, <4 x i64> %b) { ; AVX2-NEXT: retq ; ; AVX512F-LABEL: trunc2x4i64_8i32: -; AVX512F: # BB#0: # %entry +; AVX512F: # %bb.0: # %entry ; AVX512F-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def> ; AVX512F-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def> ; AVX512F-NEXT: vpmovqd %zmm0, %ymm0 @@ -1387,14 +1387,14 @@ define <8 x i32> @trunc2x4i64_8i32(<4 x i64> %a, <4 x i64> %b) { ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: trunc2x4i64_8i32: -; AVX512VL: # BB#0: # %entry +; AVX512VL: # %bb.0: # %entry ; AVX512VL-NEXT: vpmovqd %ymm0, %xmm0 ; AVX512VL-NEXT: vpmovqd %ymm1, %xmm1 ; AVX512VL-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: trunc2x4i64_8i32: -; AVX512BW: # BB#0: # %entry +; AVX512BW: # %bb.0: # %entry ; AVX512BW-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def> ; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def> ; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0 @@ -1403,7 +1403,7 @@ define <8 x i32> @trunc2x4i64_8i32(<4 x i64> %a, <4 x i64> %b) { ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: trunc2x4i64_8i32: -; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL: # %bb.0: # %entry ; AVX512BWVL-NEXT: vpmovqd %ymm0, %xmm0 ; AVX512BWVL-NEXT: vpmovqd %ymm1, %xmm1 ; AVX512BWVL-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0 @@ -1417,7 +1417,7 @@ entry: define <8 x i16> @trunc2x4i64_8i16(<4 x i64> %a, <4 x i64> %b) { ; SSE2-LABEL: trunc2x4i64_8i16: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] @@ -1432,7 +1432,7 @@ define <8 x i16> @trunc2x4i64_8i16(<4 x i64> %a, <4 x i64> %b) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: trunc2x4i64_8i16: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] ; SSSE3-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSSE3-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] @@ -1447,7 +1447,7 @@ define <8 x i16> @trunc2x4i64_8i16(<4 x i64> %a, <4 x i64> %b) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: trunc2x4i64_8i16: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pshufd {{.*#+}} xmm3 = xmm3[0,2,2,3] ; SSE41-NEXT: pshuflw {{.*#+}} xmm3 = xmm3[0,1,0,2,4,5,6,7] ; SSE41-NEXT: pshufd {{.*#+}} xmm2 = xmm2[0,2,2,3] @@ -1462,7 +1462,7 @@ define <8 x i16> @trunc2x4i64_8i16(<4 x i64> %a, <4 x i64> %b) { ; SSE41-NEXT: retq ; ; AVX1-LABEL: trunc2x4i64_8i16: -; AVX1: # BB#0: # %entry +; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 ; AVX1-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm2[0,2] ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 @@ -1475,7 +1475,7 @@ define <8 x i16> @trunc2x4i64_8i16(<4 x i64> %a, <4 x i64> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: trunc2x4i64_8i16: -; AVX2: # BB#0: # %entry +; AVX2: # %bb.0: # %entry ; AVX2-NEXT: vpshufd {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7] ; AVX2-NEXT: vpermq {{.*#+}} ymm0 = ymm0[0,2,2,3] ; AVX2-NEXT: vpshufd {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7] @@ -1488,7 +1488,7 @@ define <8 x i16> @trunc2x4i64_8i16(<4 x i64> %a, <4 x i64> %b) { ; AVX2-NEXT: retq ; ; AVX512F-LABEL: trunc2x4i64_8i16: -; AVX512F: # BB#0: # %entry +; AVX512F: # %bb.0: # %entry ; AVX512F-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def> ; AVX512F-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def> ; AVX512F-NEXT: vpmovqd %zmm0, %ymm0 @@ -1501,7 +1501,7 @@ define <8 x i16> @trunc2x4i64_8i16(<4 x i64> %a, <4 x i64> %b) { ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: trunc2x4i64_8i16: -; AVX512VL: # BB#0: # %entry +; AVX512VL: # %bb.0: # %entry ; AVX512VL-NEXT: vpmovqd %ymm0, %xmm0 ; AVX512VL-NEXT: vpmovqd %ymm1, %xmm1 ; AVX512VL-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] @@ -1515,7 +1515,7 @@ define <8 x i16> @trunc2x4i64_8i16(<4 x i64> %a, <4 x i64> %b) { ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: trunc2x4i64_8i16: -; AVX512BW: # BB#0: # %entry +; AVX512BW: # %bb.0: # %entry ; AVX512BW-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def> ; AVX512BW-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def> ; AVX512BW-NEXT: vpmovqd %zmm0, %ymm0 @@ -1528,7 +1528,7 @@ define <8 x i16> @trunc2x4i64_8i16(<4 x i64> %a, <4 x i64> %b) { ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: trunc2x4i64_8i16: -; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL: # %bb.0: # %entry ; AVX512BWVL-NEXT: vpmovqd %ymm0, %xmm0 ; AVX512BWVL-NEXT: vpmovqd %ymm1, %xmm1 ; AVX512BWVL-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] @@ -1549,17 +1549,17 @@ entry: define <4 x i32> @trunc2x2i64_4i32(<2 x i64> %a, <2 x i64> %b) { ; SSE-LABEL: trunc2x2i64_4i32: -; SSE: # BB#0: # %entry +; SSE: # %bb.0: # %entry ; SSE-NEXT: shufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] ; SSE-NEXT: retq ; ; AVX-LABEL: trunc2x2i64_4i32: -; AVX: # BB#0: # %entry +; AVX: # %bb.0: # %entry ; AVX-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] ; AVX-NEXT: retq ; ; AVX512-LABEL: trunc2x2i64_4i32: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vshufps {{.*#+}} xmm0 = xmm0[0,2],xmm1[0,2] ; AVX512-NEXT: retq entry: @@ -1571,37 +1571,37 @@ entry: define i64 @trunc2i64_i64(<2 x i64> %inval) { ; SSE-LABEL: trunc2i64_i64: -; SSE: # BB#0: # %entry +; SSE: # %bb.0: # %entry ; SSE-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; SSE-NEXT: movq %xmm0, %rax ; SSE-NEXT: retq ; ; AVX-LABEL: trunc2i64_i64: -; AVX: # BB#0: # %entry +; AVX: # %bb.0: # %entry ; AVX-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; AVX-NEXT: vmovq %xmm0, %rax ; AVX-NEXT: retq ; ; AVX512F-LABEL: trunc2i64_i64: -; AVX512F: # BB#0: # %entry +; AVX512F: # %bb.0: # %entry ; AVX512F-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; AVX512F-NEXT: vmovq %xmm0, %rax ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: trunc2i64_i64: -; AVX512VL: # BB#0: # %entry +; AVX512VL: # %bb.0: # %entry ; AVX512VL-NEXT: vpmovqd %xmm0, -{{[0-9]+}}(%rsp) ; AVX512VL-NEXT: movq -{{[0-9]+}}(%rsp), %rax ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: trunc2i64_i64: -; AVX512BW: # BB#0: # %entry +; AVX512BW: # %bb.0: # %entry ; AVX512BW-NEXT: vpshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] ; AVX512BW-NEXT: vmovq %xmm0, %rax ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: trunc2i64_i64: -; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL: # %bb.0: # %entry ; AVX512BWVL-NEXT: vpmovqd %xmm0, -{{[0-9]+}}(%rsp) ; AVX512BWVL-NEXT: movq -{{[0-9]+}}(%rsp), %rax ; AVX512BWVL-NEXT: retq @@ -1613,7 +1613,7 @@ entry: define <8 x i16> @trunc2x4i32_8i16(<4 x i32> %a, <4 x i32> %b) { ; SSE2-LABEL: trunc2x4i32_8i16: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: pshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; SSE2-NEXT: pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7] ; SSE2-NEXT: pshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] @@ -1624,7 +1624,7 @@ define <8 x i16> @trunc2x4i32_8i16(<4 x i32> %a, <4 x i32> %b) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: trunc2x4i32_8i16: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] ; SSSE3-NEXT: pshufb %xmm2, %xmm1 ; SSSE3-NEXT: pshufb %xmm2, %xmm0 @@ -1632,7 +1632,7 @@ define <8 x i16> @trunc2x4i32_8i16(<4 x i32> %a, <4 x i32> %b) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: trunc2x4i32_8i16: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: movdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] ; SSE41-NEXT: pshufb %xmm2, %xmm1 ; SSE41-NEXT: pshufb %xmm2, %xmm0 @@ -1640,7 +1640,7 @@ define <8 x i16> @trunc2x4i32_8i16(<4 x i32> %a, <4 x i32> %b) { ; SSE41-NEXT: retq ; ; AVX-LABEL: trunc2x4i32_8i16: -; AVX: # BB#0: # %entry +; AVX: # %bb.0: # %entry ; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] ; AVX-NEXT: vpshufb %xmm2, %xmm1, %xmm1 ; AVX-NEXT: vpshufb %xmm2, %xmm0, %xmm0 @@ -1648,7 +1648,7 @@ define <8 x i16> @trunc2x4i32_8i16(<4 x i32> %a, <4 x i32> %b) { ; AVX-NEXT: retq ; ; AVX512F-LABEL: trunc2x4i32_8i16: -; AVX512F: # BB#0: # %entry +; AVX512F: # %bb.0: # %entry ; AVX512F-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] ; AVX512F-NEXT: vpshufb %xmm2, %xmm1, %xmm1 ; AVX512F-NEXT: vpshufb %xmm2, %xmm0, %xmm0 @@ -1656,7 +1656,7 @@ define <8 x i16> @trunc2x4i32_8i16(<4 x i32> %a, <4 x i32> %b) { ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: trunc2x4i32_8i16: -; AVX512VL: # BB#0: # %entry +; AVX512VL: # %bb.0: # %entry ; AVX512VL-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; AVX512VL-NEXT: vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7] ; AVX512VL-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] @@ -1667,7 +1667,7 @@ define <8 x i16> @trunc2x4i32_8i16(<4 x i32> %a, <4 x i32> %b) { ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: trunc2x4i32_8i16: -; AVX512BW: # BB#0: # %entry +; AVX512BW: # %bb.0: # %entry ; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] ; AVX512BW-NEXT: vpshufb %xmm2, %xmm1, %xmm1 ; AVX512BW-NEXT: vpshufb %xmm2, %xmm0, %xmm0 @@ -1675,7 +1675,7 @@ define <8 x i16> @trunc2x4i32_8i16(<4 x i32> %a, <4 x i32> %b) { ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: trunc2x4i32_8i16: -; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL: # %bb.0: # %entry ; AVX512BWVL-NEXT: vpshuflw {{.*#+}} xmm1 = xmm1[0,2,2,3,4,5,6,7] ; AVX512BWVL-NEXT: vpshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,4,6,6,7] ; AVX512BWVL-NEXT: vpshufd {{.*#+}} xmm1 = xmm1[0,2,2,3] @@ -1694,7 +1694,7 @@ entry: ; PR15524 http://llvm.org/bugs/show_bug.cgi?id=15524 define i64 @trunc4i32_i64(<4 x i32> %inval) { ; SSE2-LABEL: trunc4i32_i64: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: pshuflw {{.*#+}} xmm0 = xmm0[0,2,2,3,4,5,6,7] ; SSE2-NEXT: pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,4,6,6,7] ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[0,2,2,3] @@ -1702,43 +1702,43 @@ define i64 @trunc4i32_i64(<4 x i32> %inval) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: trunc4i32_i64: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] ; SSSE3-NEXT: movq %xmm0, %rax ; SSSE3-NEXT: retq ; ; SSE41-LABEL: trunc4i32_i64: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] ; SSE41-NEXT: movq %xmm0, %rax ; SSE41-NEXT: retq ; ; AVX-LABEL: trunc4i32_i64: -; AVX: # BB#0: # %entry +; AVX: # %bb.0: # %entry ; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] ; AVX-NEXT: vmovq %xmm0, %rax ; AVX-NEXT: retq ; ; AVX512F-LABEL: trunc4i32_i64: -; AVX512F: # BB#0: # %entry +; AVX512F: # %bb.0: # %entry ; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] ; AVX512F-NEXT: vmovq %xmm0, %rax ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: trunc4i32_i64: -; AVX512VL: # BB#0: # %entry +; AVX512VL: # %bb.0: # %entry ; AVX512VL-NEXT: vpmovdw %xmm0, -{{[0-9]+}}(%rsp) ; AVX512VL-NEXT: movq -{{[0-9]+}}(%rsp), %rax ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: trunc4i32_i64: -; AVX512BW: # BB#0: # %entry +; AVX512BW: # %bb.0: # %entry ; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,1,4,5,8,9,12,13,8,9,12,13,12,13,14,15] ; AVX512BW-NEXT: vmovq %xmm0, %rax ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: trunc4i32_i64: -; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL: # %bb.0: # %entry ; AVX512BWVL-NEXT: vpmovdw %xmm0, -{{[0-9]+}}(%rsp) ; AVX512BWVL-NEXT: movq -{{[0-9]+}}(%rsp), %rax ; AVX512BWVL-NEXT: retq @@ -1750,7 +1750,7 @@ entry: define <16 x i8> @trunc2x8i16_16i8(<8 x i16> %a, <8 x i16> %b) { ; SSE2-LABEL: trunc2x8i16_16i8: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [255,255,255,255,255,255,255,255] ; SSE2-NEXT: pand %xmm2, %xmm1 ; SSE2-NEXT: pand %xmm2, %xmm0 @@ -1758,7 +1758,7 @@ define <16 x i8> @trunc2x8i16_16i8(<8 x i16> %a, <8 x i16> %b) { ; SSE2-NEXT: retq ; ; SSSE3-LABEL: trunc2x8i16_16i8: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: movdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> ; SSSE3-NEXT: pshufb %xmm2, %xmm1 ; SSSE3-NEXT: pshufb %xmm2, %xmm0 @@ -1766,7 +1766,7 @@ define <16 x i8> @trunc2x8i16_16i8(<8 x i16> %a, <8 x i16> %b) { ; SSSE3-NEXT: retq ; ; SSE41-LABEL: trunc2x8i16_16i8: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: movdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> ; SSE41-NEXT: pshufb %xmm2, %xmm1 ; SSE41-NEXT: pshufb %xmm2, %xmm0 @@ -1774,7 +1774,7 @@ define <16 x i8> @trunc2x8i16_16i8(<8 x i16> %a, <8 x i16> %b) { ; SSE41-NEXT: retq ; ; AVX-LABEL: trunc2x8i16_16i8: -; AVX: # BB#0: # %entry +; AVX: # %bb.0: # %entry ; AVX-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> ; AVX-NEXT: vpshufb %xmm2, %xmm1, %xmm1 ; AVX-NEXT: vpshufb %xmm2, %xmm0, %xmm0 @@ -1782,7 +1782,7 @@ define <16 x i8> @trunc2x8i16_16i8(<8 x i16> %a, <8 x i16> %b) { ; AVX-NEXT: retq ; ; AVX512-LABEL: trunc2x8i16_16i8: -; AVX512: # BB#0: # %entry +; AVX512: # %bb.0: # %entry ; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = <0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u> ; AVX512-NEXT: vpshufb %xmm2, %xmm1, %xmm1 ; AVX512-NEXT: vpshufb %xmm2, %xmm0, %xmm0 @@ -1798,50 +1798,50 @@ entry: ; PR15524 http://llvm.org/bugs/show_bug.cgi?id=15524 define i64 @trunc8i16_i64(<8 x i16> %inval) { ; SSE2-LABEL: trunc8i16_i64: -; SSE2: # BB#0: # %entry +; SSE2: # %bb.0: # %entry ; SSE2-NEXT: pand {{.*}}(%rip), %xmm0 ; SSE2-NEXT: packuswb %xmm0, %xmm0 ; SSE2-NEXT: movq %xmm0, %rax ; SSE2-NEXT: retq ; ; SSSE3-LABEL: trunc8i16_i64: -; SSSE3: # BB#0: # %entry +; SSSE3: # %bb.0: # %entry ; SSSE3-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] ; SSSE3-NEXT: movq %xmm0, %rax ; SSSE3-NEXT: retq ; ; SSE41-LABEL: trunc8i16_i64: -; SSE41: # BB#0: # %entry +; SSE41: # %bb.0: # %entry ; SSE41-NEXT: pshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] ; SSE41-NEXT: movq %xmm0, %rax ; SSE41-NEXT: retq ; ; AVX-LABEL: trunc8i16_i64: -; AVX: # BB#0: # %entry +; AVX: # %bb.0: # %entry ; AVX-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] ; AVX-NEXT: vmovq %xmm0, %rax ; AVX-NEXT: retq ; ; AVX512F-LABEL: trunc8i16_i64: -; AVX512F: # BB#0: # %entry +; AVX512F: # %bb.0: # %entry ; AVX512F-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] ; AVX512F-NEXT: vmovq %xmm0, %rax ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: trunc8i16_i64: -; AVX512VL: # BB#0: # %entry +; AVX512VL: # %bb.0: # %entry ; AVX512VL-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] ; AVX512VL-NEXT: vmovq %xmm0, %rax ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: trunc8i16_i64: -; AVX512BW: # BB#0: # %entry +; AVX512BW: # %bb.0: # %entry ; AVX512BW-NEXT: vpshufb {{.*#+}} xmm0 = xmm0[0,2,4,6,8,10,12,14,u,u,u,u,u,u,u,u] ; AVX512BW-NEXT: vmovq %xmm0, %rax ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: trunc8i16_i64: -; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL: # %bb.0: # %entry ; AVX512BWVL-NEXT: vpmovwb %xmm0, -{{[0-9]+}}(%rsp) ; AVX512BWVL-NEXT: movq -{{[0-9]+}}(%rsp), %rax ; AVX512BWVL-NEXT: retq @@ -1853,32 +1853,32 @@ entry: define <16 x i8> @trunc16i64_16i8_const() { ; SSE-LABEL: trunc16i64_16i8_const: -; SSE: # BB#0: # %entry +; SSE: # %bb.0: # %entry ; SSE-NEXT: xorps %xmm0, %xmm0 ; SSE-NEXT: retq ; ; AVX-LABEL: trunc16i64_16i8_const: -; AVX: # BB#0: # %entry +; AVX: # %bb.0: # %entry ; AVX-NEXT: vxorps %xmm0, %xmm0, %xmm0 ; AVX-NEXT: retq ; ; AVX512F-LABEL: trunc16i64_16i8_const: -; AVX512F: # BB#0: # %entry +; AVX512F: # %bb.0: # %entry ; AVX512F-NEXT: vxorps %xmm0, %xmm0, %xmm0 ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: trunc16i64_16i8_const: -; AVX512VL: # BB#0: # %entry +; AVX512VL: # %bb.0: # %entry ; AVX512VL-NEXT: vpxor %xmm0, %xmm0, %xmm0 ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: trunc16i64_16i8_const: -; AVX512BW: # BB#0: # %entry +; AVX512BW: # %bb.0: # %entry ; AVX512BW-NEXT: vxorps %xmm0, %xmm0, %xmm0 ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: trunc16i64_16i8_const: -; AVX512BWVL: # BB#0: # %entry +; AVX512BWVL: # %bb.0: # %entry ; AVX512BWVL-NEXT: vpxor %xmm0, %xmm0, %xmm0 ; AVX512BWVL-NEXT: retq @@ -1890,7 +1890,7 @@ entry: define void @PR34773(i16* %a0, i8* %a1) { ; SSE-LABEL: PR34773: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movdqu (%rdi), %xmm0 ; SSE-NEXT: movdqu 16(%rdi), %xmm1 ; SSE-NEXT: movdqu 32(%rdi), %xmm2 @@ -1906,7 +1906,7 @@ define void @PR34773(i16* %a0, i8* %a1) { ; SSE-NEXT: retq ; ; AVX1-LABEL: PR34773: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vmovdqu (%rdi), %ymm0 ; AVX1-NEXT: vmovdqu 32(%rdi), %ymm1 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 @@ -1923,7 +1923,7 @@ define void @PR34773(i16* %a0, i8* %a1) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: PR34773: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vmovdqu (%rdi), %ymm0 ; AVX2-NEXT: vmovdqu 32(%rdi), %ymm1 ; AVX2-NEXT: vpsrlw $8, %ymm0, %ymm0 @@ -1938,7 +1938,7 @@ define void @PR34773(i16* %a0, i8* %a1) { ; AVX2-NEXT: retq ; ; AVX512F-LABEL: PR34773: -; AVX512F: # BB#0: +; AVX512F: # %bb.0: ; AVX512F-NEXT: vmovdqu (%rdi), %ymm0 ; AVX512F-NEXT: vmovdqu 32(%rdi), %ymm1 ; AVX512F-NEXT: vpsrlw $8, %ymm0, %ymm0 @@ -1953,7 +1953,7 @@ define void @PR34773(i16* %a0, i8* %a1) { ; AVX512F-NEXT: retq ; ; AVX512VL-LABEL: PR34773: -; AVX512VL: # BB#0: +; AVX512VL: # %bb.0: ; AVX512VL-NEXT: vmovdqu (%rdi), %ymm0 ; AVX512VL-NEXT: vmovdqu 32(%rdi), %ymm1 ; AVX512VL-NEXT: vpsrlw $8, %ymm0, %ymm0 @@ -1968,7 +1968,7 @@ define void @PR34773(i16* %a0, i8* %a1) { ; AVX512VL-NEXT: retq ; ; AVX512BW-LABEL: PR34773: -; AVX512BW: # BB#0: +; AVX512BW: # %bb.0: ; AVX512BW-NEXT: vmovdqu (%rdi), %ymm0 ; AVX512BW-NEXT: vmovdqu 32(%rdi), %ymm1 ; AVX512BW-NEXT: vpsrlw $8, %ymm0, %ymm0 @@ -1981,7 +1981,7 @@ define void @PR34773(i16* %a0, i8* %a1) { ; AVX512BW-NEXT: retq ; ; AVX512BWVL-LABEL: PR34773: -; AVX512BWVL: # BB#0: +; AVX512BWVL: # %bb.0: ; AVX512BWVL-NEXT: vpsrlw $8, (%rdi), %ymm0 ; AVX512BWVL-NEXT: vpsrlw $8, 32(%rdi), %ymm1 ; AVX512BWVL-NEXT: vpmovwb %ymm0, (%rsi) |
