summaryrefslogtreecommitdiffstats
path: root/llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll')
-rw-r--r--llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll342
1 files changed, 222 insertions, 120 deletions
diff --git a/llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll b/llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll
index 6850410e074..9f8f066ec9c 100644
--- a/llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll
+++ b/llvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll
@@ -4365,13 +4365,20 @@ entry:
define <1 x i32> @constrained_vector_fptoui_v1i32_v1f32() #0 {
; CHECK-LABEL: constrained_vector_fptoui_v1i32_v1f32:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
+; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
+; CHECK-NEXT: # kill: def $eax killed $eax killed $rax
; CHECK-NEXT: retq
;
-; AVX-LABEL: constrained_vector_fptoui_v1i32_v1f32:
-; AVX: # %bb.0: # %entry
-; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
-; AVX-NEXT: retq
+; AVX1-LABEL: constrained_vector_fptoui_v1i32_v1f32:
+; AVX1: # %bb.0: # %entry
+; AVX1-NEXT: vcvttss2si {{.*}}(%rip), %rax
+; AVX1-NEXT: # kill: def $eax killed $eax killed $rax
+; AVX1-NEXT: retq
+;
+; AVX512-LABEL: constrained_vector_fptoui_v1i32_v1f32:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vcvttss2usi {{.*}}(%rip), %eax
+; AVX512-NEXT: retq
entry:
%result = call <1 x i32> @llvm.experimental.constrained.fptoui.v1i32.v1f32(
<1 x float><float 42.0>,
@@ -4382,20 +4389,28 @@ entry:
define <2 x i32> @constrained_vector_fptoui_v2i32_v2f32() #0 {
; CHECK-LABEL: constrained_vector_fptoui_v2i32_v2f32:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
+; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
; CHECK-NEXT: movd %eax, %xmm1
-; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
+; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
; CHECK-NEXT: movd %eax, %xmm0
; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; CHECK-NEXT: retq
;
-; AVX-LABEL: constrained_vector_fptoui_v2i32_v2f32:
-; AVX: # %bb.0: # %entry
-; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
-; AVX-NEXT: vcvttss2si {{.*}}(%rip), %ecx
-; AVX-NEXT: vmovd %ecx, %xmm0
-; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
-; AVX-NEXT: retq
+; AVX1-LABEL: constrained_vector_fptoui_v2i32_v2f32:
+; AVX1: # %bb.0: # %entry
+; AVX1-NEXT: vcvttss2si {{.*}}(%rip), %rax
+; AVX1-NEXT: vcvttss2si {{.*}}(%rip), %rcx
+; AVX1-NEXT: vmovd %ecx, %xmm0
+; AVX1-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
+; AVX1-NEXT: retq
+;
+; AVX512-LABEL: constrained_vector_fptoui_v2i32_v2f32:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vcvttss2usi {{.*}}(%rip), %eax
+; AVX512-NEXT: vmovd %eax, %xmm0
+; AVX512-NEXT: vcvttss2usi {{.*}}(%rip), %eax
+; AVX512-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
+; AVX512-NEXT: retq
entry:
%result = call <2 x i32> @llvm.experimental.constrained.fptoui.v2i32.v2f32(
<2 x float><float 42.0, float 43.0>,
@@ -4406,25 +4421,35 @@ entry:
define <3 x i32> @constrained_vector_fptoui_v3i32_v3f32() #0 {
; CHECK-LABEL: constrained_vector_fptoui_v3i32_v3f32:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
+; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
; CHECK-NEXT: movd %eax, %xmm1
-; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
+; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
; CHECK-NEXT: movd %eax, %xmm0
; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
-; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
+; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
; CHECK-NEXT: movd %eax, %xmm1
; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; CHECK-NEXT: retq
;
-; AVX-LABEL: constrained_vector_fptoui_v3i32_v3f32:
-; AVX: # %bb.0: # %entry
-; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
-; AVX-NEXT: vcvttss2si {{.*}}(%rip), %ecx
-; AVX-NEXT: vmovd %ecx, %xmm0
-; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
-; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
-; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
-; AVX-NEXT: retq
+; AVX1-LABEL: constrained_vector_fptoui_v3i32_v3f32:
+; AVX1: # %bb.0: # %entry
+; AVX1-NEXT: vcvttss2si {{.*}}(%rip), %rax
+; AVX1-NEXT: vcvttss2si {{.*}}(%rip), %rcx
+; AVX1-NEXT: vmovd %ecx, %xmm0
+; AVX1-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
+; AVX1-NEXT: vcvttss2si {{.*}}(%rip), %rax
+; AVX1-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
+; AVX1-NEXT: retq
+;
+; AVX512-LABEL: constrained_vector_fptoui_v3i32_v3f32:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vcvttss2usi {{.*}}(%rip), %eax
+; AVX512-NEXT: vmovd %eax, %xmm0
+; AVX512-NEXT: vcvttss2usi {{.*}}(%rip), %eax
+; AVX512-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
+; AVX512-NEXT: vcvttss2usi {{.*}}(%rip), %eax
+; AVX512-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
+; AVX512-NEXT: retq
entry:
%result = call <3 x i32> @llvm.experimental.constrained.fptoui.v3i32.v3f32(
<3 x float><float 42.0, float 43.0,
@@ -4436,30 +4461,42 @@ entry:
define <4 x i32> @constrained_vector_fptoui_v4i32_v4f32() #0 {
; CHECK-LABEL: constrained_vector_fptoui_v4i32_v4f32:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
+; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
; CHECK-NEXT: movd %eax, %xmm0
-; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
+; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
; CHECK-NEXT: movd %eax, %xmm1
; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
-; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
+; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
; CHECK-NEXT: movd %eax, %xmm2
-; CHECK-NEXT: cvttss2si {{.*}}(%rip), %eax
+; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
; CHECK-NEXT: movd %eax, %xmm0
; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; CHECK-NEXT: retq
;
-; AVX-LABEL: constrained_vector_fptoui_v4i32_v4f32:
-; AVX: # %bb.0: # %entry
-; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
-; AVX-NEXT: vcvttss2si {{.*}}(%rip), %ecx
-; AVX-NEXT: vmovd %ecx, %xmm0
-; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
-; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
-; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
-; AVX-NEXT: vcvttss2si {{.*}}(%rip), %eax
-; AVX-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0
-; AVX-NEXT: retq
+; AVX1-LABEL: constrained_vector_fptoui_v4i32_v4f32:
+; AVX1: # %bb.0: # %entry
+; AVX1-NEXT: vcvttss2si {{.*}}(%rip), %rax
+; AVX1-NEXT: vcvttss2si {{.*}}(%rip), %rcx
+; AVX1-NEXT: vmovd %ecx, %xmm0
+; AVX1-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
+; AVX1-NEXT: vcvttss2si {{.*}}(%rip), %rax
+; AVX1-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
+; AVX1-NEXT: vcvttss2si {{.*}}(%rip), %rax
+; AVX1-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0
+; AVX1-NEXT: retq
+;
+; AVX512-LABEL: constrained_vector_fptoui_v4i32_v4f32:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vcvttss2usi {{.*}}(%rip), %eax
+; AVX512-NEXT: vmovd %eax, %xmm0
+; AVX512-NEXT: vcvttss2usi {{.*}}(%rip), %eax
+; AVX512-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
+; AVX512-NEXT: vcvttss2usi {{.*}}(%rip), %eax
+; AVX512-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
+; AVX512-NEXT: vcvttss2usi {{.*}}(%rip), %eax
+; AVX512-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0
+; AVX512-NEXT: retq
entry:
%result = call <4 x i32> @llvm.experimental.constrained.fptoui.v4i32.v4f32(
<4 x float><float 42.0, float 43.0,
@@ -4474,10 +4511,15 @@ define <1 x i64> @constrained_vector_fptoui_v1i64_v1f32() #0 {
; CHECK-NEXT: cvttss2si {{.*}}(%rip), %rax
; CHECK-NEXT: retq
;
-; AVX-LABEL: constrained_vector_fptoui_v1i64_v1f32:
-; AVX: # %bb.0: # %entry
-; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
-; AVX-NEXT: retq
+; AVX1-LABEL: constrained_vector_fptoui_v1i64_v1f32:
+; AVX1: # %bb.0: # %entry
+; AVX1-NEXT: vcvttss2si {{.*}}(%rip), %rax
+; AVX1-NEXT: retq
+;
+; AVX512-LABEL: constrained_vector_fptoui_v1i64_v1f32:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vcvttss2usi {{.*}}(%rip), %rax
+; AVX512-NEXT: retq
entry:
%result = call <1 x i64> @llvm.experimental.constrained.fptoui.v1i64.v1f32(
<1 x float><float 42.0>,
@@ -4495,14 +4537,23 @@ define <2 x i64> @constrained_vector_fptoui_v2i64_v2f32() #0 {
; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; CHECK-NEXT: retq
;
-; AVX-LABEL: constrained_vector_fptoui_v2i64_v2f32:
-; AVX: # %bb.0: # %entry
-; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
-; AVX-NEXT: vmovq %rax, %xmm0
-; AVX-NEXT: vcvttss2si {{.*}}(%rip), %rax
-; AVX-NEXT: vmovq %rax, %xmm1
-; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
-; AVX-NEXT: retq
+; AVX1-LABEL: constrained_vector_fptoui_v2i64_v2f32:
+; AVX1: # %bb.0: # %entry
+; AVX1-NEXT: vcvttss2si {{.*}}(%rip), %rax
+; AVX1-NEXT: vmovq %rax, %xmm0
+; AVX1-NEXT: vcvttss2si {{.*}}(%rip), %rax
+; AVX1-NEXT: vmovq %rax, %xmm1
+; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
+; AVX1-NEXT: retq
+;
+; AVX512-LABEL: constrained_vector_fptoui_v2i64_v2f32:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vcvttss2usi {{.*}}(%rip), %rax
+; AVX512-NEXT: vmovq %rax, %xmm0
+; AVX512-NEXT: vcvttss2usi {{.*}}(%rip), %rax
+; AVX512-NEXT: vmovq %rax, %xmm1
+; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
+; AVX512-NEXT: retq
entry:
%result = call <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f32(
<2 x float><float 42.0, float 43.0>,
@@ -4532,12 +4583,12 @@ define <3 x i64> @constrained_vector_fptoui_v3i64_v3f32() #0 {
;
; AVX512-LABEL: constrained_vector_fptoui_v3i64_v3f32:
; AVX512: # %bb.0: # %entry
-; AVX512-NEXT: vcvttss2si {{.*}}(%rip), %rax
+; AVX512-NEXT: vcvttss2usi {{.*}}(%rip), %rax
; AVX512-NEXT: vmovq %rax, %xmm0
-; AVX512-NEXT: vcvttss2si {{.*}}(%rip), %rax
+; AVX512-NEXT: vcvttss2usi {{.*}}(%rip), %rax
; AVX512-NEXT: vmovq %rax, %xmm1
; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
-; AVX512-NEXT: vcvttss2si {{.*}}(%rip), %rax
+; AVX512-NEXT: vcvttss2usi {{.*}}(%rip), %rax
; AVX512-NEXT: vmovq %rax, %xmm1
; AVX512-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX512-NEXT: retq
@@ -4581,14 +4632,14 @@ define <4 x i64> @constrained_vector_fptoui_v4i64_v4f32() #0 {
;
; AVX512-LABEL: constrained_vector_fptoui_v4i64_v4f32:
; AVX512: # %bb.0: # %entry
-; AVX512-NEXT: vcvttss2si {{.*}}(%rip), %rax
+; AVX512-NEXT: vcvttss2usi {{.*}}(%rip), %rax
; AVX512-NEXT: vmovq %rax, %xmm0
-; AVX512-NEXT: vcvttss2si {{.*}}(%rip), %rax
+; AVX512-NEXT: vcvttss2usi {{.*}}(%rip), %rax
; AVX512-NEXT: vmovq %rax, %xmm1
; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
-; AVX512-NEXT: vcvttss2si {{.*}}(%rip), %rax
+; AVX512-NEXT: vcvttss2usi {{.*}}(%rip), %rax
; AVX512-NEXT: vmovq %rax, %xmm1
-; AVX512-NEXT: vcvttss2si {{.*}}(%rip), %rax
+; AVX512-NEXT: vcvttss2usi {{.*}}(%rip), %rax
; AVX512-NEXT: vmovq %rax, %xmm2
; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
; AVX512-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
@@ -4604,13 +4655,20 @@ entry:
define <1 x i32> @constrained_vector_fptoui_v1i32_v1f64() #0 {
; CHECK-LABEL: constrained_vector_fptoui_v1i32_v1f64:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
+; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
+; CHECK-NEXT: # kill: def $eax killed $eax killed $rax
; CHECK-NEXT: retq
;
-; AVX-LABEL: constrained_vector_fptoui_v1i32_v1f64:
-; AVX: # %bb.0: # %entry
-; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
-; AVX-NEXT: retq
+; AVX1-LABEL: constrained_vector_fptoui_v1i32_v1f64:
+; AVX1: # %bb.0: # %entry
+; AVX1-NEXT: vcvttsd2si {{.*}}(%rip), %rax
+; AVX1-NEXT: # kill: def $eax killed $eax killed $rax
+; AVX1-NEXT: retq
+;
+; AVX512-LABEL: constrained_vector_fptoui_v1i32_v1f64:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vcvttsd2usi {{.*}}(%rip), %eax
+; AVX512-NEXT: retq
entry:
%result = call <1 x i32> @llvm.experimental.constrained.fptoui.v1i32.v1f64(
<1 x double><double 42.1>,
@@ -4621,20 +4679,28 @@ entry:
define <2 x i32> @constrained_vector_fptoui_v2i32_v2f64() #0 {
; CHECK-LABEL: constrained_vector_fptoui_v2i32_v2f64:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
+; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
; CHECK-NEXT: movd %eax, %xmm1
-; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
+; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
; CHECK-NEXT: movd %eax, %xmm0
; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
; CHECK-NEXT: retq
;
-; AVX-LABEL: constrained_vector_fptoui_v2i32_v2f64:
-; AVX: # %bb.0: # %entry
-; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
-; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %ecx
-; AVX-NEXT: vmovd %ecx, %xmm0
-; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
-; AVX-NEXT: retq
+; AVX1-LABEL: constrained_vector_fptoui_v2i32_v2f64:
+; AVX1: # %bb.0: # %entry
+; AVX1-NEXT: vcvttsd2si {{.*}}(%rip), %rax
+; AVX1-NEXT: vcvttsd2si {{.*}}(%rip), %rcx
+; AVX1-NEXT: vmovd %ecx, %xmm0
+; AVX1-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
+; AVX1-NEXT: retq
+;
+; AVX512-LABEL: constrained_vector_fptoui_v2i32_v2f64:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vcvttsd2usi {{.*}}(%rip), %eax
+; AVX512-NEXT: vmovd %eax, %xmm0
+; AVX512-NEXT: vcvttsd2usi {{.*}}(%rip), %eax
+; AVX512-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
+; AVX512-NEXT: retq
entry:
%result = call <2 x i32> @llvm.experimental.constrained.fptoui.v2i32.v2f64(
<2 x double><double 42.1, double 42.2>,
@@ -4645,25 +4711,35 @@ entry:
define <3 x i32> @constrained_vector_fptoui_v3i32_v3f64() #0 {
; CHECK-LABEL: constrained_vector_fptoui_v3i32_v3f64:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
+; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
; CHECK-NEXT: movd %eax, %xmm1
-; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
+; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
; CHECK-NEXT: movd %eax, %xmm0
; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm1[0],xmm0[1],xmm1[1]
-; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
+; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
; CHECK-NEXT: movd %eax, %xmm1
; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; CHECK-NEXT: retq
;
-; AVX-LABEL: constrained_vector_fptoui_v3i32_v3f64:
-; AVX: # %bb.0: # %entry
-; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
-; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %ecx
-; AVX-NEXT: vmovd %ecx, %xmm0
-; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
-; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
-; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
-; AVX-NEXT: retq
+; AVX1-LABEL: constrained_vector_fptoui_v3i32_v3f64:
+; AVX1: # %bb.0: # %entry
+; AVX1-NEXT: vcvttsd2si {{.*}}(%rip), %rax
+; AVX1-NEXT: vcvttsd2si {{.*}}(%rip), %rcx
+; AVX1-NEXT: vmovd %ecx, %xmm0
+; AVX1-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
+; AVX1-NEXT: vcvttsd2si {{.*}}(%rip), %rax
+; AVX1-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
+; AVX1-NEXT: retq
+;
+; AVX512-LABEL: constrained_vector_fptoui_v3i32_v3f64:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vcvttsd2usi {{.*}}(%rip), %eax
+; AVX512-NEXT: vmovd %eax, %xmm0
+; AVX512-NEXT: vcvttsd2usi {{.*}}(%rip), %eax
+; AVX512-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
+; AVX512-NEXT: vcvttsd2usi {{.*}}(%rip), %eax
+; AVX512-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
+; AVX512-NEXT: retq
entry:
%result = call <3 x i32> @llvm.experimental.constrained.fptoui.v3i32.v3f64(
<3 x double><double 42.1, double 42.2,
@@ -4675,30 +4751,42 @@ entry:
define <4 x i32> @constrained_vector_fptoui_v4i32_v4f64() #0 {
; CHECK-LABEL: constrained_vector_fptoui_v4i32_v4f64:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
+; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
; CHECK-NEXT: movd %eax, %xmm0
-; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
+; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
; CHECK-NEXT: movd %eax, %xmm1
; CHECK-NEXT: punpckldq {{.*#+}} xmm1 = xmm1[0],xmm0[0],xmm1[1],xmm0[1]
-; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
+; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
; CHECK-NEXT: movd %eax, %xmm2
-; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %eax
+; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
; CHECK-NEXT: movd %eax, %xmm0
; CHECK-NEXT: punpckldq {{.*#+}} xmm0 = xmm0[0],xmm2[0],xmm0[1],xmm2[1]
; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; CHECK-NEXT: retq
;
-; AVX-LABEL: constrained_vector_fptoui_v4i32_v4f64:
-; AVX: # %bb.0: # %entry
-; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
-; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %ecx
-; AVX-NEXT: vmovd %ecx, %xmm0
-; AVX-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
-; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
-; AVX-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
-; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %eax
-; AVX-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0
-; AVX-NEXT: retq
+; AVX1-LABEL: constrained_vector_fptoui_v4i32_v4f64:
+; AVX1: # %bb.0: # %entry
+; AVX1-NEXT: vcvttsd2si {{.*}}(%rip), %rax
+; AVX1-NEXT: vcvttsd2si {{.*}}(%rip), %rcx
+; AVX1-NEXT: vmovd %ecx, %xmm0
+; AVX1-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
+; AVX1-NEXT: vcvttsd2si {{.*}}(%rip), %rax
+; AVX1-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
+; AVX1-NEXT: vcvttsd2si {{.*}}(%rip), %rax
+; AVX1-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0
+; AVX1-NEXT: retq
+;
+; AVX512-LABEL: constrained_vector_fptoui_v4i32_v4f64:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vcvttsd2usi {{.*}}(%rip), %eax
+; AVX512-NEXT: vmovd %eax, %xmm0
+; AVX512-NEXT: vcvttsd2usi {{.*}}(%rip), %eax
+; AVX512-NEXT: vpinsrd $1, %eax, %xmm0, %xmm0
+; AVX512-NEXT: vcvttsd2usi {{.*}}(%rip), %eax
+; AVX512-NEXT: vpinsrd $2, %eax, %xmm0, %xmm0
+; AVX512-NEXT: vcvttsd2usi {{.*}}(%rip), %eax
+; AVX512-NEXT: vpinsrd $3, %eax, %xmm0, %xmm0
+; AVX512-NEXT: retq
entry:
%result = call <4 x i32> @llvm.experimental.constrained.fptoui.v4i32.v4f64(
<4 x double><double 42.1, double 42.2,
@@ -4713,10 +4801,15 @@ define <1 x i64> @constrained_vector_fptoui_v1i64_v1f64() #0 {
; CHECK-NEXT: cvttsd2si {{.*}}(%rip), %rax
; CHECK-NEXT: retq
;
-; AVX-LABEL: constrained_vector_fptoui_v1i64_v1f64:
-; AVX: # %bb.0: # %entry
-; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
-; AVX-NEXT: retq
+; AVX1-LABEL: constrained_vector_fptoui_v1i64_v1f64:
+; AVX1: # %bb.0: # %entry
+; AVX1-NEXT: vcvttsd2si {{.*}}(%rip), %rax
+; AVX1-NEXT: retq
+;
+; AVX512-LABEL: constrained_vector_fptoui_v1i64_v1f64:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vcvttsd2usi {{.*}}(%rip), %rax
+; AVX512-NEXT: retq
entry:
%result = call <1 x i64> @llvm.experimental.constrained.fptoui.v1i64.v1f64(
<1 x double><double 42.1>,
@@ -4734,14 +4827,23 @@ define <2 x i64> @constrained_vector_fptoui_v2i64_v2f64() #0 {
; CHECK-NEXT: punpcklqdq {{.*#+}} xmm0 = xmm0[0],xmm1[0]
; CHECK-NEXT: retq
;
-; AVX-LABEL: constrained_vector_fptoui_v2i64_v2f64:
-; AVX: # %bb.0: # %entry
-; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
-; AVX-NEXT: vmovq %rax, %xmm0
-; AVX-NEXT: vcvttsd2si {{.*}}(%rip), %rax
-; AVX-NEXT: vmovq %rax, %xmm1
-; AVX-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
-; AVX-NEXT: retq
+; AVX1-LABEL: constrained_vector_fptoui_v2i64_v2f64:
+; AVX1: # %bb.0: # %entry
+; AVX1-NEXT: vcvttsd2si {{.*}}(%rip), %rax
+; AVX1-NEXT: vmovq %rax, %xmm0
+; AVX1-NEXT: vcvttsd2si {{.*}}(%rip), %rax
+; AVX1-NEXT: vmovq %rax, %xmm1
+; AVX1-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
+; AVX1-NEXT: retq
+;
+; AVX512-LABEL: constrained_vector_fptoui_v2i64_v2f64:
+; AVX512: # %bb.0: # %entry
+; AVX512-NEXT: vcvttsd2usi {{.*}}(%rip), %rax
+; AVX512-NEXT: vmovq %rax, %xmm0
+; AVX512-NEXT: vcvttsd2usi {{.*}}(%rip), %rax
+; AVX512-NEXT: vmovq %rax, %xmm1
+; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
+; AVX512-NEXT: retq
entry:
%result = call <2 x i64> @llvm.experimental.constrained.fptoui.v2i64.v2f64(
<2 x double><double 42.1, double 42.2>,
@@ -4771,12 +4873,12 @@ define <3 x i64> @constrained_vector_fptoui_v3i64_v3f64() #0 {
;
; AVX512-LABEL: constrained_vector_fptoui_v3i64_v3f64:
; AVX512: # %bb.0: # %entry
-; AVX512-NEXT: vcvttsd2si {{.*}}(%rip), %rax
+; AVX512-NEXT: vcvttsd2usi {{.*}}(%rip), %rax
; AVX512-NEXT: vmovq %rax, %xmm0
-; AVX512-NEXT: vcvttsd2si {{.*}}(%rip), %rax
+; AVX512-NEXT: vcvttsd2usi {{.*}}(%rip), %rax
; AVX512-NEXT: vmovq %rax, %xmm1
; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
-; AVX512-NEXT: vcvttsd2si {{.*}}(%rip), %rax
+; AVX512-NEXT: vcvttsd2usi {{.*}}(%rip), %rax
; AVX512-NEXT: vmovq %rax, %xmm1
; AVX512-NEXT: vinserti128 $1, %xmm1, %ymm0, %ymm0
; AVX512-NEXT: retq
@@ -4820,14 +4922,14 @@ define <4 x i64> @constrained_vector_fptoui_v4i64_v4f64() #0 {
;
; AVX512-LABEL: constrained_vector_fptoui_v4i64_v4f64:
; AVX512: # %bb.0: # %entry
-; AVX512-NEXT: vcvttsd2si {{.*}}(%rip), %rax
+; AVX512-NEXT: vcvttsd2usi {{.*}}(%rip), %rax
; AVX512-NEXT: vmovq %rax, %xmm0
-; AVX512-NEXT: vcvttsd2si {{.*}}(%rip), %rax
+; AVX512-NEXT: vcvttsd2usi {{.*}}(%rip), %rax
; AVX512-NEXT: vmovq %rax, %xmm1
; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm0 = xmm1[0],xmm0[0]
-; AVX512-NEXT: vcvttsd2si {{.*}}(%rip), %rax
+; AVX512-NEXT: vcvttsd2usi {{.*}}(%rip), %rax
; AVX512-NEXT: vmovq %rax, %xmm1
-; AVX512-NEXT: vcvttsd2si {{.*}}(%rip), %rax
+; AVX512-NEXT: vcvttsd2usi {{.*}}(%rip), %rax
; AVX512-NEXT: vmovq %rax, %xmm2
; AVX512-NEXT: vpunpcklqdq {{.*#+}} xmm1 = xmm2[0],xmm1[0]
; AVX512-NEXT: vinserti128 $1, %xmm0, %ymm1, %ymm0
OpenPOWER on IntegriCloud