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-rw-r--r--llvm/test/CodeGen/X86/vec_udiv_to_shift.ll1
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/vec_udiv_to_shift.ll b/llvm/test/CodeGen/X86/vec_udiv_to_shift.ll
index 6edfcc0c3fa..2f9a0ef3e90 100644
--- a/llvm/test/CodeGen/X86/vec_udiv_to_shift.ll
+++ b/llvm/test/CodeGen/X86/vec_udiv_to_shift.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: opt < %s -instcombine -S | FileCheck %s
define <8 x i16> @udiv_vec8x16(<8 x i16> %var) {
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