diff options
Diffstat (limited to 'llvm/test/CodeGen/X86/vec_minmax_sint.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/vec_minmax_sint.ll | 416 |
1 files changed, 208 insertions, 208 deletions
diff --git a/llvm/test/CodeGen/X86/vec_minmax_sint.ll b/llvm/test/CodeGen/X86/vec_minmax_sint.ll index 70d60b0075c..67887dbe8fc 100644 --- a/llvm/test/CodeGen/X86/vec_minmax_sint.ll +++ b/llvm/test/CodeGen/X86/vec_minmax_sint.ll @@ -13,7 +13,7 @@ define <2 x i64> @max_gt_v2i64(<2 x i64> %a, <2 x i64> %b) { ; SSE2-LABEL: max_gt_v2i64: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,0,2147483648,0] ; SSE2-NEXT: movdqa %xmm1, %xmm3 ; SSE2-NEXT: pxor %xmm2, %xmm3 @@ -32,7 +32,7 @@ define <2 x i64> @max_gt_v2i64(<2 x i64> %a, <2 x i64> %b) { ; SSE2-NEXT: retq ; ; SSE41-LABEL: max_gt_v2i64: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: movdqa %xmm0, %xmm2 ; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0] ; SSE41-NEXT: movdqa %xmm1, %xmm3 @@ -51,7 +51,7 @@ define <2 x i64> @max_gt_v2i64(<2 x i64> %a, <2 x i64> %b) { ; SSE41-NEXT: retq ; ; SSE42-LABEL: max_gt_v2i64: -; SSE42: # BB#0: +; SSE42: # %bb.0: ; SSE42-NEXT: movdqa %xmm0, %xmm2 ; SSE42-NEXT: pcmpgtq %xmm1, %xmm0 ; SSE42-NEXT: blendvpd %xmm0, %xmm2, %xmm1 @@ -59,19 +59,19 @@ define <2 x i64> @max_gt_v2i64(<2 x i64> %a, <2 x i64> %b) { ; SSE42-NEXT: retq ; ; AVX1-LABEL: max_gt_v2i64: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm2 ; AVX1-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: max_gt_v2i64: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm2 ; AVX2-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: max_gt_v2i64: -; AVX512: # BB#0: +; AVX512: # %bb.0: ; AVX512-NEXT: # kill: %xmm1<def> %xmm1<kill> %zmm1<def> ; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def> ; AVX512-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0 @@ -85,7 +85,7 @@ define <2 x i64> @max_gt_v2i64(<2 x i64> %a, <2 x i64> %b) { define <4 x i64> @max_gt_v4i64(<4 x i64> %a, <4 x i64> %b) { ; SSE2-LABEL: max_gt_v4i64: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [2147483648,0,2147483648,0] ; SSE2-NEXT: movdqa %xmm3, %xmm5 ; SSE2-NEXT: pxor %xmm4, %xmm5 @@ -119,7 +119,7 @@ define <4 x i64> @max_gt_v4i64(<4 x i64> %a, <4 x i64> %b) { ; SSE2-NEXT: retq ; ; SSE41-LABEL: max_gt_v4i64: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: movdqa %xmm0, %xmm8 ; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0] ; SSE41-NEXT: movdqa %xmm3, %xmm5 @@ -153,7 +153,7 @@ define <4 x i64> @max_gt_v4i64(<4 x i64> %a, <4 x i64> %b) { ; SSE41-NEXT: retq ; ; SSE42-LABEL: max_gt_v4i64: -; SSE42: # BB#0: +; SSE42: # %bb.0: ; SSE42-NEXT: movdqa %xmm0, %xmm4 ; SSE42-NEXT: movdqa %xmm1, %xmm5 ; SSE42-NEXT: pcmpgtq %xmm3, %xmm5 @@ -166,7 +166,7 @@ define <4 x i64> @max_gt_v4i64(<4 x i64> %a, <4 x i64> %b) { ; SSE42-NEXT: retq ; ; AVX1-LABEL: max_gt_v4i64: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vpcmpgtq %xmm2, %xmm3, %xmm2 @@ -176,13 +176,13 @@ define <4 x i64> @max_gt_v4i64(<4 x i64> %a, <4 x i64> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: max_gt_v4i64: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm2 ; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: max_gt_v4i64: -; AVX512: # BB#0: +; AVX512: # %bb.0: ; AVX512-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def> ; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def> ; AVX512-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0 @@ -195,7 +195,7 @@ define <4 x i64> @max_gt_v4i64(<4 x i64> %a, <4 x i64> %b) { define <4 x i32> @max_gt_v4i32(<4 x i32> %a, <4 x i32> %b) { ; SSE2-LABEL: max_gt_v4i32: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movdqa %xmm0, %xmm2 ; SSE2-NEXT: pcmpgtd %xmm1, %xmm2 ; SSE2-NEXT: pand %xmm2, %xmm0 @@ -205,17 +205,17 @@ define <4 x i32> @max_gt_v4i32(<4 x i32> %a, <4 x i32> %b) { ; SSE2-NEXT: retq ; ; SSE41-LABEL: max_gt_v4i32: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: pmaxsd %xmm1, %xmm0 ; SSE41-NEXT: retq ; ; SSE42-LABEL: max_gt_v4i32: -; SSE42: # BB#0: +; SSE42: # %bb.0: ; SSE42-NEXT: pmaxsd %xmm1, %xmm0 ; SSE42-NEXT: retq ; ; AVX-LABEL: max_gt_v4i32: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0 ; AVX-NEXT: retq %1 = icmp sgt <4 x i32> %a, %b @@ -225,7 +225,7 @@ define <4 x i32> @max_gt_v4i32(<4 x i32> %a, <4 x i32> %b) { define <8 x i32> @max_gt_v8i32(<8 x i32> %a, <8 x i32> %b) { ; SSE2-LABEL: max_gt_v8i32: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movdqa %xmm1, %xmm4 ; SSE2-NEXT: pcmpgtd %xmm3, %xmm4 ; SSE2-NEXT: movdqa %xmm0, %xmm5 @@ -241,19 +241,19 @@ define <8 x i32> @max_gt_v8i32(<8 x i32> %a, <8 x i32> %b) { ; SSE2-NEXT: retq ; ; SSE41-LABEL: max_gt_v8i32: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: pmaxsd %xmm2, %xmm0 ; SSE41-NEXT: pmaxsd %xmm3, %xmm1 ; SSE41-NEXT: retq ; ; SSE42-LABEL: max_gt_v8i32: -; SSE42: # BB#0: +; SSE42: # %bb.0: ; SSE42-NEXT: pmaxsd %xmm2, %xmm0 ; SSE42-NEXT: pmaxsd %xmm3, %xmm1 ; SSE42-NEXT: retq ; ; AVX1-LABEL: max_gt_v8i32: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vpmaxsd %xmm2, %xmm3, %xmm2 @@ -262,12 +262,12 @@ define <8 x i32> @max_gt_v8i32(<8 x i32> %a, <8 x i32> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: max_gt_v8i32: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: max_gt_v8i32: -; AVX512: # BB#0: +; AVX512: # %bb.0: ; AVX512-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0 ; AVX512-NEXT: retq %1 = icmp sgt <8 x i32> %a, %b @@ -277,12 +277,12 @@ define <8 x i32> @max_gt_v8i32(<8 x i32> %a, <8 x i32> %b) { define <8 x i16> @max_gt_v8i16(<8 x i16> %a, <8 x i16> %b) { ; SSE-LABEL: max_gt_v8i16: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: pmaxsw %xmm1, %xmm0 ; SSE-NEXT: retq ; ; AVX-LABEL: max_gt_v8i16: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vpmaxsw %xmm1, %xmm0, %xmm0 ; AVX-NEXT: retq %1 = icmp sgt <8 x i16> %a, %b @@ -292,13 +292,13 @@ define <8 x i16> @max_gt_v8i16(<8 x i16> %a, <8 x i16> %b) { define <16 x i16> @max_gt_v16i16(<16 x i16> %a, <16 x i16> %b) { ; SSE-LABEL: max_gt_v16i16: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: pmaxsw %xmm2, %xmm0 ; SSE-NEXT: pmaxsw %xmm3, %xmm1 ; SSE-NEXT: retq ; ; AVX1-LABEL: max_gt_v16i16: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vpmaxsw %xmm2, %xmm3, %xmm2 @@ -307,12 +307,12 @@ define <16 x i16> @max_gt_v16i16(<16 x i16> %a, <16 x i16> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: max_gt_v16i16: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: max_gt_v16i16: -; AVX512: # BB#0: +; AVX512: # %bb.0: ; AVX512-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0 ; AVX512-NEXT: retq %1 = icmp sgt <16 x i16> %a, %b @@ -322,7 +322,7 @@ define <16 x i16> @max_gt_v16i16(<16 x i16> %a, <16 x i16> %b) { define <16 x i8> @max_gt_v16i8(<16 x i8> %a, <16 x i8> %b) { ; SSE2-LABEL: max_gt_v16i8: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movdqa %xmm0, %xmm2 ; SSE2-NEXT: pcmpgtb %xmm1, %xmm2 ; SSE2-NEXT: pand %xmm2, %xmm0 @@ -332,17 +332,17 @@ define <16 x i8> @max_gt_v16i8(<16 x i8> %a, <16 x i8> %b) { ; SSE2-NEXT: retq ; ; SSE41-LABEL: max_gt_v16i8: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: pmaxsb %xmm1, %xmm0 ; SSE41-NEXT: retq ; ; SSE42-LABEL: max_gt_v16i8: -; SSE42: # BB#0: +; SSE42: # %bb.0: ; SSE42-NEXT: pmaxsb %xmm1, %xmm0 ; SSE42-NEXT: retq ; ; AVX-LABEL: max_gt_v16i8: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0 ; AVX-NEXT: retq %1 = icmp sgt <16 x i8> %a, %b @@ -352,7 +352,7 @@ define <16 x i8> @max_gt_v16i8(<16 x i8> %a, <16 x i8> %b) { define <32 x i8> @max_gt_v32i8(<32 x i8> %a, <32 x i8> %b) { ; SSE2-LABEL: max_gt_v32i8: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movdqa %xmm1, %xmm4 ; SSE2-NEXT: pcmpgtb %xmm3, %xmm4 ; SSE2-NEXT: movdqa %xmm0, %xmm5 @@ -368,19 +368,19 @@ define <32 x i8> @max_gt_v32i8(<32 x i8> %a, <32 x i8> %b) { ; SSE2-NEXT: retq ; ; SSE41-LABEL: max_gt_v32i8: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: pmaxsb %xmm2, %xmm0 ; SSE41-NEXT: pmaxsb %xmm3, %xmm1 ; SSE41-NEXT: retq ; ; SSE42-LABEL: max_gt_v32i8: -; SSE42: # BB#0: +; SSE42: # %bb.0: ; SSE42-NEXT: pmaxsb %xmm2, %xmm0 ; SSE42-NEXT: pmaxsb %xmm3, %xmm1 ; SSE42-NEXT: retq ; ; AVX1-LABEL: max_gt_v32i8: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vpmaxsb %xmm2, %xmm3, %xmm2 @@ -389,12 +389,12 @@ define <32 x i8> @max_gt_v32i8(<32 x i8> %a, <32 x i8> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: max_gt_v32i8: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: max_gt_v32i8: -; AVX512: # BB#0: +; AVX512: # %bb.0: ; AVX512-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0 ; AVX512-NEXT: retq %1 = icmp sgt <32 x i8> %a, %b @@ -408,7 +408,7 @@ define <32 x i8> @max_gt_v32i8(<32 x i8> %a, <32 x i8> %b) { define <2 x i64> @max_ge_v2i64(<2 x i64> %a, <2 x i64> %b) { ; SSE2-LABEL: max_ge_v2i64: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,0,2147483648,0] ; SSE2-NEXT: movdqa %xmm0, %xmm3 ; SSE2-NEXT: pxor %xmm2, %xmm3 @@ -430,7 +430,7 @@ define <2 x i64> @max_ge_v2i64(<2 x i64> %a, <2 x i64> %b) { ; SSE2-NEXT: retq ; ; SSE41-LABEL: max_ge_v2i64: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: movdqa %xmm0, %xmm2 ; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0] ; SSE41-NEXT: movdqa %xmm2, %xmm3 @@ -451,7 +451,7 @@ define <2 x i64> @max_ge_v2i64(<2 x i64> %a, <2 x i64> %b) { ; SSE41-NEXT: retq ; ; SSE42-LABEL: max_ge_v2i64: -; SSE42: # BB#0: +; SSE42: # %bb.0: ; SSE42-NEXT: movdqa %xmm0, %xmm2 ; SSE42-NEXT: movdqa %xmm1, %xmm3 ; SSE42-NEXT: pcmpgtq %xmm2, %xmm3 @@ -462,7 +462,7 @@ define <2 x i64> @max_ge_v2i64(<2 x i64> %a, <2 x i64> %b) { ; SSE42-NEXT: retq ; ; AVX1-LABEL: max_ge_v2i64: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm2 ; AVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3 ; AVX1-NEXT: vpxor %xmm3, %xmm2, %xmm2 @@ -470,7 +470,7 @@ define <2 x i64> @max_ge_v2i64(<2 x i64> %a, <2 x i64> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: max_ge_v2i64: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm2 ; AVX2-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3 ; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2 @@ -478,7 +478,7 @@ define <2 x i64> @max_ge_v2i64(<2 x i64> %a, <2 x i64> %b) { ; AVX2-NEXT: retq ; ; AVX512-LABEL: max_ge_v2i64: -; AVX512: # BB#0: +; AVX512: # %bb.0: ; AVX512-NEXT: # kill: %xmm1<def> %xmm1<kill> %zmm1<def> ; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def> ; AVX512-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0 @@ -492,7 +492,7 @@ define <2 x i64> @max_ge_v2i64(<2 x i64> %a, <2 x i64> %b) { define <4 x i64> @max_ge_v4i64(<4 x i64> %a, <4 x i64> %b) { ; SSE2-LABEL: max_ge_v4i64: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [2147483648,0,2147483648,0] ; SSE2-NEXT: movdqa %xmm1, %xmm4 ; SSE2-NEXT: pxor %xmm7, %xmm4 @@ -532,7 +532,7 @@ define <4 x i64> @max_ge_v4i64(<4 x i64> %a, <4 x i64> %b) { ; SSE2-NEXT: retq ; ; SSE41-LABEL: max_ge_v4i64: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: movdqa %xmm0, %xmm8 ; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0] ; SSE41-NEXT: movdqa %xmm1, %xmm5 @@ -569,7 +569,7 @@ define <4 x i64> @max_ge_v4i64(<4 x i64> %a, <4 x i64> %b) { ; SSE41-NEXT: retq ; ; SSE42-LABEL: max_ge_v4i64: -; SSE42: # BB#0: +; SSE42: # %bb.0: ; SSE42-NEXT: movdqa %xmm0, %xmm4 ; SSE42-NEXT: movdqa %xmm3, %xmm5 ; SSE42-NEXT: pcmpgtq %xmm1, %xmm5 @@ -586,7 +586,7 @@ define <4 x i64> @max_ge_v4i64(<4 x i64> %a, <4 x i64> %b) { ; SSE42-NEXT: retq ; ; AVX1-LABEL: max_ge_v4i64: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 ; AVX1-NEXT: vpcmpgtq %xmm2, %xmm3, %xmm2 @@ -599,7 +599,7 @@ define <4 x i64> @max_ge_v4i64(<4 x i64> %a, <4 x i64> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: max_ge_v4i64: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm2 ; AVX2-NEXT: vpcmpeqd %ymm3, %ymm3, %ymm3 ; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2 @@ -607,7 +607,7 @@ define <4 x i64> @max_ge_v4i64(<4 x i64> %a, <4 x i64> %b) { ; AVX2-NEXT: retq ; ; AVX512-LABEL: max_ge_v4i64: -; AVX512: # BB#0: +; AVX512: # %bb.0: ; AVX512-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def> ; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def> ; AVX512-NEXT: vpmaxsq %zmm1, %zmm0, %zmm0 @@ -620,7 +620,7 @@ define <4 x i64> @max_ge_v4i64(<4 x i64> %a, <4 x i64> %b) { define <4 x i32> @max_ge_v4i32(<4 x i32> %a, <4 x i32> %b) { ; SSE2-LABEL: max_ge_v4i32: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movdqa %xmm1, %xmm3 ; SSE2-NEXT: pcmpgtd %xmm0, %xmm3 ; SSE2-NEXT: pcmpeqd %xmm2, %xmm2 @@ -632,17 +632,17 @@ define <4 x i32> @max_ge_v4i32(<4 x i32> %a, <4 x i32> %b) { ; SSE2-NEXT: retq ; ; SSE41-LABEL: max_ge_v4i32: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: pmaxsd %xmm1, %xmm0 ; SSE41-NEXT: retq ; ; SSE42-LABEL: max_ge_v4i32: -; SSE42: # BB#0: +; SSE42: # %bb.0: ; SSE42-NEXT: pmaxsd %xmm1, %xmm0 ; SSE42-NEXT: retq ; ; AVX-LABEL: max_ge_v4i32: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vpmaxsd %xmm1, %xmm0, %xmm0 ; AVX-NEXT: retq %1 = icmp sge <4 x i32> %a, %b @@ -652,7 +652,7 @@ define <4 x i32> @max_ge_v4i32(<4 x i32> %a, <4 x i32> %b) { define <8 x i32> @max_ge_v8i32(<8 x i32> %a, <8 x i32> %b) { ; SSE2-LABEL: max_ge_v8i32: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movdqa %xmm3, %xmm6 ; SSE2-NEXT: pcmpgtd %xmm1, %xmm6 ; SSE2-NEXT: pcmpeqd %xmm4, %xmm4 @@ -672,19 +672,19 @@ define <8 x i32> @max_ge_v8i32(<8 x i32> %a, <8 x i32> %b) { ; SSE2-NEXT: retq ; ; SSE41-LABEL: max_ge_v8i32: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: pmaxsd %xmm2, %xmm0 ; SSE41-NEXT: pmaxsd %xmm3, %xmm1 ; SSE41-NEXT: retq ; ; SSE42-LABEL: max_ge_v8i32: -; SSE42: # BB#0: +; SSE42: # %bb.0: ; SSE42-NEXT: pmaxsd %xmm2, %xmm0 ; SSE42-NEXT: pmaxsd %xmm3, %xmm1 ; SSE42-NEXT: retq ; ; AVX1-LABEL: max_ge_v8i32: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vpmaxsd %xmm2, %xmm3, %xmm2 @@ -693,12 +693,12 @@ define <8 x i32> @max_ge_v8i32(<8 x i32> %a, <8 x i32> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: max_ge_v8i32: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: max_ge_v8i32: -; AVX512: # BB#0: +; AVX512: # %bb.0: ; AVX512-NEXT: vpmaxsd %ymm1, %ymm0, %ymm0 ; AVX512-NEXT: retq %1 = icmp sge <8 x i32> %a, %b @@ -708,12 +708,12 @@ define <8 x i32> @max_ge_v8i32(<8 x i32> %a, <8 x i32> %b) { define <8 x i16> @max_ge_v8i16(<8 x i16> %a, <8 x i16> %b) { ; SSE-LABEL: max_ge_v8i16: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: pmaxsw %xmm1, %xmm0 ; SSE-NEXT: retq ; ; AVX-LABEL: max_ge_v8i16: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vpmaxsw %xmm1, %xmm0, %xmm0 ; AVX-NEXT: retq %1 = icmp sge <8 x i16> %a, %b @@ -723,13 +723,13 @@ define <8 x i16> @max_ge_v8i16(<8 x i16> %a, <8 x i16> %b) { define <16 x i16> @max_ge_v16i16(<16 x i16> %a, <16 x i16> %b) { ; SSE-LABEL: max_ge_v16i16: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: pmaxsw %xmm2, %xmm0 ; SSE-NEXT: pmaxsw %xmm3, %xmm1 ; SSE-NEXT: retq ; ; AVX1-LABEL: max_ge_v16i16: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vpmaxsw %xmm2, %xmm3, %xmm2 @@ -738,12 +738,12 @@ define <16 x i16> @max_ge_v16i16(<16 x i16> %a, <16 x i16> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: max_ge_v16i16: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: max_ge_v16i16: -; AVX512: # BB#0: +; AVX512: # %bb.0: ; AVX512-NEXT: vpmaxsw %ymm1, %ymm0, %ymm0 ; AVX512-NEXT: retq %1 = icmp sge <16 x i16> %a, %b @@ -753,7 +753,7 @@ define <16 x i16> @max_ge_v16i16(<16 x i16> %a, <16 x i16> %b) { define <16 x i8> @max_ge_v16i8(<16 x i8> %a, <16 x i8> %b) { ; SSE2-LABEL: max_ge_v16i8: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movdqa %xmm1, %xmm3 ; SSE2-NEXT: pcmpgtb %xmm0, %xmm3 ; SSE2-NEXT: pcmpeqd %xmm2, %xmm2 @@ -765,17 +765,17 @@ define <16 x i8> @max_ge_v16i8(<16 x i8> %a, <16 x i8> %b) { ; SSE2-NEXT: retq ; ; SSE41-LABEL: max_ge_v16i8: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: pmaxsb %xmm1, %xmm0 ; SSE41-NEXT: retq ; ; SSE42-LABEL: max_ge_v16i8: -; SSE42: # BB#0: +; SSE42: # %bb.0: ; SSE42-NEXT: pmaxsb %xmm1, %xmm0 ; SSE42-NEXT: retq ; ; AVX-LABEL: max_ge_v16i8: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vpmaxsb %xmm1, %xmm0, %xmm0 ; AVX-NEXT: retq %1 = icmp sge <16 x i8> %a, %b @@ -785,7 +785,7 @@ define <16 x i8> @max_ge_v16i8(<16 x i8> %a, <16 x i8> %b) { define <32 x i8> @max_ge_v32i8(<32 x i8> %a, <32 x i8> %b) { ; SSE2-LABEL: max_ge_v32i8: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movdqa %xmm3, %xmm6 ; SSE2-NEXT: pcmpgtb %xmm1, %xmm6 ; SSE2-NEXT: pcmpeqd %xmm4, %xmm4 @@ -805,19 +805,19 @@ define <32 x i8> @max_ge_v32i8(<32 x i8> %a, <32 x i8> %b) { ; SSE2-NEXT: retq ; ; SSE41-LABEL: max_ge_v32i8: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: pmaxsb %xmm2, %xmm0 ; SSE41-NEXT: pmaxsb %xmm3, %xmm1 ; SSE41-NEXT: retq ; ; SSE42-LABEL: max_ge_v32i8: -; SSE42: # BB#0: +; SSE42: # %bb.0: ; SSE42-NEXT: pmaxsb %xmm2, %xmm0 ; SSE42-NEXT: pmaxsb %xmm3, %xmm1 ; SSE42-NEXT: retq ; ; AVX1-LABEL: max_ge_v32i8: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vpmaxsb %xmm2, %xmm3, %xmm2 @@ -826,12 +826,12 @@ define <32 x i8> @max_ge_v32i8(<32 x i8> %a, <32 x i8> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: max_ge_v32i8: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: max_ge_v32i8: -; AVX512: # BB#0: +; AVX512: # %bb.0: ; AVX512-NEXT: vpmaxsb %ymm1, %ymm0, %ymm0 ; AVX512-NEXT: retq %1 = icmp sge <32 x i8> %a, %b @@ -845,7 +845,7 @@ define <32 x i8> @max_ge_v32i8(<32 x i8> %a, <32 x i8> %b) { define <2 x i64> @min_lt_v2i64(<2 x i64> %a, <2 x i64> %b) { ; SSE2-LABEL: min_lt_v2i64: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,0,2147483648,0] ; SSE2-NEXT: movdqa %xmm0, %xmm3 ; SSE2-NEXT: pxor %xmm2, %xmm3 @@ -864,7 +864,7 @@ define <2 x i64> @min_lt_v2i64(<2 x i64> %a, <2 x i64> %b) { ; SSE2-NEXT: retq ; ; SSE41-LABEL: min_lt_v2i64: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: movdqa %xmm0, %xmm2 ; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0] ; SSE41-NEXT: movdqa %xmm2, %xmm3 @@ -883,7 +883,7 @@ define <2 x i64> @min_lt_v2i64(<2 x i64> %a, <2 x i64> %b) { ; SSE41-NEXT: retq ; ; SSE42-LABEL: min_lt_v2i64: -; SSE42: # BB#0: +; SSE42: # %bb.0: ; SSE42-NEXT: movdqa %xmm0, %xmm2 ; SSE42-NEXT: movdqa %xmm1, %xmm0 ; SSE42-NEXT: pcmpgtq %xmm2, %xmm0 @@ -892,19 +892,19 @@ define <2 x i64> @min_lt_v2i64(<2 x i64> %a, <2 x i64> %b) { ; SSE42-NEXT: retq ; ; AVX1-LABEL: min_lt_v2i64: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm2 ; AVX1-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0 ; AVX1-NEXT: retq ; ; AVX2-LABEL: min_lt_v2i64: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpcmpgtq %xmm0, %xmm1, %xmm2 ; AVX2-NEXT: vblendvpd %xmm2, %xmm0, %xmm1, %xmm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: min_lt_v2i64: -; AVX512: # BB#0: +; AVX512: # %bb.0: ; AVX512-NEXT: # kill: %xmm1<def> %xmm1<kill> %zmm1<def> ; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def> ; AVX512-NEXT: vpminsq %zmm1, %zmm0, %zmm0 @@ -918,7 +918,7 @@ define <2 x i64> @min_lt_v2i64(<2 x i64> %a, <2 x i64> %b) { define <4 x i64> @min_lt_v4i64(<4 x i64> %a, <4 x i64> %b) { ; SSE2-LABEL: min_lt_v4i64: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movdqa {{.*#+}} xmm4 = [2147483648,0,2147483648,0] ; SSE2-NEXT: movdqa %xmm1, %xmm5 ; SSE2-NEXT: pxor %xmm4, %xmm5 @@ -952,7 +952,7 @@ define <4 x i64> @min_lt_v4i64(<4 x i64> %a, <4 x i64> %b) { ; SSE2-NEXT: retq ; ; SSE41-LABEL: min_lt_v4i64: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: movdqa %xmm0, %xmm8 ; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0] ; SSE41-NEXT: movdqa %xmm1, %xmm5 @@ -986,7 +986,7 @@ define <4 x i64> @min_lt_v4i64(<4 x i64> %a, <4 x i64> %b) { ; SSE41-NEXT: retq ; ; SSE42-LABEL: min_lt_v4i64: -; SSE42: # BB#0: +; SSE42: # %bb.0: ; SSE42-NEXT: movdqa %xmm0, %xmm4 ; SSE42-NEXT: movdqa %xmm3, %xmm5 ; SSE42-NEXT: pcmpgtq %xmm1, %xmm5 @@ -1000,7 +1000,7 @@ define <4 x i64> @min_lt_v4i64(<4 x i64> %a, <4 x i64> %b) { ; SSE42-NEXT: retq ; ; AVX1-LABEL: min_lt_v4i64: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm3 ; AVX1-NEXT: vpcmpgtq %xmm2, %xmm3, %xmm2 @@ -1010,13 +1010,13 @@ define <4 x i64> @min_lt_v4i64(<4 x i64> %a, <4 x i64> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: min_lt_v4i64: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpcmpgtq %ymm0, %ymm1, %ymm2 ; AVX2-NEXT: vblendvpd %ymm2, %ymm0, %ymm1, %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: min_lt_v4i64: -; AVX512: # BB#0: +; AVX512: # %bb.0: ; AVX512-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def> ; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def> ; AVX512-NEXT: vpminsq %zmm1, %zmm0, %zmm0 @@ -1029,7 +1029,7 @@ define <4 x i64> @min_lt_v4i64(<4 x i64> %a, <4 x i64> %b) { define <4 x i32> @min_lt_v4i32(<4 x i32> %a, <4 x i32> %b) { ; SSE2-LABEL: min_lt_v4i32: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movdqa %xmm1, %xmm2 ; SSE2-NEXT: pcmpgtd %xmm0, %xmm2 ; SSE2-NEXT: pand %xmm2, %xmm0 @@ -1038,17 +1038,17 @@ define <4 x i32> @min_lt_v4i32(<4 x i32> %a, <4 x i32> %b) { ; SSE2-NEXT: retq ; ; SSE41-LABEL: min_lt_v4i32: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: pminsd %xmm1, %xmm0 ; SSE41-NEXT: retq ; ; SSE42-LABEL: min_lt_v4i32: -; SSE42: # BB#0: +; SSE42: # %bb.0: ; SSE42-NEXT: pminsd %xmm1, %xmm0 ; SSE42-NEXT: retq ; ; AVX-LABEL: min_lt_v4i32: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vpminsd %xmm1, %xmm0, %xmm0 ; AVX-NEXT: retq %1 = icmp slt <4 x i32> %a, %b @@ -1058,7 +1058,7 @@ define <4 x i32> @min_lt_v4i32(<4 x i32> %a, <4 x i32> %b) { define <8 x i32> @min_lt_v8i32(<8 x i32> %a, <8 x i32> %b) { ; SSE2-LABEL: min_lt_v8i32: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movdqa %xmm3, %xmm4 ; SSE2-NEXT: pcmpgtd %xmm1, %xmm4 ; SSE2-NEXT: movdqa %xmm2, %xmm5 @@ -1072,19 +1072,19 @@ define <8 x i32> @min_lt_v8i32(<8 x i32> %a, <8 x i32> %b) { ; SSE2-NEXT: retq ; ; SSE41-LABEL: min_lt_v8i32: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: pminsd %xmm2, %xmm0 ; SSE41-NEXT: pminsd %xmm3, %xmm1 ; SSE41-NEXT: retq ; ; SSE42-LABEL: min_lt_v8i32: -; SSE42: # BB#0: +; SSE42: # %bb.0: ; SSE42-NEXT: pminsd %xmm2, %xmm0 ; SSE42-NEXT: pminsd %xmm3, %xmm1 ; SSE42-NEXT: retq ; ; AVX1-LABEL: min_lt_v8i32: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vpminsd %xmm2, %xmm3, %xmm2 @@ -1093,12 +1093,12 @@ define <8 x i32> @min_lt_v8i32(<8 x i32> %a, <8 x i32> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: min_lt_v8i32: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpminsd %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: min_lt_v8i32: -; AVX512: # BB#0: +; AVX512: # %bb.0: ; AVX512-NEXT: vpminsd %ymm1, %ymm0, %ymm0 ; AVX512-NEXT: retq %1 = icmp slt <8 x i32> %a, %b @@ -1108,12 +1108,12 @@ define <8 x i32> @min_lt_v8i32(<8 x i32> %a, <8 x i32> %b) { define <8 x i16> @min_lt_v8i16(<8 x i16> %a, <8 x i16> %b) { ; SSE-LABEL: min_lt_v8i16: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: pminsw %xmm1, %xmm0 ; SSE-NEXT: retq ; ; AVX-LABEL: min_lt_v8i16: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vpminsw %xmm1, %xmm0, %xmm0 ; AVX-NEXT: retq %1 = icmp slt <8 x i16> %a, %b @@ -1123,13 +1123,13 @@ define <8 x i16> @min_lt_v8i16(<8 x i16> %a, <8 x i16> %b) { define <16 x i16> @min_lt_v16i16(<16 x i16> %a, <16 x i16> %b) { ; SSE-LABEL: min_lt_v16i16: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: pminsw %xmm2, %xmm0 ; SSE-NEXT: pminsw %xmm3, %xmm1 ; SSE-NEXT: retq ; ; AVX1-LABEL: min_lt_v16i16: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vpminsw %xmm2, %xmm3, %xmm2 @@ -1138,12 +1138,12 @@ define <16 x i16> @min_lt_v16i16(<16 x i16> %a, <16 x i16> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: min_lt_v16i16: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpminsw %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: min_lt_v16i16: -; AVX512: # BB#0: +; AVX512: # %bb.0: ; AVX512-NEXT: vpminsw %ymm1, %ymm0, %ymm0 ; AVX512-NEXT: retq %1 = icmp slt <16 x i16> %a, %b @@ -1153,7 +1153,7 @@ define <16 x i16> @min_lt_v16i16(<16 x i16> %a, <16 x i16> %b) { define <16 x i8> @min_lt_v16i8(<16 x i8> %a, <16 x i8> %b) { ; SSE2-LABEL: min_lt_v16i8: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movdqa %xmm1, %xmm2 ; SSE2-NEXT: pcmpgtb %xmm0, %xmm2 ; SSE2-NEXT: pand %xmm2, %xmm0 @@ -1162,17 +1162,17 @@ define <16 x i8> @min_lt_v16i8(<16 x i8> %a, <16 x i8> %b) { ; SSE2-NEXT: retq ; ; SSE41-LABEL: min_lt_v16i8: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: pminsb %xmm1, %xmm0 ; SSE41-NEXT: retq ; ; SSE42-LABEL: min_lt_v16i8: -; SSE42: # BB#0: +; SSE42: # %bb.0: ; SSE42-NEXT: pminsb %xmm1, %xmm0 ; SSE42-NEXT: retq ; ; AVX-LABEL: min_lt_v16i8: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vpminsb %xmm1, %xmm0, %xmm0 ; AVX-NEXT: retq %1 = icmp slt <16 x i8> %a, %b @@ -1182,7 +1182,7 @@ define <16 x i8> @min_lt_v16i8(<16 x i8> %a, <16 x i8> %b) { define <32 x i8> @min_lt_v32i8(<32 x i8> %a, <32 x i8> %b) { ; SSE2-LABEL: min_lt_v32i8: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movdqa %xmm3, %xmm4 ; SSE2-NEXT: pcmpgtb %xmm1, %xmm4 ; SSE2-NEXT: movdqa %xmm2, %xmm5 @@ -1196,19 +1196,19 @@ define <32 x i8> @min_lt_v32i8(<32 x i8> %a, <32 x i8> %b) { ; SSE2-NEXT: retq ; ; SSE41-LABEL: min_lt_v32i8: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: pminsb %xmm2, %xmm0 ; SSE41-NEXT: pminsb %xmm3, %xmm1 ; SSE41-NEXT: retq ; ; SSE42-LABEL: min_lt_v32i8: -; SSE42: # BB#0: +; SSE42: # %bb.0: ; SSE42-NEXT: pminsb %xmm2, %xmm0 ; SSE42-NEXT: pminsb %xmm3, %xmm1 ; SSE42-NEXT: retq ; ; AVX1-LABEL: min_lt_v32i8: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vpminsb %xmm2, %xmm3, %xmm2 @@ -1217,12 +1217,12 @@ define <32 x i8> @min_lt_v32i8(<32 x i8> %a, <32 x i8> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: min_lt_v32i8: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpminsb %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: min_lt_v32i8: -; AVX512: # BB#0: +; AVX512: # %bb.0: ; AVX512-NEXT: vpminsb %ymm1, %ymm0, %ymm0 ; AVX512-NEXT: retq %1 = icmp slt <32 x i8> %a, %b @@ -1236,7 +1236,7 @@ define <32 x i8> @min_lt_v32i8(<32 x i8> %a, <32 x i8> %b) { define <2 x i64> @min_le_v2i64(<2 x i64> %a, <2 x i64> %b) { ; SSE2-LABEL: min_le_v2i64: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movdqa {{.*#+}} xmm2 = [2147483648,0,2147483648,0] ; SSE2-NEXT: movdqa %xmm1, %xmm3 ; SSE2-NEXT: pxor %xmm2, %xmm3 @@ -1258,7 +1258,7 @@ define <2 x i64> @min_le_v2i64(<2 x i64> %a, <2 x i64> %b) { ; SSE2-NEXT: retq ; ; SSE41-LABEL: min_le_v2i64: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: movdqa %xmm0, %xmm2 ; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0] ; SSE41-NEXT: movdqa %xmm1, %xmm3 @@ -1279,7 +1279,7 @@ define <2 x i64> @min_le_v2i64(<2 x i64> %a, <2 x i64> %b) { ; SSE41-NEXT: retq ; ; SSE42-LABEL: min_le_v2i64: -; SSE42: # BB#0: +; SSE42: # %bb.0: ; SSE42-NEXT: movdqa %xmm0, %xmm2 ; SSE42-NEXT: pcmpgtq %xmm1, %xmm0 ; SSE42-NEXT: pcmpeqd %xmm3, %xmm3 @@ -1289,7 +1289,7 @@ define <2 x i64> @min_le_v2i64(<2 x i64> %a, <2 x i64> %b) { ; SSE42-NEXT: retq ; ; AVX1-LABEL: min_le_v2i64: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm2 ; AVX1-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3 ; AVX1-NEXT: vpxor %xmm3, %xmm2, %xmm2 @@ -1297,7 +1297,7 @@ define <2 x i64> @min_le_v2i64(<2 x i64> %a, <2 x i64> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: min_le_v2i64: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpcmpgtq %xmm1, %xmm0, %xmm2 ; AVX2-NEXT: vpcmpeqd %xmm3, %xmm3, %xmm3 ; AVX2-NEXT: vpxor %xmm3, %xmm2, %xmm2 @@ -1305,7 +1305,7 @@ define <2 x i64> @min_le_v2i64(<2 x i64> %a, <2 x i64> %b) { ; AVX2-NEXT: retq ; ; AVX512-LABEL: min_le_v2i64: -; AVX512: # BB#0: +; AVX512: # %bb.0: ; AVX512-NEXT: # kill: %xmm1<def> %xmm1<kill> %zmm1<def> ; AVX512-NEXT: # kill: %xmm0<def> %xmm0<kill> %zmm0<def> ; AVX512-NEXT: vpminsq %zmm1, %zmm0, %zmm0 @@ -1319,7 +1319,7 @@ define <2 x i64> @min_le_v2i64(<2 x i64> %a, <2 x i64> %b) { define <4 x i64> @min_le_v4i64(<4 x i64> %a, <4 x i64> %b) { ; SSE2-LABEL: min_le_v4i64: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movdqa {{.*#+}} xmm7 = [2147483648,0,2147483648,0] ; SSE2-NEXT: movdqa %xmm3, %xmm4 ; SSE2-NEXT: pxor %xmm7, %xmm4 @@ -1359,7 +1359,7 @@ define <4 x i64> @min_le_v4i64(<4 x i64> %a, <4 x i64> %b) { ; SSE2-NEXT: retq ; ; SSE41-LABEL: min_le_v4i64: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: movdqa %xmm0, %xmm8 ; SSE41-NEXT: movdqa {{.*#+}} xmm0 = [2147483648,0,2147483648,0] ; SSE41-NEXT: movdqa %xmm3, %xmm5 @@ -1396,7 +1396,7 @@ define <4 x i64> @min_le_v4i64(<4 x i64> %a, <4 x i64> %b) { ; SSE41-NEXT: retq ; ; SSE42-LABEL: min_le_v4i64: -; SSE42: # BB#0: +; SSE42: # %bb.0: ; SSE42-NEXT: movdqa %xmm0, %xmm4 ; SSE42-NEXT: movdqa %xmm1, %xmm5 ; SSE42-NEXT: pcmpgtq %xmm3, %xmm5 @@ -1412,7 +1412,7 @@ define <4 x i64> @min_le_v4i64(<4 x i64> %a, <4 x i64> %b) { ; SSE42-NEXT: retq ; ; AVX1-LABEL: min_le_v4i64: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vpcmpgtq %xmm2, %xmm3, %xmm2 @@ -1425,7 +1425,7 @@ define <4 x i64> @min_le_v4i64(<4 x i64> %a, <4 x i64> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: min_le_v4i64: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpcmpgtq %ymm1, %ymm0, %ymm2 ; AVX2-NEXT: vpcmpeqd %ymm3, %ymm3, %ymm3 ; AVX2-NEXT: vpxor %ymm3, %ymm2, %ymm2 @@ -1433,7 +1433,7 @@ define <4 x i64> @min_le_v4i64(<4 x i64> %a, <4 x i64> %b) { ; AVX2-NEXT: retq ; ; AVX512-LABEL: min_le_v4i64: -; AVX512: # BB#0: +; AVX512: # %bb.0: ; AVX512-NEXT: # kill: %ymm1<def> %ymm1<kill> %zmm1<def> ; AVX512-NEXT: # kill: %ymm0<def> %ymm0<kill> %zmm0<def> ; AVX512-NEXT: vpminsq %zmm1, %zmm0, %zmm0 @@ -1446,7 +1446,7 @@ define <4 x i64> @min_le_v4i64(<4 x i64> %a, <4 x i64> %b) { define <4 x i32> @min_le_v4i32(<4 x i32> %a, <4 x i32> %b) { ; SSE2-LABEL: min_le_v4i32: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movdqa %xmm0, %xmm2 ; SSE2-NEXT: pcmpgtd %xmm1, %xmm2 ; SSE2-NEXT: pcmpeqd %xmm3, %xmm3 @@ -1458,17 +1458,17 @@ define <4 x i32> @min_le_v4i32(<4 x i32> %a, <4 x i32> %b) { ; SSE2-NEXT: retq ; ; SSE41-LABEL: min_le_v4i32: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: pminsd %xmm1, %xmm0 ; SSE41-NEXT: retq ; ; SSE42-LABEL: min_le_v4i32: -; SSE42: # BB#0: +; SSE42: # %bb.0: ; SSE42-NEXT: pminsd %xmm1, %xmm0 ; SSE42-NEXT: retq ; ; AVX-LABEL: min_le_v4i32: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vpminsd %xmm1, %xmm0, %xmm0 ; AVX-NEXT: retq %1 = icmp sle <4 x i32> %a, %b @@ -1478,7 +1478,7 @@ define <4 x i32> @min_le_v4i32(<4 x i32> %a, <4 x i32> %b) { define <8 x i32> @min_le_v8i32(<8 x i32> %a, <8 x i32> %b) { ; SSE2-LABEL: min_le_v8i32: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movdqa %xmm1, %xmm6 ; SSE2-NEXT: pcmpgtd %xmm3, %xmm6 ; SSE2-NEXT: pcmpeqd %xmm7, %xmm7 @@ -1498,19 +1498,19 @@ define <8 x i32> @min_le_v8i32(<8 x i32> %a, <8 x i32> %b) { ; SSE2-NEXT: retq ; ; SSE41-LABEL: min_le_v8i32: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: pminsd %xmm2, %xmm0 ; SSE41-NEXT: pminsd %xmm3, %xmm1 ; SSE41-NEXT: retq ; ; SSE42-LABEL: min_le_v8i32: -; SSE42: # BB#0: +; SSE42: # %bb.0: ; SSE42-NEXT: pminsd %xmm2, %xmm0 ; SSE42-NEXT: pminsd %xmm3, %xmm1 ; SSE42-NEXT: retq ; ; AVX1-LABEL: min_le_v8i32: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vpminsd %xmm2, %xmm3, %xmm2 @@ -1519,12 +1519,12 @@ define <8 x i32> @min_le_v8i32(<8 x i32> %a, <8 x i32> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: min_le_v8i32: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpminsd %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: min_le_v8i32: -; AVX512: # BB#0: +; AVX512: # %bb.0: ; AVX512-NEXT: vpminsd %ymm1, %ymm0, %ymm0 ; AVX512-NEXT: retq %1 = icmp sle <8 x i32> %a, %b @@ -1534,12 +1534,12 @@ define <8 x i32> @min_le_v8i32(<8 x i32> %a, <8 x i32> %b) { define <8 x i16> @min_le_v8i16(<8 x i16> %a, <8 x i16> %b) { ; SSE-LABEL: min_le_v8i16: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: pminsw %xmm1, %xmm0 ; SSE-NEXT: retq ; ; AVX-LABEL: min_le_v8i16: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vpminsw %xmm1, %xmm0, %xmm0 ; AVX-NEXT: retq %1 = icmp sle <8 x i16> %a, %b @@ -1549,13 +1549,13 @@ define <8 x i16> @min_le_v8i16(<8 x i16> %a, <8 x i16> %b) { define <16 x i16> @min_le_v16i16(<16 x i16> %a, <16 x i16> %b) { ; SSE-LABEL: min_le_v16i16: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: pminsw %xmm2, %xmm0 ; SSE-NEXT: pminsw %xmm3, %xmm1 ; SSE-NEXT: retq ; ; AVX1-LABEL: min_le_v16i16: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vpminsw %xmm2, %xmm3, %xmm2 @@ -1564,12 +1564,12 @@ define <16 x i16> @min_le_v16i16(<16 x i16> %a, <16 x i16> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: min_le_v16i16: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpminsw %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: min_le_v16i16: -; AVX512: # BB#0: +; AVX512: # %bb.0: ; AVX512-NEXT: vpminsw %ymm1, %ymm0, %ymm0 ; AVX512-NEXT: retq %1 = icmp sle <16 x i16> %a, %b @@ -1579,7 +1579,7 @@ define <16 x i16> @min_le_v16i16(<16 x i16> %a, <16 x i16> %b) { define <16 x i8> @min_le_v16i8(<16 x i8> %a, <16 x i8> %b) { ; SSE2-LABEL: min_le_v16i8: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movdqa %xmm0, %xmm2 ; SSE2-NEXT: pcmpgtb %xmm1, %xmm2 ; SSE2-NEXT: pcmpeqd %xmm3, %xmm3 @@ -1591,17 +1591,17 @@ define <16 x i8> @min_le_v16i8(<16 x i8> %a, <16 x i8> %b) { ; SSE2-NEXT: retq ; ; SSE41-LABEL: min_le_v16i8: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: pminsb %xmm1, %xmm0 ; SSE41-NEXT: retq ; ; SSE42-LABEL: min_le_v16i8: -; SSE42: # BB#0: +; SSE42: # %bb.0: ; SSE42-NEXT: pminsb %xmm1, %xmm0 ; SSE42-NEXT: retq ; ; AVX-LABEL: min_le_v16i8: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vpminsb %xmm1, %xmm0, %xmm0 ; AVX-NEXT: retq %1 = icmp sle <16 x i8> %a, %b @@ -1611,7 +1611,7 @@ define <16 x i8> @min_le_v16i8(<16 x i8> %a, <16 x i8> %b) { define <32 x i8> @min_le_v32i8(<32 x i8> %a, <32 x i8> %b) { ; SSE2-LABEL: min_le_v32i8: -; SSE2: # BB#0: +; SSE2: # %bb.0: ; SSE2-NEXT: movdqa %xmm1, %xmm6 ; SSE2-NEXT: pcmpgtb %xmm3, %xmm6 ; SSE2-NEXT: pcmpeqd %xmm7, %xmm7 @@ -1631,19 +1631,19 @@ define <32 x i8> @min_le_v32i8(<32 x i8> %a, <32 x i8> %b) { ; SSE2-NEXT: retq ; ; SSE41-LABEL: min_le_v32i8: -; SSE41: # BB#0: +; SSE41: # %bb.0: ; SSE41-NEXT: pminsb %xmm2, %xmm0 ; SSE41-NEXT: pminsb %xmm3, %xmm1 ; SSE41-NEXT: retq ; ; SSE42-LABEL: min_le_v32i8: -; SSE42: # BB#0: +; SSE42: # %bb.0: ; SSE42-NEXT: pminsb %xmm2, %xmm0 ; SSE42-NEXT: pminsb %xmm3, %xmm1 ; SSE42-NEXT: retq ; ; AVX1-LABEL: min_le_v32i8: -; AVX1: # BB#0: +; AVX1: # %bb.0: ; AVX1-NEXT: vextractf128 $1, %ymm1, %xmm2 ; AVX1-NEXT: vextractf128 $1, %ymm0, %xmm3 ; AVX1-NEXT: vpminsb %xmm2, %xmm3, %xmm2 @@ -1652,12 +1652,12 @@ define <32 x i8> @min_le_v32i8(<32 x i8> %a, <32 x i8> %b) { ; AVX1-NEXT: retq ; ; AVX2-LABEL: min_le_v32i8: -; AVX2: # BB#0: +; AVX2: # %bb.0: ; AVX2-NEXT: vpminsb %ymm1, %ymm0, %ymm0 ; AVX2-NEXT: retq ; ; AVX512-LABEL: min_le_v32i8: -; AVX512: # BB#0: +; AVX512: # %bb.0: ; AVX512-NEXT: vpminsb %ymm1, %ymm0, %ymm0 ; AVX512-NEXT: retq %1 = icmp sle <32 x i8> %a, %b @@ -1671,12 +1671,12 @@ define <32 x i8> @min_le_v32i8(<32 x i8> %a, <32 x i8> %b) { define <2 x i64> @max_gt_v2i64c() { ; SSE-LABEL: max_gt_v2i64c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551615,7] ; SSE-NEXT: retq ; ; AVX-LABEL: max_gt_v2i64c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [18446744073709551615,7] ; AVX-NEXT: retq %1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0 @@ -1688,13 +1688,13 @@ define <2 x i64> @max_gt_v2i64c() { define <4 x i64> @max_gt_v4i64c() { ; SSE-LABEL: max_gt_v4i64c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,7] ; SSE-NEXT: pcmpeqd %xmm0, %xmm0 ; SSE-NEXT: retq ; ; AVX-LABEL: max_gt_v4i64c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [18446744073709551615,18446744073709551615,7,7] ; AVX-NEXT: retq %1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0 @@ -1706,12 +1706,12 @@ define <4 x i64> @max_gt_v4i64c() { define <4 x i32> @max_gt_v4i32c() { ; SSE-LABEL: max_gt_v4i32c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7] ; SSE-NEXT: retq ; ; AVX-LABEL: max_gt_v4i32c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7] ; AVX-NEXT: retq %1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0 @@ -1723,13 +1723,13 @@ define <4 x i32> @max_gt_v4i32c() { define <8 x i32> @max_gt_v8i32c() { ; SSE-LABEL: max_gt_v8i32c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295] ; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7] ; SSE-NEXT: retq ; ; AVX-LABEL: max_gt_v8i32c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [4294967295,4294967293,4294967293,4294967295,7,5,5,7] ; AVX-NEXT: retq %1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0 @@ -1741,12 +1741,12 @@ define <8 x i32> @max_gt_v8i32c() { define <8 x i16> @max_gt_v8i16c() { ; SSE-LABEL: max_gt_v8i16c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7] ; SSE-NEXT: retq ; ; AVX-LABEL: max_gt_v8i16c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7] ; AVX-NEXT: retq %1 = insertelement <8 x i16> <i16 -7, i16 -5, i16 -3, i16 -1, i16 1, i16 3, i16 5, i16 7>, i16 -7, i32 0 @@ -1758,13 +1758,13 @@ define <8 x i16> @max_gt_v8i16c() { define <16 x i16> @max_gt_v16i16c() { ; SSE-LABEL: max_gt_v16i16c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0] ; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8] ; SSE-NEXT: retq ; ; AVX-LABEL: max_gt_v16i16c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [65535,65534,65533,65532,65533,65534,65535,0,7,6,5,4,5,6,7,8] ; AVX-NEXT: retq %1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0 @@ -1776,12 +1776,12 @@ define <16 x i16> @max_gt_v16i16c() { define <16 x i8> @max_gt_v16i8c() { ; SSE-LABEL: max_gt_v16i8c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8] ; SSE-NEXT: retq ; ; AVX-LABEL: max_gt_v16i8c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8] ; AVX-NEXT: retq %1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0 @@ -1793,12 +1793,12 @@ define <16 x i8> @max_gt_v16i8c() { define <2 x i64> @max_ge_v2i64c() { ; SSE-LABEL: max_ge_v2i64c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551615,7] ; SSE-NEXT: retq ; ; AVX-LABEL: max_ge_v2i64c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [18446744073709551615,7] ; AVX-NEXT: retq %1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0 @@ -1810,13 +1810,13 @@ define <2 x i64> @max_ge_v2i64c() { define <4 x i64> @max_ge_v4i64c() { ; SSE-LABEL: max_ge_v4i64c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,7] ; SSE-NEXT: pcmpeqd %xmm0, %xmm0 ; SSE-NEXT: retq ; ; AVX-LABEL: max_ge_v4i64c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [18446744073709551615,18446744073709551615,7,7] ; AVX-NEXT: retq %1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0 @@ -1828,12 +1828,12 @@ define <4 x i64> @max_ge_v4i64c() { define <4 x i32> @max_ge_v4i32c() { ; SSE-LABEL: max_ge_v4i32c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7] ; SSE-NEXT: retq ; ; AVX-LABEL: max_ge_v4i32c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [4294967295,4294967295,7,7] ; AVX-NEXT: retq %1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0 @@ -1845,13 +1845,13 @@ define <4 x i32> @max_ge_v4i32c() { define <8 x i32> @max_ge_v8i32c() { ; SSE-LABEL: max_ge_v8i32c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967295,4294967293,4294967293,4294967295] ; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,5,5,7] ; SSE-NEXT: retq ; ; AVX-LABEL: max_ge_v8i32c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [4294967295,4294967293,4294967293,4294967295,7,5,5,7] ; AVX-NEXT: retq %1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0 @@ -1863,12 +1863,12 @@ define <8 x i32> @max_ge_v8i32c() { define <8 x i16> @max_ge_v8i16c() { ; SSE-LABEL: max_ge_v8i16c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7] ; SSE-NEXT: retq ; ; AVX-LABEL: max_ge_v8i16c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [65535,65533,65533,65535,7,5,5,7] ; AVX-NEXT: retq %1 = insertelement <8 x i16> <i16 -7, i16 -5, i16 -3, i16 -1, i16 1, i16 3, i16 5, i16 7>, i16 -7, i32 0 @@ -1880,13 +1880,13 @@ define <8 x i16> @max_ge_v8i16c() { define <16 x i16> @max_ge_v16i16c() { ; SSE-LABEL: max_ge_v16i16c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [65535,65534,65533,65532,65533,65534,65535,0] ; SSE-NEXT: movaps {{.*#+}} xmm1 = [7,6,5,4,5,6,7,8] ; SSE-NEXT: retq ; ; AVX-LABEL: max_ge_v16i16c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [65535,65534,65533,65532,65533,65534,65535,0,7,6,5,4,5,6,7,8] ; AVX-NEXT: retq %1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0 @@ -1898,12 +1898,12 @@ define <16 x i16> @max_ge_v16i16c() { define <16 x i8> @max_ge_v16i8c() { ; SSE-LABEL: max_ge_v16i8c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8] ; SSE-NEXT: retq ; ; AVX-LABEL: max_ge_v16i8c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [255,254,253,252,253,254,255,0,7,6,5,4,5,6,7,8] ; AVX-NEXT: retq %1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0 @@ -1915,12 +1915,12 @@ define <16 x i8> @max_ge_v16i8c() { define <2 x i64> @min_lt_v2i64c() { ; SSE-LABEL: min_lt_v2i64c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551609,1] ; SSE-NEXT: retq ; ; AVX-LABEL: min_lt_v2i64c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [18446744073709551609,1] ; AVX-NEXT: retq %1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0 @@ -1932,13 +1932,13 @@ define <2 x i64> @min_lt_v2i64c() { define <4 x i64> @min_lt_v4i64c() { ; SSE-LABEL: min_lt_v4i64c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551609,18446744073709551609] ; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,1] ; SSE-NEXT: retq ; ; AVX-LABEL: min_lt_v4i64c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [18446744073709551609,18446744073709551609,1,1] ; AVX-NEXT: retq %1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0 @@ -1950,12 +1950,12 @@ define <4 x i64> @min_lt_v4i64c() { define <4 x i32> @min_lt_v4i32c() { ; SSE-LABEL: min_lt_v4i32c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1] ; SSE-NEXT: retq ; ; AVX-LABEL: min_lt_v4i32c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1] ; AVX-NEXT: retq %1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0 @@ -1967,13 +1967,13 @@ define <4 x i32> @min_lt_v4i32c() { define <8 x i32> @min_lt_v8i32c() { ; SSE-LABEL: min_lt_v8i32c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289] ; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1] ; SSE-NEXT: retq ; ; AVX-LABEL: min_lt_v8i32c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [4294967289,4294967291,4294967291,4294967289,1,3,3,1] ; AVX-NEXT: retq %1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0 @@ -1985,12 +1985,12 @@ define <8 x i32> @min_lt_v8i32c() { define <8 x i16> @min_lt_v8i16c() { ; SSE-LABEL: min_lt_v8i16c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [65529,65531,65531,65529,1,3,3,1] ; SSE-NEXT: retq ; ; AVX-LABEL: min_lt_v8i16c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [65529,65531,65531,65529,1,3,3,1] ; AVX-NEXT: retq %1 = insertelement <8 x i16> <i16 -7, i16 -5, i16 -3, i16 -1, i16 1, i16 3, i16 5, i16 7>, i16 -7, i32 0 @@ -2002,13 +2002,13 @@ define <8 x i16> @min_lt_v8i16c() { define <16 x i16> @min_lt_v16i16c() { ; SSE-LABEL: min_lt_v16i16c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [65529,65530,65531,65532,65531,65530,65529,0] ; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0] ; SSE-NEXT: retq ; ; AVX-LABEL: min_lt_v16i16c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [65529,65530,65531,65532,65531,65530,65529,0,1,2,3,4,3,2,1,0] ; AVX-NEXT: retq %1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0 @@ -2020,12 +2020,12 @@ define <16 x i16> @min_lt_v16i16c() { define <16 x i8> @min_lt_v16i8c() { ; SSE-LABEL: min_lt_v16i8c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0] ; SSE-NEXT: retq ; ; AVX-LABEL: min_lt_v16i8c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0] ; AVX-NEXT: retq %1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0 @@ -2037,12 +2037,12 @@ define <16 x i8> @min_lt_v16i8c() { define <2 x i64> @min_le_v2i64c() { ; SSE-LABEL: min_le_v2i64c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551609,1] ; SSE-NEXT: retq ; ; AVX-LABEL: min_le_v2i64c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [18446744073709551609,1] ; AVX-NEXT: retq %1 = insertelement <2 x i64> <i64 -7, i64 7>, i64 -7, i32 0 @@ -2054,13 +2054,13 @@ define <2 x i64> @min_le_v2i64c() { define <4 x i64> @min_le_v4i64c() { ; SSE-LABEL: min_le_v4i64c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [18446744073709551609,18446744073709551609] ; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,1] ; SSE-NEXT: retq ; ; AVX-LABEL: min_le_v4i64c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [18446744073709551609,18446744073709551609,1,1] ; AVX-NEXT: retq %1 = insertelement <4 x i64> <i64 -7, i64 -1, i64 1, i64 7>, i64 -7, i32 0 @@ -2072,12 +2072,12 @@ define <4 x i64> @min_le_v4i64c() { define <4 x i32> @min_le_v4i32c() { ; SSE-LABEL: min_le_v4i32c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1] ; SSE-NEXT: retq ; ; AVX-LABEL: min_le_v4i32c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [4294967289,4294967289,1,1] ; AVX-NEXT: retq %1 = insertelement <4 x i32> <i32 -7, i32 -1, i32 1, i32 7>, i32 -7, i32 0 @@ -2089,13 +2089,13 @@ define <4 x i32> @min_le_v4i32c() { define <8 x i32> @min_le_v8i32c() { ; SSE-LABEL: min_le_v8i32c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [4294967289,4294967291,4294967291,4294967289] ; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,3,3,1] ; SSE-NEXT: retq ; ; AVX-LABEL: min_le_v8i32c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [4294967289,4294967291,4294967291,4294967289,1,3,3,1] ; AVX-NEXT: retq %1 = insertelement <8 x i32> <i32 -7, i32 -5, i32 -3, i32 -1, i32 1, i32 3, i32 5, i32 7>, i32 -7, i32 0 @@ -2107,12 +2107,12 @@ define <8 x i32> @min_le_v8i32c() { define <8 x i16> @min_le_v8i16c() { ; SSE-LABEL: min_le_v8i16c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [65529,65531,65531,65529,1,3,3,1] ; SSE-NEXT: retq ; ; AVX-LABEL: min_le_v8i16c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [65529,65531,65531,65529,1,3,3,1] ; AVX-NEXT: retq %1 = insertelement <8 x i16> <i16 -7, i16 -5, i16 -3, i16 -1, i16 1, i16 3, i16 5, i16 7>, i16 -7, i32 0 @@ -2124,13 +2124,13 @@ define <8 x i16> @min_le_v8i16c() { define <16 x i16> @min_le_v16i16c() { ; SSE-LABEL: min_le_v16i16c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [65529,65530,65531,65532,65531,65530,65529,0] ; SSE-NEXT: movaps {{.*#+}} xmm1 = [1,2,3,4,3,2,1,0] ; SSE-NEXT: retq ; ; AVX-LABEL: min_le_v16i16c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} ymm0 = [65529,65530,65531,65532,65531,65530,65529,0,1,2,3,4,3,2,1,0] ; AVX-NEXT: retq %1 = insertelement <16 x i16> <i16 -7, i16 -6, i16 -5, i16 -4, i16 -3, i16 -2, i16 -1, i16 0, i16 1, i16 2, i16 3, i16 4, i16 5, i16 6, i16 7, i16 8>, i16 -7, i32 0 @@ -2142,12 +2142,12 @@ define <16 x i16> @min_le_v16i16c() { define <16 x i8> @min_le_v16i8c() { ; SSE-LABEL: min_le_v16i8c: -; SSE: # BB#0: +; SSE: # %bb.0: ; SSE-NEXT: movaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0] ; SSE-NEXT: retq ; ; AVX-LABEL: min_le_v16i8c: -; AVX: # BB#0: +; AVX: # %bb.0: ; AVX-NEXT: vmovaps {{.*#+}} xmm0 = [249,250,251,252,251,250,249,0,1,2,3,4,3,2,1,0] ; AVX-NEXT: retq %1 = insertelement <16 x i8> <i8 -7, i8 -6, i8 -5, i8 -4, i8 -3, i8 -2, i8 -1, i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7, i8 8>, i8 -7, i32 0 |
