diff options
Diffstat (limited to 'llvm/test/CodeGen/X86/vec_fabs.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/vec_fabs.ll | 80 |
1 files changed, 40 insertions, 40 deletions
diff --git a/llvm/test/CodeGen/X86/vec_fabs.ll b/llvm/test/CodeGen/X86/vec_fabs.ll index aef62774e17..892599a3d7f 100644 --- a/llvm/test/CodeGen/X86/vec_fabs.ll +++ b/llvm/test/CodeGen/X86/vec_fabs.ll @@ -11,32 +11,32 @@ define <2 x double> @fabs_v2f64(<2 x double> %p) { ; X32_AVX-LABEL: fabs_v2f64: -; X32_AVX: # BB#0: +; X32_AVX: # %bb.0: ; X32_AVX-NEXT: vandps {{\.LCPI.*}}, %xmm0, %xmm0 ; X32_AVX-NEXT: retl ; ; X32_AVX512VL-LABEL: fabs_v2f64: -; X32_AVX512VL: # BB#0: +; X32_AVX512VL: # %bb.0: ; X32_AVX512VL-NEXT: vpand {{\.LCPI.*}}, %xmm0, %xmm0 ; X32_AVX512VL-NEXT: retl ; ; X32_AVX512VLDQ-LABEL: fabs_v2f64: -; X32_AVX512VLDQ: # BB#0: +; X32_AVX512VLDQ: # %bb.0: ; X32_AVX512VLDQ-NEXT: vandps {{\.LCPI.*}}, %xmm0, %xmm0 ; X32_AVX512VLDQ-NEXT: retl ; ; X64_AVX-LABEL: fabs_v2f64: -; X64_AVX: # BB#0: +; X64_AVX: # %bb.0: ; X64_AVX-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0 ; X64_AVX-NEXT: retq ; ; X64_AVX512VL-LABEL: fabs_v2f64: -; X64_AVX512VL: # BB#0: +; X64_AVX512VL: # %bb.0: ; X64_AVX512VL-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0 ; X64_AVX512VL-NEXT: retq ; ; X64_AVX512VLDQ-LABEL: fabs_v2f64: -; X64_AVX512VLDQ: # BB#0: +; X64_AVX512VLDQ: # %bb.0: ; X64_AVX512VLDQ-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0 ; X64_AVX512VLDQ-NEXT: retq %t = call <2 x double> @llvm.fabs.v2f64(<2 x double> %p) @@ -46,32 +46,32 @@ declare <2 x double> @llvm.fabs.v2f64(<2 x double> %p) define <4 x float> @fabs_v4f32(<4 x float> %p) { ; X32_AVX-LABEL: fabs_v4f32: -; X32_AVX: # BB#0: +; X32_AVX: # %bb.0: ; X32_AVX-NEXT: vandps {{\.LCPI.*}}, %xmm0, %xmm0 ; X32_AVX-NEXT: retl ; ; X32_AVX512VL-LABEL: fabs_v4f32: -; X32_AVX512VL: # BB#0: +; X32_AVX512VL: # %bb.0: ; X32_AVX512VL-NEXT: vpandd {{\.LCPI.*}}{1to4}, %xmm0, %xmm0 ; X32_AVX512VL-NEXT: retl ; ; X32_AVX512VLDQ-LABEL: fabs_v4f32: -; X32_AVX512VLDQ: # BB#0: +; X32_AVX512VLDQ: # %bb.0: ; X32_AVX512VLDQ-NEXT: vandps {{\.LCPI.*}}{1to4}, %xmm0, %xmm0 ; X32_AVX512VLDQ-NEXT: retl ; ; X64_AVX-LABEL: fabs_v4f32: -; X64_AVX: # BB#0: +; X64_AVX: # %bb.0: ; X64_AVX-NEXT: vandps {{.*}}(%rip), %xmm0, %xmm0 ; X64_AVX-NEXT: retq ; ; X64_AVX512VL-LABEL: fabs_v4f32: -; X64_AVX512VL: # BB#0: +; X64_AVX512VL: # %bb.0: ; X64_AVX512VL-NEXT: vpandd {{.*}}(%rip){1to4}, %xmm0, %xmm0 ; X64_AVX512VL-NEXT: retq ; ; X64_AVX512VLDQ-LABEL: fabs_v4f32: -; X64_AVX512VLDQ: # BB#0: +; X64_AVX512VLDQ: # %bb.0: ; X64_AVX512VLDQ-NEXT: vandps {{.*}}(%rip){1to4}, %xmm0, %xmm0 ; X64_AVX512VLDQ-NEXT: retq %t = call <4 x float> @llvm.fabs.v4f32(<4 x float> %p) @@ -81,32 +81,32 @@ declare <4 x float> @llvm.fabs.v4f32(<4 x float> %p) define <4 x double> @fabs_v4f64(<4 x double> %p) { ; X32_AVX-LABEL: fabs_v4f64: -; X32_AVX: # BB#0: +; X32_AVX: # %bb.0: ; X32_AVX-NEXT: vandps {{\.LCPI.*}}, %ymm0, %ymm0 ; X32_AVX-NEXT: retl ; ; X32_AVX512VL-LABEL: fabs_v4f64: -; X32_AVX512VL: # BB#0: +; X32_AVX512VL: # %bb.0: ; X32_AVX512VL-NEXT: vpandq {{\.LCPI.*}}{1to4}, %ymm0, %ymm0 ; X32_AVX512VL-NEXT: retl ; ; X32_AVX512VLDQ-LABEL: fabs_v4f64: -; X32_AVX512VLDQ: # BB#0: +; X32_AVX512VLDQ: # %bb.0: ; X32_AVX512VLDQ-NEXT: vandpd {{\.LCPI.*}}{1to4}, %ymm0, %ymm0 ; X32_AVX512VLDQ-NEXT: retl ; ; X64_AVX-LABEL: fabs_v4f64: -; X64_AVX: # BB#0: +; X64_AVX: # %bb.0: ; X64_AVX-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 ; X64_AVX-NEXT: retq ; ; X64_AVX512VL-LABEL: fabs_v4f64: -; X64_AVX512VL: # BB#0: +; X64_AVX512VL: # %bb.0: ; X64_AVX512VL-NEXT: vpandq {{.*}}(%rip){1to4}, %ymm0, %ymm0 ; X64_AVX512VL-NEXT: retq ; ; X64_AVX512VLDQ-LABEL: fabs_v4f64: -; X64_AVX512VLDQ: # BB#0: +; X64_AVX512VLDQ: # %bb.0: ; X64_AVX512VLDQ-NEXT: vandpd {{.*}}(%rip){1to4}, %ymm0, %ymm0 ; X64_AVX512VLDQ-NEXT: retq %t = call <4 x double> @llvm.fabs.v4f64(<4 x double> %p) @@ -116,32 +116,32 @@ declare <4 x double> @llvm.fabs.v4f64(<4 x double> %p) define <8 x float> @fabs_v8f32(<8 x float> %p) { ; X32_AVX-LABEL: fabs_v8f32: -; X32_AVX: # BB#0: +; X32_AVX: # %bb.0: ; X32_AVX-NEXT: vandps {{\.LCPI.*}}, %ymm0, %ymm0 ; X32_AVX-NEXT: retl ; ; X32_AVX512VL-LABEL: fabs_v8f32: -; X32_AVX512VL: # BB#0: +; X32_AVX512VL: # %bb.0: ; X32_AVX512VL-NEXT: vpandd {{\.LCPI.*}}{1to8}, %ymm0, %ymm0 ; X32_AVX512VL-NEXT: retl ; ; X32_AVX512VLDQ-LABEL: fabs_v8f32: -; X32_AVX512VLDQ: # BB#0: +; X32_AVX512VLDQ: # %bb.0: ; X32_AVX512VLDQ-NEXT: vandps {{\.LCPI.*}}{1to8}, %ymm0, %ymm0 ; X32_AVX512VLDQ-NEXT: retl ; ; X64_AVX-LABEL: fabs_v8f32: -; X64_AVX: # BB#0: +; X64_AVX: # %bb.0: ; X64_AVX-NEXT: vandps {{.*}}(%rip), %ymm0, %ymm0 ; X64_AVX-NEXT: retq ; ; X64_AVX512VL-LABEL: fabs_v8f32: -; X64_AVX512VL: # BB#0: +; X64_AVX512VL: # %bb.0: ; X64_AVX512VL-NEXT: vpandd {{.*}}(%rip){1to8}, %ymm0, %ymm0 ; X64_AVX512VL-NEXT: retq ; ; X64_AVX512VLDQ-LABEL: fabs_v8f32: -; X64_AVX512VLDQ: # BB#0: +; X64_AVX512VLDQ: # %bb.0: ; X64_AVX512VLDQ-NEXT: vandps {{.*}}(%rip){1to8}, %ymm0, %ymm0 ; X64_AVX512VLDQ-NEXT: retq %t = call <8 x float> @llvm.fabs.v8f32(<8 x float> %p) @@ -151,36 +151,36 @@ declare <8 x float> @llvm.fabs.v8f32(<8 x float> %p) define <8 x double> @fabs_v8f64(<8 x double> %p) { ; X32_AVX-LABEL: fabs_v8f64: -; X32_AVX: # BB#0: +; X32_AVX: # %bb.0: ; X32_AVX-NEXT: vmovaps {{.*#+}} ymm2 = [{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}}] ; X32_AVX-NEXT: vandps %ymm2, %ymm0, %ymm0 ; X32_AVX-NEXT: vandps %ymm2, %ymm1, %ymm1 ; X32_AVX-NEXT: retl ; ; X32_AVX512VL-LABEL: fabs_v8f64: -; X32_AVX512VL: # BB#0: +; X32_AVX512VL: # %bb.0: ; X32_AVX512VL-NEXT: vpandq {{\.LCPI.*}}{1to8}, %zmm0, %zmm0 ; X32_AVX512VL-NEXT: retl ; ; X32_AVX512VLDQ-LABEL: fabs_v8f64: -; X32_AVX512VLDQ: # BB#0: +; X32_AVX512VLDQ: # %bb.0: ; X32_AVX512VLDQ-NEXT: vandpd {{\.LCPI.*}}{1to8}, %zmm0, %zmm0 ; X32_AVX512VLDQ-NEXT: retl ; ; X64_AVX-LABEL: fabs_v8f64: -; X64_AVX: # BB#0: +; X64_AVX: # %bb.0: ; X64_AVX-NEXT: vmovaps {{.*#+}} ymm2 = [{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}}] ; X64_AVX-NEXT: vandps %ymm2, %ymm0, %ymm0 ; X64_AVX-NEXT: vandps %ymm2, %ymm1, %ymm1 ; X64_AVX-NEXT: retq ; ; X64_AVX512VL-LABEL: fabs_v8f64: -; X64_AVX512VL: # BB#0: +; X64_AVX512VL: # %bb.0: ; X64_AVX512VL-NEXT: vpandq {{.*}}(%rip){1to8}, %zmm0, %zmm0 ; X64_AVX512VL-NEXT: retq ; ; X64_AVX512VLDQ-LABEL: fabs_v8f64: -; X64_AVX512VLDQ: # BB#0: +; X64_AVX512VLDQ: # %bb.0: ; X64_AVX512VLDQ-NEXT: vandpd {{.*}}(%rip){1to8}, %zmm0, %zmm0 ; X64_AVX512VLDQ-NEXT: retq %t = call <8 x double> @llvm.fabs.v8f64(<8 x double> %p) @@ -190,36 +190,36 @@ declare <8 x double> @llvm.fabs.v8f64(<8 x double> %p) define <16 x float> @fabs_v16f32(<16 x float> %p) { ; X32_AVX-LABEL: fabs_v16f32: -; X32_AVX: # BB#0: +; X32_AVX: # %bb.0: ; X32_AVX-NEXT: vmovaps {{.*#+}} ymm2 = [{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}}] ; X32_AVX-NEXT: vandps %ymm2, %ymm0, %ymm0 ; X32_AVX-NEXT: vandps %ymm2, %ymm1, %ymm1 ; X32_AVX-NEXT: retl ; ; X32_AVX512VL-LABEL: fabs_v16f32: -; X32_AVX512VL: # BB#0: +; X32_AVX512VL: # %bb.0: ; X32_AVX512VL-NEXT: vpandd {{\.LCPI.*}}{1to16}, %zmm0, %zmm0 ; X32_AVX512VL-NEXT: retl ; ; X32_AVX512VLDQ-LABEL: fabs_v16f32: -; X32_AVX512VLDQ: # BB#0: +; X32_AVX512VLDQ: # %bb.0: ; X32_AVX512VLDQ-NEXT: vandps {{\.LCPI.*}}{1to16}, %zmm0, %zmm0 ; X32_AVX512VLDQ-NEXT: retl ; ; X64_AVX-LABEL: fabs_v16f32: -; X64_AVX: # BB#0: +; X64_AVX: # %bb.0: ; X64_AVX-NEXT: vmovaps {{.*#+}} ymm2 = [{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}},{{(nan|1\.#QNAN0e\+00)}}] ; X64_AVX-NEXT: vandps %ymm2, %ymm0, %ymm0 ; X64_AVX-NEXT: vandps %ymm2, %ymm1, %ymm1 ; X64_AVX-NEXT: retq ; ; X64_AVX512VL-LABEL: fabs_v16f32: -; X64_AVX512VL: # BB#0: +; X64_AVX512VL: # %bb.0: ; X64_AVX512VL-NEXT: vpandd {{.*}}(%rip){1to16}, %zmm0, %zmm0 ; X64_AVX512VL-NEXT: retq ; ; X64_AVX512VLDQ-LABEL: fabs_v16f32: -; X64_AVX512VLDQ: # BB#0: +; X64_AVX512VLDQ: # %bb.0: ; X64_AVX512VLDQ-NEXT: vandps {{.*}}(%rip){1to16}, %zmm0, %zmm0 ; X64_AVX512VLDQ-NEXT: retq %t = call <16 x float> @llvm.fabs.v16f32(<16 x float> %p) @@ -244,13 +244,13 @@ declare <16 x float> @llvm.fabs.v16f32(<16 x float> %p) define i64 @fabs_v2f32_1() { ; X32-LABEL: fabs_v2f32_1: -; X32: # BB#0: +; X32: # %bb.0: ; X32-NEXT: xorl %eax, %eax ; X32-NEXT: movl $2147483647, %edx # imm = 0x7FFFFFFF ; X32-NEXT: retl ; ; X64-LABEL: fabs_v2f32_1: -; X64: # BB#0: +; X64: # %bb.0: ; X64-NEXT: movabsq $9223372032559808512, %rax # imm = 0x7FFFFFFF00000000 ; X64-NEXT: retq %bitcast = bitcast i64 18446744069414584320 to <2 x float> ; 0xFFFF_FFFF_0000_0000 @@ -261,13 +261,13 @@ define i64 @fabs_v2f32_1() { define i64 @fabs_v2f32_2() { ; X32-LABEL: fabs_v2f32_2: -; X32: # BB#0: +; X32: # %bb.0: ; X32-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF ; X32-NEXT: xorl %edx, %edx ; X32-NEXT: retl ; ; X64-LABEL: fabs_v2f32_2: -; X64: # BB#0: +; X64: # %bb.0: ; X64-NEXT: movl $2147483647, %eax # imm = 0x7FFFFFFF ; X64-NEXT: retq %bitcast = bitcast i64 4294967295 to <2 x float> ; 0x0000_0000_FFFF_FFFF |
