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-rw-r--r--llvm/test/CodeGen/X86/sse42-schedule.ll172
1 files changed, 172 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/X86/sse42-schedule.ll b/llvm/test/CodeGen/X86/sse42-schedule.ll
index 7bb4ac6a995..088494b86dc 100644
--- a/llvm/test/CodeGen/X86/sse42-schedule.ll
+++ b/llvm/test/CodeGen/X86/sse42-schedule.ll
@@ -13,6 +13,8 @@
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SKYLAKE
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx -mattr=-avx | FileCheck %s --check-prefixes=CHECK,SKX-SSE
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,SKX
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+sse4.2,+pclmul -mattr=-avx | FileCheck %s --check-prefixes=CHECK,BDVER2-SSE
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+avx,+xop -mattr=+sse4.2,+pclmul -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BDVER2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 -mattr=-avx | FileCheck %s --check-prefixes=CHECK,BTVER2-SSE
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 -mattr=-avx2 | FileCheck %s --check-prefixes=CHECK,BTVER2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 -mattr=-avx | FileCheck %s --check-prefixes=CHECK,ZNVER1-SSE
@@ -103,6 +105,20 @@ define i32 @crc32_32_8(i32 %a0, i8 %a1, i8 *%a2) {
; SKX-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
+; BDVER2-SSE-LABEL: crc32_32_8:
+; BDVER2-SSE: # %bb.0:
+; BDVER2-SSE-NEXT: movl %edi, %eax # sched: [1:0.33]
+; BDVER2-SSE-NEXT: crc32b %sil, %eax # sched: [3:1.00]
+; BDVER2-SSE-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
+; BDVER2-SSE-NEXT: retq # sched: [1:1.00]
+;
+; BDVER2-LABEL: crc32_32_8:
+; BDVER2: # %bb.0:
+; BDVER2-NEXT: movl %edi, %eax # sched: [1:0.33]
+; BDVER2-NEXT: crc32b %sil, %eax # sched: [3:1.00]
+; BDVER2-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
+; BDVER2-NEXT: retq # sched: [1:1.00]
+;
; BTVER2-SSE-LABEL: crc32_32_8:
; BTVER2-SSE: # %bb.0:
; BTVER2-SSE-NEXT: movl %edi, %eax # sched: [1:0.50]
@@ -222,6 +238,20 @@ define i32 @crc32_32_16(i32 %a0, i16 %a1, i16 *%a2) {
; SKX-NEXT: crc32w (%rdx), %eax # sched: [8:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
+; BDVER2-SSE-LABEL: crc32_32_16:
+; BDVER2-SSE: # %bb.0:
+; BDVER2-SSE-NEXT: movl %edi, %eax # sched: [1:0.33]
+; BDVER2-SSE-NEXT: crc32w %si, %eax # sched: [3:1.00]
+; BDVER2-SSE-NEXT: crc32w (%rdx), %eax # sched: [8:1.00]
+; BDVER2-SSE-NEXT: retq # sched: [1:1.00]
+;
+; BDVER2-LABEL: crc32_32_16:
+; BDVER2: # %bb.0:
+; BDVER2-NEXT: movl %edi, %eax # sched: [1:0.33]
+; BDVER2-NEXT: crc32w %si, %eax # sched: [3:1.00]
+; BDVER2-NEXT: crc32w (%rdx), %eax # sched: [8:1.00]
+; BDVER2-NEXT: retq # sched: [1:1.00]
+;
; BTVER2-SSE-LABEL: crc32_32_16:
; BTVER2-SSE: # %bb.0:
; BTVER2-SSE-NEXT: movl %edi, %eax # sched: [1:0.50]
@@ -341,6 +371,20 @@ define i32 @crc32_32_32(i32 %a0, i32 %a1, i32 *%a2) {
; SKX-NEXT: crc32l (%rdx), %eax # sched: [8:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
+; BDVER2-SSE-LABEL: crc32_32_32:
+; BDVER2-SSE: # %bb.0:
+; BDVER2-SSE-NEXT: movl %edi, %eax # sched: [1:0.33]
+; BDVER2-SSE-NEXT: crc32l %esi, %eax # sched: [3:1.00]
+; BDVER2-SSE-NEXT: crc32l (%rdx), %eax # sched: [8:1.00]
+; BDVER2-SSE-NEXT: retq # sched: [1:1.00]
+;
+; BDVER2-LABEL: crc32_32_32:
+; BDVER2: # %bb.0:
+; BDVER2-NEXT: movl %edi, %eax # sched: [1:0.33]
+; BDVER2-NEXT: crc32l %esi, %eax # sched: [3:1.00]
+; BDVER2-NEXT: crc32l (%rdx), %eax # sched: [8:1.00]
+; BDVER2-NEXT: retq # sched: [1:1.00]
+;
; BTVER2-SSE-LABEL: crc32_32_32:
; BTVER2-SSE: # %bb.0:
; BTVER2-SSE-NEXT: movl %edi, %eax # sched: [1:0.50]
@@ -460,6 +504,20 @@ define i64 @crc32_64_8(i64 %a0, i8 %a1, i8 *%a2) nounwind {
; SKX-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
+; BDVER2-SSE-LABEL: crc32_64_8:
+; BDVER2-SSE: # %bb.0:
+; BDVER2-SSE-NEXT: movq %rdi, %rax # sched: [1:0.33]
+; BDVER2-SSE-NEXT: crc32b %sil, %eax # sched: [3:1.00]
+; BDVER2-SSE-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
+; BDVER2-SSE-NEXT: retq # sched: [1:1.00]
+;
+; BDVER2-LABEL: crc32_64_8:
+; BDVER2: # %bb.0:
+; BDVER2-NEXT: movq %rdi, %rax # sched: [1:0.33]
+; BDVER2-NEXT: crc32b %sil, %eax # sched: [3:1.00]
+; BDVER2-NEXT: crc32b (%rdx), %eax # sched: [8:1.00]
+; BDVER2-NEXT: retq # sched: [1:1.00]
+;
; BTVER2-SSE-LABEL: crc32_64_8:
; BTVER2-SSE: # %bb.0:
; BTVER2-SSE-NEXT: movq %rdi, %rax # sched: [1:0.50]
@@ -579,6 +637,20 @@ define i64 @crc32_64_64(i64 %a0, i64 %a1, i64 *%a2) {
; SKX-NEXT: crc32q (%rdx), %rax # sched: [8:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
+; BDVER2-SSE-LABEL: crc32_64_64:
+; BDVER2-SSE: # %bb.0:
+; BDVER2-SSE-NEXT: movq %rdi, %rax # sched: [1:0.33]
+; BDVER2-SSE-NEXT: crc32q %rsi, %rax # sched: [3:1.00]
+; BDVER2-SSE-NEXT: crc32q (%rdx), %rax # sched: [8:1.00]
+; BDVER2-SSE-NEXT: retq # sched: [1:1.00]
+;
+; BDVER2-LABEL: crc32_64_64:
+; BDVER2: # %bb.0:
+; BDVER2-NEXT: movq %rdi, %rax # sched: [1:0.33]
+; BDVER2-NEXT: crc32q %rsi, %rax # sched: [3:1.00]
+; BDVER2-NEXT: crc32q (%rdx), %rax # sched: [8:1.00]
+; BDVER2-NEXT: retq # sched: [1:1.00]
+;
; BTVER2-SSE-LABEL: crc32_64_64:
; BTVER2-SSE: # %bb.0:
; BTVER2-SSE-NEXT: movq %rdi, %rax # sched: [1:0.50]
@@ -770,6 +842,32 @@ define i32 @test_pcmpestri(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> *%a2) {
; SKX-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
; SKX-NEXT: retq # sched: [7:1.00]
;
+; BDVER2-SSE-LABEL: test_pcmpestri:
+; BDVER2-SSE: # %bb.0:
+; BDVER2-SSE-NEXT: movl $7, %eax # sched: [1:0.33]
+; BDVER2-SSE-NEXT: movl $7, %edx # sched: [1:0.33]
+; BDVER2-SSE-NEXT: pcmpestri $7, %xmm1, %xmm0 # sched: [4:2.67]
+; BDVER2-SSE-NEXT: movl %ecx, %esi # sched: [1:0.33]
+; BDVER2-SSE-NEXT: movl $7, %eax # sched: [1:0.33]
+; BDVER2-SSE-NEXT: movl $7, %edx # sched: [1:0.33]
+; BDVER2-SSE-NEXT: pcmpestri $7, (%rdi), %xmm0 # sched: [4:2.33]
+; BDVER2-SSE-NEXT: # kill: def $ecx killed $ecx def $rcx
+; BDVER2-SSE-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
+; BDVER2-SSE-NEXT: retq # sched: [1:1.00]
+;
+; BDVER2-LABEL: test_pcmpestri:
+; BDVER2: # %bb.0:
+; BDVER2-NEXT: movl $7, %eax # sched: [1:0.33]
+; BDVER2-NEXT: movl $7, %edx # sched: [1:0.33]
+; BDVER2-NEXT: vpcmpestri $7, %xmm1, %xmm0 # sched: [4:2.67]
+; BDVER2-NEXT: movl %ecx, %esi # sched: [1:0.33]
+; BDVER2-NEXT: movl $7, %eax # sched: [1:0.33]
+; BDVER2-NEXT: movl $7, %edx # sched: [1:0.33]
+; BDVER2-NEXT: vpcmpestri $7, (%rdi), %xmm0 # sched: [4:2.33]
+; BDVER2-NEXT: # kill: def $ecx killed $ecx def $rcx
+; BDVER2-NEXT: leal (%rcx,%rsi), %eax # sched: [1:0.50]
+; BDVER2-NEXT: retq # sched: [1:1.00]
+;
; BTVER2-SSE-LABEL: test_pcmpestri:
; BTVER2-SSE: # %bb.0:
; BTVER2-SSE-NEXT: movl $7, %eax # sched: [1:0.50]
@@ -950,6 +1048,26 @@ define <16 x i8> @test_pcmpestrm(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> *%a2) {
; SKX-NEXT: vpcmpestrm $7, (%rdi), %xmm0 # sched: [25:4.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
+; BDVER2-SSE-LABEL: test_pcmpestrm:
+; BDVER2-SSE: # %bb.0:
+; BDVER2-SSE-NEXT: movl $7, %eax # sched: [1:0.33]
+; BDVER2-SSE-NEXT: movl $7, %edx # sched: [1:0.33]
+; BDVER2-SSE-NEXT: pcmpestrm $7, %xmm1, %xmm0 # sched: [11:2.67]
+; BDVER2-SSE-NEXT: movl $7, %eax # sched: [1:0.33]
+; BDVER2-SSE-NEXT: movl $7, %edx # sched: [1:0.33]
+; BDVER2-SSE-NEXT: pcmpestrm $7, (%rdi), %xmm0 # sched: [11:2.33]
+; BDVER2-SSE-NEXT: retq # sched: [1:1.00]
+;
+; BDVER2-LABEL: test_pcmpestrm:
+; BDVER2: # %bb.0:
+; BDVER2-NEXT: movl $7, %eax # sched: [1:0.33]
+; BDVER2-NEXT: movl $7, %edx # sched: [1:0.33]
+; BDVER2-NEXT: vpcmpestrm $7, %xmm1, %xmm0 # sched: [11:2.67]
+; BDVER2-NEXT: movl $7, %eax # sched: [1:0.33]
+; BDVER2-NEXT: movl $7, %edx # sched: [1:0.33]
+; BDVER2-NEXT: vpcmpestrm $7, (%rdi), %xmm0 # sched: [11:2.33]
+; BDVER2-NEXT: retq # sched: [1:1.00]
+;
; BTVER2-SSE-LABEL: test_pcmpestrm:
; BTVER2-SSE: # %bb.0:
; BTVER2-SSE-NEXT: movl $7, %eax # sched: [1:0.50]
@@ -1105,6 +1223,24 @@ define i32 @test_pcmpistri(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> *%a2) {
; SKX-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
; SKX-NEXT: retq # sched: [7:1.00]
;
+; BDVER2-SSE-LABEL: test_pcmpistri:
+; BDVER2-SSE: # %bb.0:
+; BDVER2-SSE-NEXT: pcmpistri $7, %xmm1, %xmm0 # sched: [11:3.00]
+; BDVER2-SSE-NEXT: movl %ecx, %eax # sched: [1:0.33]
+; BDVER2-SSE-NEXT: pcmpistri $7, (%rdi), %xmm0 # sched: [17:3.00]
+; BDVER2-SSE-NEXT: # kill: def $ecx killed $ecx def $rcx
+; BDVER2-SSE-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
+; BDVER2-SSE-NEXT: retq # sched: [1:1.00]
+;
+; BDVER2-LABEL: test_pcmpistri:
+; BDVER2: # %bb.0:
+; BDVER2-NEXT: vpcmpistri $7, %xmm1, %xmm0 # sched: [11:3.00]
+; BDVER2-NEXT: movl %ecx, %eax # sched: [1:0.33]
+; BDVER2-NEXT: vpcmpistri $7, (%rdi), %xmm0 # sched: [17:3.00]
+; BDVER2-NEXT: # kill: def $ecx killed $ecx def $rcx
+; BDVER2-NEXT: leal (%rcx,%rax), %eax # sched: [1:0.50]
+; BDVER2-NEXT: retq # sched: [1:1.00]
+;
; BTVER2-SSE-LABEL: test_pcmpistri:
; BTVER2-SSE: # %bb.0:
; BTVER2-SSE-NEXT: pcmpistri $7, %xmm1, %xmm0 # sched: [7:2.00]
@@ -1221,6 +1357,18 @@ define <16 x i8> @test_pcmpistrm(<16 x i8> %a0, <16 x i8> %a1, <16 x i8> *%a2) {
; SKX-NEXT: vpcmpistrm $7, (%rdi), %xmm0 # sched: [16:3.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
+; BDVER2-SSE-LABEL: test_pcmpistrm:
+; BDVER2-SSE: # %bb.0:
+; BDVER2-SSE-NEXT: pcmpistrm $7, %xmm1, %xmm0 # sched: [11:3.00]
+; BDVER2-SSE-NEXT: pcmpistrm $7, (%rdi), %xmm0 # sched: [17:3.00]
+; BDVER2-SSE-NEXT: retq # sched: [1:1.00]
+;
+; BDVER2-LABEL: test_pcmpistrm:
+; BDVER2: # %bb.0:
+; BDVER2-NEXT: vpcmpistrm $7, %xmm1, %xmm0 # sched: [11:3.00]
+; BDVER2-NEXT: vpcmpistrm $7, (%rdi), %xmm0 # sched: [17:3.00]
+; BDVER2-NEXT: retq # sched: [1:1.00]
+;
; BTVER2-SSE-LABEL: test_pcmpistrm:
; BTVER2-SSE: # %bb.0:
; BTVER2-SSE-NEXT: pcmpistrm $7, %xmm1, %xmm0 # sched: [8:2.00]
@@ -1324,6 +1472,18 @@ define <2 x i64> @test_pcmpgtq(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> *%a2) {
; SKX-NEXT: vpcmpgtq (%rdi), %xmm0, %xmm0 # sched: [9:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
+; BDVER2-SSE-LABEL: test_pcmpgtq:
+; BDVER2-SSE: # %bb.0:
+; BDVER2-SSE-NEXT: pcmpgtq %xmm1, %xmm0 # sched: [5:1.00]
+; BDVER2-SSE-NEXT: pcmpgtq (%rdi), %xmm0 # sched: [11:1.00]
+; BDVER2-SSE-NEXT: retq # sched: [1:1.00]
+;
+; BDVER2-LABEL: test_pcmpgtq:
+; BDVER2: # %bb.0:
+; BDVER2-NEXT: vpcomgtq %xmm1, %xmm0, %xmm0 # sched: [1:0.50]
+; BDVER2-NEXT: vpcomgtq (%rdi), %xmm0, %xmm0 # sched: [7:0.50]
+; BDVER2-NEXT: retq # sched: [1:1.00]
+;
; BTVER2-SSE-LABEL: test_pcmpgtq:
; BTVER2-SSE: # %bb.0:
; BTVER2-SSE-NEXT: pcmpgtq %xmm1, %xmm0 # sched: [1:0.50]
@@ -1428,6 +1588,18 @@ define <2 x i64> @test_pclmulqdq(<2 x i64> %a0, <2 x i64> %a1, <2 x i64> *%a2) {
; SKX-NEXT: vpclmulqdq $0, (%rdi), %xmm0, %xmm0 # sched: [12:1.00]
; SKX-NEXT: retq # sched: [7:1.00]
;
+; BDVER2-SSE-LABEL: test_pclmulqdq:
+; BDVER2-SSE: # %bb.0:
+; BDVER2-SSE-NEXT: pclmulqdq $0, %xmm1, %xmm0 # sched: [14:6.00]
+; BDVER2-SSE-NEXT: pclmulqdq $0, (%rdi), %xmm0 # sched: [14:5.67]
+; BDVER2-SSE-NEXT: retq # sched: [1:1.00]
+;
+; BDVER2-LABEL: test_pclmulqdq:
+; BDVER2: # %bb.0:
+; BDVER2-NEXT: vpclmulqdq $0, %xmm1, %xmm0, %xmm0 # sched: [14:6.00]
+; BDVER2-NEXT: vpclmulqdq $0, (%rdi), %xmm0, %xmm0 # sched: [14:5.67]
+; BDVER2-NEXT: retq # sched: [1:1.00]
+;
; BTVER2-SSE-LABEL: test_pclmulqdq:
; BTVER2-SSE: # %bb.0:
; BTVER2-SSE-NEXT: pclmulqdq $0, %xmm1, %xmm0 # sched: [2:1.00]
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