1 files changed, 1 insertions, 15 deletions
diff --git a/llvm/test/CodeGen/X86/select-with-and-or.ll b/llvm/test/CodeGen/X86/select-with-and-or.ll
index f49da8576d1..45e4384d0fa 100644
--- a/llvm/test/CodeGen/X86/select-with-and-or.ll
+++ b/llvm/test/CodeGen/X86/select-with-and-or.ll
@@ -1,4 +1,4 @@
-; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s
 
 define <4 x i32> @test1(<4 x float> %a, <4 x float> %b, <4 x i32> %c) {
@@ -7,7 +7,6 @@ define <4 x i32> @test1(<4 x float> %a, <4 x float> %b, <4 x i32> %c) {
 ; CHECK-NEXT:    vcmpnleps %xmm0, %xmm1, %xmm0
 ; CHECK-NEXT:    vandps %xmm2, %xmm0, %xmm0
 ; CHECK-NEXT:    retq
-;
   %f = fcmp ult <4 x float> %a, %b
   %r = select <4 x i1> %f, <4 x i32> %c, <4 x i32> zeroinitializer
   ret <4 x i32> %r
@@ -19,7 +18,6 @@ define <4 x i32> @test2(<4 x float> %a, <4 x float> %b, <4 x i32> %c) {
 ; CHECK-NEXT:    vcmpnleps %xmm0, %xmm1, %xmm0
 ; CHECK-NEXT:    vorps %xmm2, %xmm0, %xmm0
 ; CHECK-NEXT:    retq
-;
   %f = fcmp ult <4 x float> %a, %b
   %r = select <4 x i1> %f, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>, <4 x i32> %c
   ret <4 x i32> %r
@@ -31,7 +29,6 @@ define <4 x i32> @test3(<4 x float> %a, <4 x float> %b, <4 x i32> %c) {
 ; CHECK-NEXT:    vcmpleps %xmm0, %xmm1, %xmm0
 ; CHECK-NEXT:    vandps %xmm2, %xmm0, %xmm0
 ; CHECK-NEXT:    retq
-;
   %f = fcmp ult <4 x float> %a, %b
   %r = select <4 x i1> %f, <4 x i32> zeroinitializer, <4 x i32> %c
   ret <4 x i32> %r
@@ -43,7 +40,6 @@ define <4 x i32> @test4(<4 x float> %a, <4 x float> %b, <4 x i32> %c) {
 ; CHECK-NEXT:    vcmpleps %xmm0, %xmm1, %xmm0
 ; CHECK-NEXT:    vorps %xmm2, %xmm0, %xmm0
 ; CHECK-NEXT:    retq
-;
   %f = fcmp ult <4 x float> %a, %b
   %r = select <4 x i1> %f, <4 x i32> %c, <4 x i32> <i32 -1, i32 -1, i32 -1, i32 -1>
   ret <4 x i32> %r
@@ -54,7 +50,6 @@ define <4 x i32> @test5(<4 x float> %a, <4 x float> %b, <4 x i32> %c) {
 ; CHECK:       # BB#0:
 ; CHECK-NEXT:    vcmpnleps %xmm0, %xmm1, %xmm0
 ; CHECK-NEXT:    retq
-;
   %f = fcmp ult <4 x float> %a, %b
   %r = sext <4 x i1> %f to <4 x i32>
   ret <4 x i32> %r
@@ -65,7 +60,6 @@ define <4 x i32> @test6(<4 x float> %a, <4 x float> %b, <4 x i32> %c) {
 ; CHECK:       # BB#0:
 ; CHECK-NEXT:    vcmpleps %xmm0, %xmm1, %xmm0
 ; CHECK-NEXT:    retq
-;
   %not.f = fcmp oge <4 x float> %a, %b
   %r = sext <4 x i1> %not.f to <4 x i32>
   ret <4 x i32> %r
@@ -77,7 +71,6 @@ define <4 x i32> @test7(<4 x float> %a, <4 x float> %b, <4 x i32>* %p) {
 ; CHECK-NEXT:    vcmpnleps %xmm0, %xmm1, %xmm0
 ; CHECK-NEXT:    vandps (%rdi), %xmm0, %xmm0
 ; CHECK-NEXT:    retq
-;
   %f = fcmp ult <4 x float> %a, %b
   %l = load <4 x i32>, <4 x i32>* %p, align 16
   %r = select <4 x i1> %f, <4 x i32> %l, <4 x i32> zeroinitializer
@@ -92,7 +85,6 @@ define <2 x double> @test1f(<2 x double> %a, <2 x double> %b, <2 x double> %c) {
 ; CHECK-NEXT:    vcmpltpd %xmm0, %xmm1, %xmm0
 ; CHECK-NEXT:    vandpd %xmm2, %xmm0, %xmm0
 ; CHECK-NEXT:    retq
-;
   %f = fcmp ogt <2 x double> %a, %b
   %r = select <2 x i1> %f, <2 x double> %c, <2 x double> zeroinitializer
   ret <2 x double> %r
@@ -104,7 +96,6 @@ define <2 x double> @test2f(<2 x double> %a, <2 x double> %b, <2 x double> %c) {
 ; CHECK-NEXT:    vcmplepd %xmm0, %xmm1, %xmm0
 ; CHECK-NEXT:    vorpd %xmm2, %xmm0, %xmm0
 ; CHECK-NEXT:    retq
-;
   %f = fcmp oge <2 x double> %a, %b
   %r = select <2 x i1> %f, <2 x double> <double 0xffffffffffffffff, double 0xffffffffffffffff>, <2 x double> %c
   ret <2 x double> %r
@@ -116,7 +107,6 @@ define <2 x double> @test3f(<2 x double> %a, <2 x double> %b, <2 x double> %c) {
 ; CHECK-NEXT:    vcmpnltpd %xmm1, %xmm0, %xmm0
 ; CHECK-NEXT:    vandpd %xmm2, %xmm0, %xmm0
 ; CHECK-NEXT:    retq
-;
   %f = fcmp olt <2 x double> %a, %b
   %r = select <2 x i1> %f, <2 x double> zeroinitializer, <2 x double> %c
   ret <2 x double> %r
@@ -128,7 +118,6 @@ define <2 x double> @test4f(<2 x double> %a, <2 x double> %b, <2 x double> %c) {
 ; CHECK-NEXT:    vcmpnlepd %xmm1, %xmm0, %xmm0
 ; CHECK-NEXT:    vorpd %xmm2, %xmm0, %xmm0
 ; CHECK-NEXT:    retq
-;
   %f = fcmp ole <2 x double> %a, %b
   %r = select <2 x i1> %f, <2 x double> %c, <2 x double> <double 0xffffffffffffffff, double 0xffffffffffffffff>
   ret <2 x double> %r
@@ -139,7 +128,6 @@ define <2 x double> @test5f(<2 x double> %a, <2 x double> %b, <2 x double> %c) {
 ; CHECK:       # BB#0:
 ; CHECK-NEXT:    vcmpnlepd %xmm1, %xmm0, %xmm0
 ; CHECK-NEXT:    retq
-;
   %f = fcmp ugt <2 x double> %a, %b
   %r = select <2 x i1> %f, <2 x double> <double 0xffffffffffffffff, double 0xffffffffffffffff>, <2 x double> zeroinitializer
   ret <2 x double> %r
@@ -150,7 +138,6 @@ define <2 x double> @test6f(<2 x double> %a, <2 x double> %b, <2 x double> %c) {
 ; CHECK:       # BB#0:
 ; CHECK-NEXT:    vcmpltpd %xmm0, %xmm1, %xmm0
 ; CHECK-NEXT:    retq
-;
   %f = fcmp ule <2 x double> %a, %b
   %r = select <2 x i1> %f, <2 x double> zeroinitializer, <2 x double> <double 0xffffffffffffffff, double 0xffffffffffffffff>
   ret <2 x double> %r
@@ -162,7 +149,6 @@ define <2 x double> @test7f(<2 x double> %a, <2 x double> %b, <2 x double>* %p)
 ; CHECK-NEXT:    vcmpeqpd %xmm1, %xmm0, %xmm0
 ; CHECK-NEXT:    vandpd (%rdi), %xmm0, %xmm0
 ; CHECK-NEXT:    retq
-;
   %f = fcmp oeq <2 x double> %a, %b
   %l = load <2 x double>, <2 x double>* %p, align 16
   %r = select <2 x i1> %f, <2 x double> %l, <2 x double> zeroinitializer