diff options
Diffstat (limited to 'llvm/test/CodeGen/X86/schedule-x86-64-shld.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/schedule-x86-64-shld.ll | 227 |
1 files changed, 114 insertions, 113 deletions
diff --git a/llvm/test/CodeGen/X86/schedule-x86-64-shld.ll b/llvm/test/CodeGen/X86/schedule-x86-64-shld.ll index 46388d7b4fd..a2e280126b4 100644 --- a/llvm/test/CodeGen/X86/schedule-x86-64-shld.ll +++ b/llvm/test/CodeGen/X86/schedule-x86-64-shld.ll @@ -1,7 +1,8 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+avx -mattr=+slow-shld | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER12 --check-prefix=BDVER1 +; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+avx -mattr=+slow-shld | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER12 --check-prefix=BDVER2 ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=btver2 | FileCheck %s --check-prefix=CHECK --check-prefix=BTVER2 -; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=bdver1 | FileCheck %s --check-prefix=CHECK --check-prefix=BDVER1 ; uint64_t lshift10(uint64_t a, uint64_t b) @@ -16,17 +17,17 @@ define i64 @lshift10_optsize(i64 %a, i64 %b) nounwind readnone optsize { ; GENERIC-NEXT: shldq $10, %rsi, %rax # sched: [2:0.67] ; GENERIC-NEXT: retq # sched: [1:1.00] ; +; BDVER12-LABEL: lshift10_optsize: +; BDVER12: # %bb.0: # %entry +; BDVER12-NEXT: movq %rdi, %rax # sched: [1:0.33] +; BDVER12-NEXT: shldq $10, %rsi, %rax # sched: [2:0.67] +; BDVER12-NEXT: retq # sched: [1:1.00] +; ; BTVER2-LABEL: lshift10_optsize: ; BTVER2: # %bb.0: # %entry ; BTVER2-NEXT: movq %rdi, %rax # sched: [1:0.50] ; BTVER2-NEXT: shldq $10, %rsi, %rax # sched: [3:3.00] ; BTVER2-NEXT: retq # sched: [4:1.00] -; -; BDVER1-LABEL: lshift10_optsize: -; BDVER1: # %bb.0: # %entry -; BDVER1-NEXT: movq %rdi, %rax -; BDVER1-NEXT: shldq $10, %rsi, %rax -; BDVER1-NEXT: retq entry: %shl = shl i64 %a, 10 %shr = lshr i64 %b, 54 @@ -41,19 +42,19 @@ define i64 @lshift10(i64 %a, i64 %b) nounwind readnone { ; GENERIC-NEXT: shldq $10, %rsi, %rax # sched: [2:0.67] ; GENERIC-NEXT: retq # sched: [1:1.00] ; +; BDVER12-LABEL: lshift10: +; BDVER12: # %bb.0: # %entry +; BDVER12-NEXT: shlq $10, %rdi # sched: [1:0.50] +; BDVER12-NEXT: shrq $54, %rsi # sched: [1:0.50] +; BDVER12-NEXT: leaq (%rsi,%rdi), %rax # sched: [1:0.50] +; BDVER12-NEXT: retq # sched: [1:1.00] +; ; BTVER2-LABEL: lshift10: ; BTVER2: # %bb.0: # %entry ; BTVER2-NEXT: shlq $10, %rdi # sched: [1:0.50] ; BTVER2-NEXT: shrq $54, %rsi # sched: [1:0.50] ; BTVER2-NEXT: leaq (%rsi,%rdi), %rax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] -; -; BDVER1-LABEL: lshift10: -; BDVER1: # %bb.0: # %entry -; BDVER1-NEXT: shlq $10, %rdi -; BDVER1-NEXT: shrq $54, %rsi -; BDVER1-NEXT: leaq (%rsi,%rdi), %rax -; BDVER1-NEXT: retq entry: %shl = shl i64 %a, 10 %shr = lshr i64 %b, 54 @@ -74,17 +75,17 @@ define i64 @rshift10_optsize(i64 %a, i64 %b) nounwind readnone optsize { ; GENERIC-NEXT: shrdq $62, %rsi, %rax # sched: [2:0.67] ; GENERIC-NEXT: retq # sched: [1:1.00] ; +; BDVER12-LABEL: rshift10_optsize: +; BDVER12: # %bb.0: # %entry +; BDVER12-NEXT: movq %rdi, %rax # sched: [1:0.33] +; BDVER12-NEXT: shrdq $62, %rsi, %rax # sched: [2:0.67] +; BDVER12-NEXT: retq # sched: [1:1.00] +; ; BTVER2-LABEL: rshift10_optsize: ; BTVER2: # %bb.0: # %entry ; BTVER2-NEXT: movq %rdi, %rax # sched: [1:0.50] ; BTVER2-NEXT: shrdq $62, %rsi, %rax # sched: [3:3.00] ; BTVER2-NEXT: retq # sched: [4:1.00] -; -; BDVER1-LABEL: rshift10_optsize: -; BDVER1: # %bb.0: # %entry -; BDVER1-NEXT: movq %rdi, %rax -; BDVER1-NEXT: shrdq $62, %rsi, %rax -; BDVER1-NEXT: retq entry: %shl = lshr i64 %a, 62 %shr = shl i64 %b, 2 @@ -100,17 +101,17 @@ define i64 @rshift10(i64 %a, i64 %b) nounwind readnone { ; GENERIC-NEXT: shrdq $62, %rsi, %rax # sched: [2:0.67] ; GENERIC-NEXT: retq # sched: [1:1.00] ; +; BDVER12-LABEL: rshift10: +; BDVER12: # %bb.0: # %entry +; BDVER12-NEXT: shrq $62, %rdi # sched: [1:0.50] +; BDVER12-NEXT: leaq (%rdi,%rsi,4), %rax # sched: [1:0.50] +; BDVER12-NEXT: retq # sched: [1:1.00] +; ; BTVER2-LABEL: rshift10: ; BTVER2: # %bb.0: # %entry ; BTVER2-NEXT: shrq $62, %rdi # sched: [1:0.50] ; BTVER2-NEXT: leaq (%rdi,%rsi,4), %rax # sched: [2:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00] -; -; BDVER1-LABEL: rshift10: -; BDVER1: # %bb.0: # %entry -; BDVER1-NEXT: shrq $62, %rdi -; BDVER1-NEXT: leaq (%rdi,%rsi,4), %rax -; BDVER1-NEXT: retq entry: %shl = lshr i64 %a, 62 %shr = shl i64 %b, 2 @@ -132,6 +133,14 @@ define i64 @lshift_cl_optsize(i64 %a, i64 %b, i64 %c) nounwind readnone optsize ; GENERIC-NEXT: shldq %cl, %rsi, %rax # sched: [4:1.50] ; GENERIC-NEXT: retq # sched: [1:1.00] ; +; BDVER12-LABEL: lshift_cl_optsize: +; BDVER12: # %bb.0: # %entry +; BDVER12-NEXT: movq %rdx, %rcx # sched: [1:0.33] +; BDVER12-NEXT: movq %rdi, %rax # sched: [1:0.33] +; BDVER12-NEXT: # kill: def $cl killed $cl killed $rcx +; BDVER12-NEXT: shldq %cl, %rsi, %rax # sched: [4:1.50] +; BDVER12-NEXT: retq # sched: [1:1.00] +; ; BTVER2-LABEL: lshift_cl_optsize: ; BTVER2: # %bb.0: # %entry ; BTVER2-NEXT: movq %rdx, %rcx # sched: [1:0.50] @@ -139,14 +148,6 @@ define i64 @lshift_cl_optsize(i64 %a, i64 %b, i64 %c) nounwind readnone optsize ; BTVER2-NEXT: # kill: def $cl killed $cl killed $rcx ; BTVER2-NEXT: shldq %cl, %rsi, %rax # sched: [4:4.00] ; BTVER2-NEXT: retq # sched: [4:1.00] -; -; BDVER1-LABEL: lshift_cl_optsize: -; BDVER1: # %bb.0: # %entry -; BDVER1-NEXT: movq %rdx, %rcx -; BDVER1-NEXT: movq %rdi, %rax -; BDVER1-NEXT: # kill: def $cl killed $cl killed $rcx -; BDVER1-NEXT: shldq %cl, %rsi, %rax -; BDVER1-NEXT: retq entry: %shl = shl i64 %a, %c %sub = sub nsw i64 64, %c @@ -164,6 +165,17 @@ define i64 @lshift_cl(i64 %a, i64 %b, i64 %c) nounwind readnone { ; GENERIC-NEXT: shldq %cl, %rsi, %rax # sched: [4:1.50] ; GENERIC-NEXT: retq # sched: [1:1.00] ; +; BDVER12-LABEL: lshift_cl: +; BDVER12: # %bb.0: # %entry +; BDVER12-NEXT: movq %rdx, %rcx # sched: [1:0.33] +; BDVER12-NEXT: movq %rsi, %rax # sched: [1:0.33] +; BDVER12-NEXT: shlq %cl, %rdi # sched: [3:1.50] +; BDVER12-NEXT: negl %ecx # sched: [1:0.33] +; BDVER12-NEXT: # kill: def $cl killed $cl killed $rcx +; BDVER12-NEXT: shrq %cl, %rax # sched: [3:1.50] +; BDVER12-NEXT: orq %rdi, %rax # sched: [1:0.33] +; BDVER12-NEXT: retq # sched: [1:1.00] +; ; BTVER2-LABEL: lshift_cl: ; BTVER2: # %bb.0: # %entry ; BTVER2-NEXT: movq %rdx, %rcx # sched: [1:0.50] @@ -174,17 +186,6 @@ define i64 @lshift_cl(i64 %a, i64 %b, i64 %c) nounwind readnone { ; BTVER2-NEXT: shrq %cl, %rax # sched: [1:0.50] ; BTVER2-NEXT: orq %rdi, %rax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] -; -; BDVER1-LABEL: lshift_cl: -; BDVER1: # %bb.0: # %entry -; BDVER1-NEXT: movq %rdx, %rcx -; BDVER1-NEXT: movq %rsi, %rax -; BDVER1-NEXT: shlq %cl, %rdi -; BDVER1-NEXT: negl %ecx -; BDVER1-NEXT: # kill: def $cl killed $cl killed $rcx -; BDVER1-NEXT: shrq %cl, %rax -; BDVER1-NEXT: orq %rdi, %rax -; BDVER1-NEXT: retq entry: %shl = shl i64 %a, %c %sub = sub nsw i64 64, %c @@ -208,6 +209,14 @@ define i64 @rshift_cl_optsize(i64 %a, i64 %b, i64 %c) nounwind readnone optsize ; GENERIC-NEXT: shrdq %cl, %rsi, %rax # sched: [4:1.50] ; GENERIC-NEXT: retq # sched: [1:1.00] ; +; BDVER12-LABEL: rshift_cl_optsize: +; BDVER12: # %bb.0: # %entry +; BDVER12-NEXT: movq %rdx, %rcx # sched: [1:0.33] +; BDVER12-NEXT: movq %rdi, %rax # sched: [1:0.33] +; BDVER12-NEXT: # kill: def $cl killed $cl killed $rcx +; BDVER12-NEXT: shrdq %cl, %rsi, %rax # sched: [4:1.50] +; BDVER12-NEXT: retq # sched: [1:1.00] +; ; BTVER2-LABEL: rshift_cl_optsize: ; BTVER2: # %bb.0: # %entry ; BTVER2-NEXT: movq %rdx, %rcx # sched: [1:0.50] @@ -215,14 +224,6 @@ define i64 @rshift_cl_optsize(i64 %a, i64 %b, i64 %c) nounwind readnone optsize ; BTVER2-NEXT: # kill: def $cl killed $cl killed $rcx ; BTVER2-NEXT: shrdq %cl, %rsi, %rax # sched: [4:4.00] ; BTVER2-NEXT: retq # sched: [4:1.00] -; -; BDVER1-LABEL: rshift_cl_optsize: -; BDVER1: # %bb.0: # %entry -; BDVER1-NEXT: movq %rdx, %rcx -; BDVER1-NEXT: movq %rdi, %rax -; BDVER1-NEXT: # kill: def $cl killed $cl killed $rcx -; BDVER1-NEXT: shrdq %cl, %rsi, %rax -; BDVER1-NEXT: retq entry: %shr = lshr i64 %a, %c %sub = sub nsw i64 64, %c @@ -240,6 +241,17 @@ define i64 @rshift_cl(i64 %a, i64 %b, i64 %c) nounwind readnone { ; GENERIC-NEXT: shrdq %cl, %rsi, %rax # sched: [4:1.50] ; GENERIC-NEXT: retq # sched: [1:1.00] ; +; BDVER12-LABEL: rshift_cl: +; BDVER12: # %bb.0: # %entry +; BDVER12-NEXT: movq %rdx, %rcx # sched: [1:0.33] +; BDVER12-NEXT: movq %rsi, %rax # sched: [1:0.33] +; BDVER12-NEXT: shrq %cl, %rdi # sched: [3:1.50] +; BDVER12-NEXT: negl %ecx # sched: [1:0.33] +; BDVER12-NEXT: # kill: def $cl killed $cl killed $rcx +; BDVER12-NEXT: shlq %cl, %rax # sched: [3:1.50] +; BDVER12-NEXT: orq %rdi, %rax # sched: [1:0.33] +; BDVER12-NEXT: retq # sched: [1:1.00] +; ; BTVER2-LABEL: rshift_cl: ; BTVER2: # %bb.0: # %entry ; BTVER2-NEXT: movq %rdx, %rcx # sched: [1:0.50] @@ -250,17 +262,6 @@ define i64 @rshift_cl(i64 %a, i64 %b, i64 %c) nounwind readnone { ; BTVER2-NEXT: shlq %cl, %rax # sched: [1:0.50] ; BTVER2-NEXT: orq %rdi, %rax # sched: [1:0.50] ; BTVER2-NEXT: retq # sched: [4:1.00] -; -; BDVER1-LABEL: rshift_cl: -; BDVER1: # %bb.0: # %entry -; BDVER1-NEXT: movq %rdx, %rcx -; BDVER1-NEXT: movq %rsi, %rax -; BDVER1-NEXT: shrq %cl, %rdi -; BDVER1-NEXT: negl %ecx -; BDVER1-NEXT: # kill: def $cl killed $cl killed $rcx -; BDVER1-NEXT: shlq %cl, %rax -; BDVER1-NEXT: orq %rdi, %rax -; BDVER1-NEXT: retq entry: %shr = lshr i64 %a, %c %sub = sub nsw i64 64, %c @@ -284,19 +285,19 @@ define void @lshift_mem_cl_optsize(i64 %a, i64 %c) nounwind readnone optsize { ; GENERIC-NEXT: shldq %cl, %rdi, {{.*}}(%rip) # sched: [10:1.50] ; GENERIC-NEXT: retq # sched: [1:1.00] ; +; BDVER12-LABEL: lshift_mem_cl_optsize: +; BDVER12: # %bb.0: # %entry +; BDVER12-NEXT: movq %rsi, %rcx # sched: [1:0.33] +; BDVER12-NEXT: # kill: def $cl killed $cl killed $rcx +; BDVER12-NEXT: shldq %cl, %rdi, {{.*}}(%rip) # sched: [10:1.50] +; BDVER12-NEXT: retq # sched: [1:1.00] +; ; BTVER2-LABEL: lshift_mem_cl_optsize: ; BTVER2: # %bb.0: # %entry ; BTVER2-NEXT: movq %rsi, %rcx # sched: [1:0.50] ; BTVER2-NEXT: # kill: def $cl killed $cl killed $rcx ; BTVER2-NEXT: shldq %cl, %rdi, {{.*}}(%rip) # sched: [9:11.00] ; BTVER2-NEXT: retq # sched: [4:1.00] -; -; BDVER1-LABEL: lshift_mem_cl_optsize: -; BDVER1: # %bb.0: # %entry -; BDVER1-NEXT: movq %rsi, %rcx -; BDVER1-NEXT: # kill: def $cl killed $cl killed $rcx -; BDVER1-NEXT: shldq %cl, %rdi, {{.*}}(%rip) -; BDVER1-NEXT: retq entry: %b = load i64, i64* @x %shl = shl i64 %b, %c @@ -315,6 +316,18 @@ define void @lshift_mem_cl(i64 %a, i64 %c) nounwind readnone { ; GENERIC-NEXT: shldq %cl, %rdi, {{.*}}(%rip) # sched: [10:1.50] ; GENERIC-NEXT: retq # sched: [1:1.00] ; +; BDVER12-LABEL: lshift_mem_cl: +; BDVER12: # %bb.0: # %entry +; BDVER12-NEXT: movq %rsi, %rcx # sched: [1:0.33] +; BDVER12-NEXT: movq {{.*}}(%rip), %rax # sched: [5:0.50] +; BDVER12-NEXT: shlq %cl, %rax # sched: [3:1.50] +; BDVER12-NEXT: negl %ecx # sched: [1:0.33] +; BDVER12-NEXT: # kill: def $cl killed $cl killed $rcx +; BDVER12-NEXT: shrq %cl, %rdi # sched: [3:1.50] +; BDVER12-NEXT: orq %rax, %rdi # sched: [1:0.33] +; BDVER12-NEXT: movq %rdi, {{.*}}(%rip) # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [1:1.00] +; ; BTVER2-LABEL: lshift_mem_cl: ; BTVER2: # %bb.0: # %entry ; BTVER2-NEXT: movq {{.*}}(%rip), %rax # sched: [5:1.00] @@ -326,18 +339,6 @@ define void @lshift_mem_cl(i64 %a, i64 %c) nounwind readnone { ; BTVER2-NEXT: orq %rax, %rdi # sched: [1:0.50] ; BTVER2-NEXT: movq %rdi, {{.*}}(%rip) # sched: [1:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00] -; -; BDVER1-LABEL: lshift_mem_cl: -; BDVER1: # %bb.0: # %entry -; BDVER1-NEXT: movq %rsi, %rcx -; BDVER1-NEXT: movq {{.*}}(%rip), %rax -; BDVER1-NEXT: shlq %cl, %rax -; BDVER1-NEXT: negl %ecx -; BDVER1-NEXT: # kill: def $cl killed $cl killed $rcx -; BDVER1-NEXT: shrq %cl, %rdi -; BDVER1-NEXT: orq %rax, %rdi -; BDVER1-NEXT: movq %rdi, {{.*}}(%rip) -; BDVER1-NEXT: retq entry: %b = load i64, i64* @x %shl = shl i64 %b, %c @@ -354,6 +355,15 @@ define void @lshift_mem(i64 %a) nounwind readnone { ; GENERIC-NEXT: shldq $10, %rdi, {{.*}}(%rip) # sched: [8:1.00] ; GENERIC-NEXT: retq # sched: [1:1.00] ; +; BDVER12-LABEL: lshift_mem: +; BDVER12: # %bb.0: # %entry +; BDVER12-NEXT: movq {{.*}}(%rip), %rax # sched: [5:0.50] +; BDVER12-NEXT: shlq $10, %rax # sched: [1:0.50] +; BDVER12-NEXT: shrq $54, %rdi # sched: [1:0.50] +; BDVER12-NEXT: orq %rax, %rdi # sched: [1:0.33] +; BDVER12-NEXT: movq %rdi, {{.*}}(%rip) # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [1:1.00] +; ; BTVER2-LABEL: lshift_mem: ; BTVER2: # %bb.0: # %entry ; BTVER2-NEXT: movq {{.*}}(%rip), %rax # sched: [5:1.00] @@ -362,15 +372,6 @@ define void @lshift_mem(i64 %a) nounwind readnone { ; BTVER2-NEXT: orq %rax, %rdi # sched: [1:0.50] ; BTVER2-NEXT: movq %rdi, {{.*}}(%rip) # sched: [1:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00] -; -; BDVER1-LABEL: lshift_mem: -; BDVER1: # %bb.0: # %entry -; BDVER1-NEXT: movq {{.*}}(%rip), %rax -; BDVER1-NEXT: shlq $10, %rax -; BDVER1-NEXT: shrq $54, %rdi -; BDVER1-NEXT: orq %rax, %rdi -; BDVER1-NEXT: movq %rdi, {{.*}}(%rip) -; BDVER1-NEXT: retq entry: %b = load i64, i64* @x %shl = shl i64 %b, 10 @@ -386,15 +387,15 @@ define void @lshift_mem_optsize(i64 %a) nounwind readnone optsize { ; GENERIC-NEXT: shldq $10, %rdi, {{.*}}(%rip) # sched: [8:1.00] ; GENERIC-NEXT: retq # sched: [1:1.00] ; +; BDVER12-LABEL: lshift_mem_optsize: +; BDVER12: # %bb.0: # %entry +; BDVER12-NEXT: shldq $10, %rdi, {{.*}}(%rip) # sched: [8:1.00] +; BDVER12-NEXT: retq # sched: [1:1.00] +; ; BTVER2-LABEL: lshift_mem_optsize: ; BTVER2: # %bb.0: # %entry ; BTVER2-NEXT: shldq $10, %rdi, {{.*}}(%rip) # sched: [9:11.00] ; BTVER2-NEXT: retq # sched: [4:1.00] -; -; BDVER1-LABEL: lshift_mem_optsize: -; BDVER1: # %bb.0: # %entry -; BDVER1-NEXT: shldq $10, %rdi, {{.*}}(%rip) -; BDVER1-NEXT: retq entry: %b = load i64, i64* @x %shl = shl i64 %b, 10 @@ -412,6 +413,15 @@ define void @lshift_mem_b(i64 %b) nounwind readnone { ; GENERIC-NEXT: movq %rax, {{.*}}(%rip) # sched: [1:1.00] ; GENERIC-NEXT: retq # sched: [1:1.00] ; +; BDVER12-LABEL: lshift_mem_b: +; BDVER12: # %bb.0: # %entry +; BDVER12-NEXT: movq {{.*}}(%rip), %rax # sched: [5:0.50] +; BDVER12-NEXT: shlq $10, %rdi # sched: [1:0.50] +; BDVER12-NEXT: shrq $54, %rax # sched: [1:0.50] +; BDVER12-NEXT: orq %rdi, %rax # sched: [1:0.33] +; BDVER12-NEXT: movq %rax, {{.*}}(%rip) # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [1:1.00] +; ; BTVER2-LABEL: lshift_mem_b: ; BTVER2: # %bb.0: # %entry ; BTVER2-NEXT: movq {{.*}}(%rip), %rax # sched: [5:1.00] @@ -420,15 +430,6 @@ define void @lshift_mem_b(i64 %b) nounwind readnone { ; BTVER2-NEXT: orq %rdi, %rax # sched: [1:0.50] ; BTVER2-NEXT: movq %rax, {{.*}}(%rip) # sched: [1:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00] -; -; BDVER1-LABEL: lshift_mem_b: -; BDVER1: # %bb.0: # %entry -; BDVER1-NEXT: movq {{.*}}(%rip), %rax -; BDVER1-NEXT: shlq $10, %rdi -; BDVER1-NEXT: shrq $54, %rax -; BDVER1-NEXT: orq %rdi, %rax -; BDVER1-NEXT: movq %rax, {{.*}}(%rip) -; BDVER1-NEXT: retq entry: %a = load i64, i64* @x %shl = shl i64 %b, 10 @@ -446,19 +447,19 @@ define void @lshift_mem_b_optsize(i64 %b) nounwind readnone optsize { ; GENERIC-NEXT: movq %rax, {{.*}}(%rip) # sched: [1:1.00] ; GENERIC-NEXT: retq # sched: [1:1.00] ; +; BDVER12-LABEL: lshift_mem_b_optsize: +; BDVER12: # %bb.0: # %entry +; BDVER12-NEXT: movq {{.*}}(%rip), %rax # sched: [5:0.50] +; BDVER12-NEXT: shrdq $54, %rdi, %rax # sched: [2:0.67] +; BDVER12-NEXT: movq %rax, {{.*}}(%rip) # sched: [1:1.00] +; BDVER12-NEXT: retq # sched: [1:1.00] +; ; BTVER2-LABEL: lshift_mem_b_optsize: ; BTVER2: # %bb.0: # %entry ; BTVER2-NEXT: movq {{.*}}(%rip), %rax # sched: [5:1.00] ; BTVER2-NEXT: shrdq $54, %rdi, %rax # sched: [3:3.00] ; BTVER2-NEXT: movq %rax, {{.*}}(%rip) # sched: [1:1.00] ; BTVER2-NEXT: retq # sched: [4:1.00] -; -; BDVER1-LABEL: lshift_mem_b_optsize: -; BDVER1: # %bb.0: # %entry -; BDVER1-NEXT: movq {{.*}}(%rip), %rax -; BDVER1-NEXT: shrdq $54, %rdi, %rax -; BDVER1-NEXT: movq %rax, {{.*}}(%rip) -; BDVER1-NEXT: retq entry: %a = load i64, i64* @x %shl = shl i64 %b, 10 |
