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-rw-r--r--llvm/test/CodeGen/X86/rot32.ll143
1 files changed, 109 insertions, 34 deletions
diff --git a/llvm/test/CodeGen/X86/rot32.ll b/llvm/test/CodeGen/X86/rot32.ll
index 4f2ed2d61e8..305defeeea7 100644
--- a/llvm/test/CodeGen/X86/rot32.ll
+++ b/llvm/test/CodeGen/X86/rot32.ll
@@ -1,11 +1,16 @@
-; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s
-; RUN: llc < %s -mtriple=i686-- -mcpu=corei7-avx | FileCheck %s --check-prefix=SHLD
-; RUN: llc < %s -mtriple=i686-- -mcpu=core-avx2 | FileCheck %s --check-prefix=BMI2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s --check-prefix=ALL --check-prefix=X86
+; RUN: llc < %s -mtriple=i686-- -mcpu=corei7-avx | FileCheck %s --check-prefix=ALL --check-prefix=SHLD
+; RUN: llc < %s -mtriple=i686-- -mcpu=core-avx2 | FileCheck %s --check-prefix=ALL --check-prefix=BMI2
define i32 @foo(i32 %x, i32 %y, i32 %z) nounwind readnone {
+; ALL-LABEL: foo:
+; ALL: # BB#0: # %entry
+; ALL-NEXT: movb {{[0-9]+}}(%esp), %cl
+; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax
+; ALL-NEXT: roll %cl, %eax
+; ALL-NEXT: retl
entry:
-; CHECK-LABEL: foo:
-; CHECK: roll %cl
%0 = shl i32 %x, %z
%1 = sub i32 32, %z
%2 = lshr i32 %x, %1
@@ -14,9 +19,14 @@ entry:
}
define i32 @bar(i32 %x, i32 %y, i32 %z) nounwind readnone {
+; ALL-LABEL: bar:
+; ALL: # BB#0: # %entry
+; ALL-NEXT: movb {{[0-9]+}}(%esp), %cl
+; ALL-NEXT: movl {{[0-9]+}}(%esp), %edx
+; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax
+; ALL-NEXT: shldl %cl, %edx, %eax
+; ALL-NEXT: retl
entry:
-; CHECK-LABEL: bar:
-; CHECK: shldl %cl
%0 = shl i32 %y, %z
%1 = sub i32 32, %z
%2 = lshr i32 %x, %1
@@ -25,9 +35,13 @@ entry:
}
define i32 @un(i32 %x, i32 %y, i32 %z) nounwind readnone {
+; ALL-LABEL: un:
+; ALL: # BB#0: # %entry
+; ALL-NEXT: movb {{[0-9]+}}(%esp), %cl
+; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax
+; ALL-NEXT: rorl %cl, %eax
+; ALL-NEXT: retl
entry:
-; CHECK-LABEL: un:
-; CHECK: rorl %cl
%0 = lshr i32 %x, %z
%1 = sub i32 32, %z
%2 = shl i32 %x, %1
@@ -36,9 +50,14 @@ entry:
}
define i32 @bu(i32 %x, i32 %y, i32 %z) nounwind readnone {
+; ALL-LABEL: bu:
+; ALL: # BB#0: # %entry
+; ALL-NEXT: movb {{[0-9]+}}(%esp), %cl
+; ALL-NEXT: movl {{[0-9]+}}(%esp), %edx
+; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax
+; ALL-NEXT: shrdl %cl, %edx, %eax
+; ALL-NEXT: retl
entry:
-; CHECK-LABEL: bu:
-; CHECK: shrdl %cl
%0 = lshr i32 %y, %z
%1 = sub i32 32, %z
%2 = shl i32 %x, %1
@@ -47,13 +66,23 @@ entry:
}
define i32 @xfoo(i32 %x, i32 %y, i32 %z) nounwind readnone {
-entry:
-; CHECK-LABEL: xfoo:
-; CHECK: roll $7
+; X86-LABEL: xfoo:
+; X86: # BB#0: # %entry
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: roll $7, %eax
+; X86-NEXT: retl
+;
; SHLD-LABEL: xfoo:
-; SHLD: shldl $7
+; SHLD: # BB#0: # %entry
+; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
+; SHLD-NEXT: shldl $7, %eax, %eax
+; SHLD-NEXT: retl
+;
; BMI2-LABEL: xfoo:
-; BMI2: rorxl $25
+; BMI2: # BB#0: # %entry
+; BMI2-NEXT: rorxl $25, {{[0-9]+}}(%esp), %eax
+; BMI2-NEXT: retl
+entry:
%0 = lshr i32 %x, 25
%1 = shl i32 %x, 7
%2 = or i32 %0, %1
@@ -61,13 +90,26 @@ entry:
}
define i32 @xfoop(i32* %p) nounwind readnone {
-entry:
-; CHECK-LABEL: xfoop:
-; CHECK: roll $7
+; X86-LABEL: xfoop:
+; X86: # BB#0: # %entry
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl (%eax), %eax
+; X86-NEXT: roll $7, %eax
+; X86-NEXT: retl
+;
; SHLD-LABEL: xfoop:
-; SHLD: shldl $7
+; SHLD: # BB#0: # %entry
+; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
+; SHLD-NEXT: movl (%eax), %eax
+; SHLD-NEXT: shldl $7, %eax, %eax
+; SHLD-NEXT: retl
+;
; BMI2-LABEL: xfoop:
-; BMI2: rorxl $25
+; BMI2: # BB#0: # %entry
+; BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
+; BMI2-NEXT: rorxl $25, (%eax), %eax
+; BMI2-NEXT: retl
+entry:
%x = load i32, i32* %p
%a = lshr i32 %x, 25
%b = shl i32 %x, 7
@@ -76,9 +118,13 @@ entry:
}
define i32 @xbar(i32 %x, i32 %y, i32 %z) nounwind readnone {
+; ALL-LABEL: xbar:
+; ALL: # BB#0: # %entry
+; ALL-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax
+; ALL-NEXT: shldl $7, %ecx, %eax
+; ALL-NEXT: retl
entry:
-; CHECK-LABEL: xbar:
-; CHECK: shldl $7
%0 = shl i32 %y, 7
%1 = lshr i32 %x, 25
%2 = or i32 %0, %1
@@ -86,13 +132,23 @@ entry:
}
define i32 @xun(i32 %x, i32 %y, i32 %z) nounwind readnone {
-entry:
-; CHECK-LABEL: xun:
-; CHECK: roll $25
+; X86-LABEL: xun:
+; X86: # BB#0: # %entry
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: roll $25, %eax
+; X86-NEXT: retl
+;
; SHLD-LABEL: xun:
-; SHLD: shldl $25
+; SHLD: # BB#0: # %entry
+; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
+; SHLD-NEXT: shldl $25, %eax, %eax
+; SHLD-NEXT: retl
+;
; BMI2-LABEL: xun:
-; BMI2: rorxl $7
+; BMI2: # BB#0: # %entry
+; BMI2-NEXT: rorxl $7, {{[0-9]+}}(%esp), %eax
+; BMI2-NEXT: retl
+entry:
%0 = lshr i32 %x, 7
%1 = shl i32 %x, 25
%2 = or i32 %0, %1
@@ -100,13 +156,28 @@ entry:
}
define i32 @xunp(i32* %p) nounwind readnone {
+; X86-LABEL: xunp:
+; X86: # BB#0: # %entry
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movl (%eax), %eax
+; X86-NEXT: roll $25, %eax
+; X86-NEXT: retl
+;
+; SHLD-LABEL: xunp:
+; SHLD: # BB#0: # %entry
+; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
+; SHLD-NEXT: movl (%eax), %eax
+; SHLD-NEXT: shldl $25, %eax, %eax
+; SHLD-NEXT: retl
+;
+; BMI2-LABEL: xunp:
+; BMI2: # BB#0: # %entry
+; BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
+; BMI2-NEXT: rorxl $7, (%eax), %eax
+; BMI2-NEXT: retl
entry:
-; CHECK-LABEL: xunp:
-; CHECK: roll $25
; shld-label: xunp:
; shld: shldl $25
-; BMI2-LABEL: xunp:
-; BMI2: rorxl $7
%x = load i32, i32* %p
%a = lshr i32 %x, 7
%b = shl i32 %x, 25
@@ -115,9 +186,13 @@ entry:
}
define i32 @xbu(i32 %x, i32 %y, i32 %z) nounwind readnone {
+; ALL-LABEL: xbu:
+; ALL: # BB#0: # %entry
+; ALL-NEXT: movl {{[0-9]+}}(%esp), %ecx
+; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax
+; ALL-NEXT: shldl $25, %ecx, %eax
+; ALL-NEXT: retl
entry:
-; CHECK-LABEL: xbu:
-; CHECK: shldl $25
%0 = lshr i32 %y, 7
%1 = shl i32 %x, 25
%2 = or i32 %0, %1
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