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-rw-r--r--llvm/test/CodeGen/X86/mulx64.ll20
1 files changed, 13 insertions, 7 deletions
diff --git a/llvm/test/CodeGen/X86/mulx64.ll b/llvm/test/CodeGen/X86/mulx64.ll
index 808c02290b7..7cc10e017fc 100644
--- a/llvm/test/CodeGen/X86/mulx64.ll
+++ b/llvm/test/CodeGen/X86/mulx64.ll
@@ -1,22 +1,28 @@
-; RUN: llc -mcpu=core-avx2 -march=x86-64 < %s | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+bmi2 | FileCheck %s
+; RUN: llc < %s -mtriple=x86_64-unknown -mcpu=core-avx2 | FileCheck %s
define i128 @f1(i64 %a, i64 %b) {
+; CHECK-LABEL: f1:
+; CHECK: # BB#0:
+; CHECK-NEXT: movq %rdi, %rdx
+; CHECK-NEXT: mulxq %rsi, %rax, %rdx
+; CHECK-NEXT: retq
%x = zext i64 %a to i128
%y = zext i64 %b to i128
%r = mul i128 %x, %y
-; CHECK: f1
-; CHECK: mulxq
-; CHECK: ret
ret i128 %r
}
define i128 @f2(i64 %a, i64* %p) {
+; CHECK-LABEL: f2:
+; CHECK: # BB#0:
+; CHECK-NEXT: movq %rdi, %rdx
+; CHECK-NEXT: mulxq (%rsi), %rax, %rdx
+; CHECK-NEXT: retq
%b = load i64, i64* %p
%x = zext i64 %a to i128
%y = zext i64 %b to i128
%r = mul i128 %x, %y
-; CHECK: f2
-; CHECK: mulxq ({{.+}}), %{{.+}}, %{{.+}}
-; CHECK: ret
ret i128 %r
}
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