diff options
Diffstat (limited to 'llvm/test/CodeGen/X86/fp-intrinsics.ll')
| -rw-r--r-- | llvm/test/CodeGen/X86/fp-intrinsics.ll | 547 |
1 files changed, 525 insertions, 22 deletions
diff --git a/llvm/test/CodeGen/X86/fp-intrinsics.ll b/llvm/test/CodeGen/X86/fp-intrinsics.ll index 9841b9fc105..a321be50427 100644 --- a/llvm/test/CodeGen/X86/fp-intrinsics.ll +++ b/llvm/test/CodeGen/X86/fp-intrinsics.ll @@ -1,4 +1,5 @@ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -O3 -mtriple=i686-pc-linux -mattr=+cmov < %s | FileCheck %s --check-prefix=COMMON --check-prefix=X87 ; RUN: llc -O3 -mtriple=i686-pc-linux -mattr=sse2 < %s | FileCheck %s --check-prefix=COMMON --check-prefix=X86-SSE ; RUN: llc -O3 -mtriple=x86_64-pc-linux < %s | FileCheck %s --check-prefix=COMMON --check-prefix=SSE ; RUN: llc -O3 -mtriple=x86_64-pc-linux -mattr=+avx < %s | FileCheck %s --check-prefix=COMMON --check-prefix=AVX --check-prefix=AVX1 @@ -14,6 +15,12 @@ ; } ; define double @f1() #0 { +; X87-LABEL: f1: +; X87: # %bb.0: # %entry +; X87-NEXT: fld1 +; X87-NEXT: fdivs {{\.LCPI.*}} +; X87-NEXT: retl +; ; X86-SSE-LABEL: f1: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $12, %esp @@ -55,6 +62,12 @@ entry: ; } ; define double @f2(double %a) #0 { +; X87-LABEL: f2: +; X87: # %bb.0: # %entry +; X87-NEXT: fldz +; X87-NEXT: fsubrl {{[0-9]+}}(%esp) +; X87-NEXT: retl +; ; X86-SSE-LABEL: f2: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $12, %esp @@ -98,6 +111,16 @@ entry: ; } ; define double @f3(double %a, double %b) #0 { +; X87-LABEL: f3: +; X87: # %bb.0: # %entry +; X87-NEXT: fldz +; X87-NEXT: fchs +; X87-NEXT: fld %st(0) +; X87-NEXT: fsubl {{[0-9]+}}(%esp) +; X87-NEXT: fmull {{[0-9]+}}(%esp) +; X87-NEXT: fsubrp %st, %st(1) +; X87-NEXT: retl +; ; X86-SSE-LABEL: f3: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $12, %esp @@ -159,6 +182,17 @@ entry: ; ; define double @f4(i32 %n, double %a) #0 { +; X87-LABEL: f4: +; X87: # %bb.0: # %entry +; X87-NEXT: fldl {{[0-9]+}}(%esp) +; X87-NEXT: cmpl $0, {{[0-9]+}}(%esp) +; X87-NEXT: jle .LBB3_2 +; X87-NEXT: # %bb.1: # %if.then +; X87-NEXT: fld1 +; X87-NEXT: faddp %st, %st(1) +; X87-NEXT: .LBB3_2: # %if.end +; X87-NEXT: retl +; ; X86-SSE-LABEL: f4: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $12, %esp @@ -210,6 +244,12 @@ if.end: ; Verify that sqrt(42.0) isn't simplified when the rounding mode is unknown. define double @f5() #0 { +; X87-LABEL: f5: +; X87: # %bb.0: # %entry +; X87-NEXT: flds {{\.LCPI.*}} +; X87-NEXT: fsqrt +; X87-NEXT: retl +; ; X86-SSE-LABEL: f5: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $12, %esp @@ -242,6 +282,19 @@ entry: ; Verify that pow(42.1, 3.0) isn't simplified when the rounding mode is unknown. define double @f6() #0 { +; X87-LABEL: f6: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $28, %esp +; X87-NEXT: .cfi_def_cfa_offset 32 +; X87-NEXT: flds {{\.LCPI.*}} +; X87-NEXT: fstpl {{[0-9]+}}(%esp) +; X87-NEXT: fldl {{\.LCPI.*}} +; X87-NEXT: fstpl (%esp) +; X87-NEXT: calll pow +; X87-NEXT: addl $28, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; ; X86-SSE-LABEL: f6: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $28, %esp @@ -286,6 +339,18 @@ entry: ; Verify that powi(42.1, 3) isn't simplified when the rounding mode is unknown. define double @f7() #0 { +; X87-LABEL: f7: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 16 +; X87-NEXT: fldl {{\.LCPI.*}} +; X87-NEXT: fstpl (%esp) +; X87-NEXT: movl $3, {{[0-9]+}}(%esp) +; X87-NEXT: calll __powidf2 +; X87-NEXT: addl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; ; X86-SSE-LABEL: f7: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $12, %esp @@ -329,6 +394,17 @@ entry: ; Verify that sin(42.0) isn't simplified when the rounding mode is unknown. define double @f8() #0 { +; X87-LABEL: f8: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 16 +; X87-NEXT: flds {{\.LCPI.*}} +; X87-NEXT: fstpl (%esp) +; X87-NEXT: calll sin +; X87-NEXT: addl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; ; X86-SSE-LABEL: f8: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $12, %esp @@ -368,6 +444,17 @@ entry: ; Verify that cos(42.0) isn't simplified when the rounding mode is unknown. define double @f9() #0 { +; X87-LABEL: f9: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 16 +; X87-NEXT: flds {{\.LCPI.*}} +; X87-NEXT: fstpl (%esp) +; X87-NEXT: calll cos +; X87-NEXT: addl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; ; X86-SSE-LABEL: f9: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $12, %esp @@ -407,6 +494,17 @@ entry: ; Verify that exp(42.0) isn't simplified when the rounding mode is unknown. define double @f10() #0 { +; X87-LABEL: f10: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 16 +; X87-NEXT: flds {{\.LCPI.*}} +; X87-NEXT: fstpl (%esp) +; X87-NEXT: calll exp +; X87-NEXT: addl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; ; X86-SSE-LABEL: f10: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $12, %esp @@ -446,6 +544,17 @@ entry: ; Verify that exp2(42.1) isn't simplified when the rounding mode is unknown. define double @f11() #0 { +; X87-LABEL: f11: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 16 +; X87-NEXT: fldl {{\.LCPI.*}} +; X87-NEXT: fstpl (%esp) +; X87-NEXT: calll exp2 +; X87-NEXT: addl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; ; X86-SSE-LABEL: f11: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $12, %esp @@ -485,6 +594,17 @@ entry: ; Verify that log(42.0) isn't simplified when the rounding mode is unknown. define double @f12() #0 { +; X87-LABEL: f12: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 16 +; X87-NEXT: flds {{\.LCPI.*}} +; X87-NEXT: fstpl (%esp) +; X87-NEXT: calll log +; X87-NEXT: addl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; ; X86-SSE-LABEL: f12: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $12, %esp @@ -524,6 +644,17 @@ entry: ; Verify that log10(42.0) isn't simplified when the rounding mode is unknown. define double @f13() #0 { +; X87-LABEL: f13: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 16 +; X87-NEXT: flds {{\.LCPI.*}} +; X87-NEXT: fstpl (%esp) +; X87-NEXT: calll log10 +; X87-NEXT: addl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; ; X86-SSE-LABEL: f13: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $12, %esp @@ -563,6 +694,17 @@ entry: ; Verify that log2(42.0) isn't simplified when the rounding mode is unknown. define double @f14() #0 { +; X87-LABEL: f14: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 16 +; X87-NEXT: flds {{\.LCPI.*}} +; X87-NEXT: fstpl (%esp) +; X87-NEXT: calll log2 +; X87-NEXT: addl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; ; X86-SSE-LABEL: f14: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $12, %esp @@ -602,6 +744,17 @@ entry: ; Verify that rint(42.1) isn't simplified when the rounding mode is unknown. define double @f15() #0 { +; X87-LABEL: f15: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 16 +; X87-NEXT: fldl {{\.LCPI.*}} +; X87-NEXT: fstpl (%esp) +; X87-NEXT: calll rint +; X87-NEXT: addl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; ; X86-SSE-LABEL: f15: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $12, %esp @@ -638,6 +791,17 @@ entry: ; Verify that nearbyint(42.1) isn't simplified when the rounding mode is ; unknown. define double @f16() #0 { +; X87-LABEL: f16: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 16 +; X87-NEXT: fldl {{\.LCPI.*}} +; X87-NEXT: fstpl (%esp) +; X87-NEXT: calll nearbyint +; X87-NEXT: addl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; ; X86-SSE-LABEL: f16: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $12, %esp @@ -673,6 +837,19 @@ entry: } define double @f19() #0 { +; X87-LABEL: f19: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $28, %esp +; X87-NEXT: .cfi_def_cfa_offset 32 +; X87-NEXT: flds {{\.LCPI.*}} +; X87-NEXT: fstpl {{[0-9]+}}(%esp) +; X87-NEXT: movl $1072693248, {{[0-9]+}}(%esp) # imm = 0x3FF00000 +; X87-NEXT: movl $0, (%esp) +; X87-NEXT: calll fmod +; X87-NEXT: addl $28, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; ; X86-SSE-LABEL: f19: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $28, %esp @@ -717,9 +894,72 @@ entry: } ; Verify that fptosi(%x) isn't simplified when the rounding mode is -; unknown. The expansion should have only one conversion instruction. +; unknown. +; Verify that no gross errors happen. +; FIXME: The SSE/AVX code does not raise an invalid exception for all values +; that don't fit in i16. +define i16 @f20s16(double %x) #0 { +; X87-LABEL: f20s16: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $8, %esp +; X87-NEXT: .cfi_def_cfa_offset 12 +; X87-NEXT: fldl {{[0-9]+}}(%esp) +; X87-NEXT: fnstcw {{[0-9]+}}(%esp) +; X87-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X87-NEXT: orl $3072, %eax # imm = 0xC00 +; X87-NEXT: movw %ax, {{[0-9]+}}(%esp) +; X87-NEXT: fldcw {{[0-9]+}}(%esp) +; X87-NEXT: fistps {{[0-9]+}}(%esp) +; X87-NEXT: fldcw {{[0-9]+}}(%esp) +; X87-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X87-NEXT: addl $8, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; +; X86-SSE-LABEL: f20s16: +; X86-SSE: # %bb.0: # %entry +; X86-SSE-NEXT: cvttsd2si {{[0-9]+}}(%esp), %eax +; X86-SSE-NEXT: # kill: def $ax killed $ax killed $eax +; X86-SSE-NEXT: retl +; +; SSE-LABEL: f20s16: +; SSE: # %bb.0: # %entry +; SSE-NEXT: cvttsd2si %xmm0, %eax +; SSE-NEXT: # kill: def $ax killed $ax killed $eax +; SSE-NEXT: retq +; +; AVX-LABEL: f20s16: +; AVX: # %bb.0: # %entry +; AVX-NEXT: vcvttsd2si %xmm0, %eax +; AVX-NEXT: # kill: def $ax killed $ax killed $eax +; AVX-NEXT: retq +entry: + %result = call i16 @llvm.experimental.constrained.fptosi.i16.f64(double %x, + metadata !"fpexcept.strict") #0 + ret i16 %result +} + +; Verify that fptosi(%x) isn't simplified when the rounding mode is +; unknown. ; Verify that no gross errors happen. define i32 @f20s(double %x) #0 { +; X87-LABEL: f20s: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $8, %esp +; X87-NEXT: .cfi_def_cfa_offset 12 +; X87-NEXT: fldl {{[0-9]+}}(%esp) +; X87-NEXT: fnstcw (%esp) +; X87-NEXT: movzwl (%esp), %eax +; X87-NEXT: orl $3072, %eax # imm = 0xC00 +; X87-NEXT: movw %ax, {{[0-9]+}}(%esp) +; X87-NEXT: fldcw {{[0-9]+}}(%esp) +; X87-NEXT: fistpl {{[0-9]+}}(%esp) +; X87-NEXT: fldcw (%esp) +; X87-NEXT: movl {{[0-9]+}}(%esp), %eax +; X87-NEXT: addl $8, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; ; X86-SSE-LABEL: f20s: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: cvttsd2si {{[0-9]+}}(%esp), %eax @@ -741,9 +981,86 @@ entry: } ; Verify that fptoui(%x) isn't simplified when the rounding mode is -; unknown. The expansion should have only one conversion instruction. +; unknown. +; Verify that no gross errors happen. +; FIXME: This code generates spurious inexact exceptions. +define i64 @f20s64(double %x) #0 { +; X87-LABEL: f20s64: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $20, %esp +; X87-NEXT: .cfi_def_cfa_offset 24 +; X87-NEXT: fldl {{[0-9]+}}(%esp) +; X87-NEXT: fnstcw {{[0-9]+}}(%esp) +; X87-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X87-NEXT: orl $3072, %eax # imm = 0xC00 +; X87-NEXT: movw %ax, {{[0-9]+}}(%esp) +; X87-NEXT: fldcw {{[0-9]+}}(%esp) +; X87-NEXT: fistpll {{[0-9]+}}(%esp) +; X87-NEXT: fldcw {{[0-9]+}}(%esp) +; X87-NEXT: movl {{[0-9]+}}(%esp), %eax +; X87-NEXT: movl {{[0-9]+}}(%esp), %edx +; X87-NEXT: addl $20, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; +; X86-SSE-LABEL: f20s64: +; X86-SSE: # %bb.0: # %entry +; X86-SSE-NEXT: subl $20, %esp +; X86-SSE-NEXT: .cfi_def_cfa_offset 24 +; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero +; X86-SSE-NEXT: movsd %xmm0, {{[0-9]+}}(%esp) +; X86-SSE-NEXT: fldl {{[0-9]+}}(%esp) +; X86-SSE-NEXT: fnstcw {{[0-9]+}}(%esp) +; X86-SSE-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-SSE-NEXT: orl $3072, %eax # imm = 0xC00 +; X86-SSE-NEXT: movw %ax, {{[0-9]+}}(%esp) +; X86-SSE-NEXT: fldcw {{[0-9]+}}(%esp) +; X86-SSE-NEXT: fistpll {{[0-9]+}}(%esp) +; X86-SSE-NEXT: fldcw {{[0-9]+}}(%esp) +; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %edx +; X86-SSE-NEXT: addl $20, %esp +; X86-SSE-NEXT: .cfi_def_cfa_offset 4 +; X86-SSE-NEXT: retl +; +; SSE-LABEL: f20s64: +; SSE: # %bb.0: # %entry +; SSE-NEXT: cvttsd2si %xmm0, %rax +; SSE-NEXT: retq +; +; AVX-LABEL: f20s64: +; AVX: # %bb.0: # %entry +; AVX-NEXT: vcvttsd2si %xmm0, %rax +; AVX-NEXT: retq +entry: + %result = call i64 @llvm.experimental.constrained.fptosi.i64.f64(double %x, + metadata !"fpexcept.strict") #0 + ret i64 %result +} + +; Verify that fptoui(%x) isn't simplified when the rounding mode is +; unknown. ; Verify that no gross errors happen. +; FIXME: The X87/SSE/AVX1 code does not raise an invalid exception for all +; values that don't fit in i32. The AVX512 code does. define i32 @f20u(double %x) #0 { +; X87-LABEL: f20u: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $20, %esp +; X87-NEXT: .cfi_def_cfa_offset 24 +; X87-NEXT: fldl {{[0-9]+}}(%esp) +; X87-NEXT: fnstcw {{[0-9]+}}(%esp) +; X87-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X87-NEXT: orl $3072, %eax # imm = 0xC00 +; X87-NEXT: movw %ax, {{[0-9]+}}(%esp) +; X87-NEXT: fldcw {{[0-9]+}}(%esp) +; X87-NEXT: fistpll {{[0-9]+}}(%esp) +; X87-NEXT: fldcw {{[0-9]+}}(%esp) +; X87-NEXT: movl {{[0-9]+}}(%esp), %eax +; X87-NEXT: addl $20, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; ; X86-SSE-LABEL: f20u: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero @@ -765,6 +1082,94 @@ define i32 @f20u(double %x) #0 { ; ; SSE-LABEL: f20u: ; SSE: # %bb.0: # %entry +; SSE-NEXT: cvttsd2si %xmm0, %rax +; SSE-NEXT: # kill: def $eax killed $eax killed $rax +; SSE-NEXT: retq +; +; AVX1-LABEL: f20u: +; AVX1: # %bb.0: # %entry +; AVX1-NEXT: vcvttsd2si %xmm0, %rax +; AVX1-NEXT: # kill: def $eax killed $eax killed $rax +; AVX1-NEXT: retq +; +; AVX512-LABEL: f20u: +; AVX512: # %bb.0: # %entry +; AVX512-NEXT: vcvttsd2usi %xmm0, %eax +; AVX512-NEXT: retq +entry: + %result = call i32 @llvm.experimental.constrained.fptoui.i32.f64(double %x, + metadata !"fpexcept.strict") #0 + ret i32 %result +} + +; Verify that fptoui(%x) isn't simplified when the rounding mode is +; unknown. +; Verify that no gross errors happen. +; FIXME: This code generates spurious inexact exceptions. +define i64 @f20u64(double %x) #0 { +; X87-LABEL: f20u64: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $20, %esp +; X87-NEXT: .cfi_def_cfa_offset 24 +; X87-NEXT: fldl {{[0-9]+}}(%esp) +; X87-NEXT: flds {{\.LCPI.*}} +; X87-NEXT: fld %st(1) +; X87-NEXT: fsub %st(1), %st +; X87-NEXT: xorl %edx, %edx +; X87-NEXT: fxch %st(1) +; X87-NEXT: fucompi %st(2), %st +; X87-NEXT: fcmovnbe %st(1), %st +; X87-NEXT: fstp %st(1) +; X87-NEXT: setbe %dl +; X87-NEXT: fnstcw {{[0-9]+}}(%esp) +; X87-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X87-NEXT: orl $3072, %eax # imm = 0xC00 +; X87-NEXT: movw %ax, {{[0-9]+}}(%esp) +; X87-NEXT: fldcw {{[0-9]+}}(%esp) +; X87-NEXT: fistpll {{[0-9]+}}(%esp) +; X87-NEXT: fldcw {{[0-9]+}}(%esp) +; X87-NEXT: shll $31, %edx +; X87-NEXT: xorl {{[0-9]+}}(%esp), %edx +; X87-NEXT: movl {{[0-9]+}}(%esp), %eax +; X87-NEXT: addl $20, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; +; X86-SSE-LABEL: f20u64: +; X86-SSE: # %bb.0: # %entry +; X86-SSE-NEXT: subl $20, %esp +; X86-SSE-NEXT: .cfi_def_cfa_offset 24 +; X86-SSE-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero +; X86-SSE-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero +; X86-SSE-NEXT: movapd %xmm0, %xmm2 +; X86-SSE-NEXT: subsd %xmm1, %xmm2 +; X86-SSE-NEXT: movapd %xmm0, %xmm3 +; X86-SSE-NEXT: cmpltsd %xmm1, %xmm3 +; X86-SSE-NEXT: movapd %xmm3, %xmm4 +; X86-SSE-NEXT: andnpd %xmm2, %xmm4 +; X86-SSE-NEXT: andpd %xmm0, %xmm3 +; X86-SSE-NEXT: orpd %xmm4, %xmm3 +; X86-SSE-NEXT: movlpd %xmm3, {{[0-9]+}}(%esp) +; X86-SSE-NEXT: fldl {{[0-9]+}}(%esp) +; X86-SSE-NEXT: fnstcw {{[0-9]+}}(%esp) +; X86-SSE-NEXT: movzwl {{[0-9]+}}(%esp), %eax +; X86-SSE-NEXT: orl $3072, %eax # imm = 0xC00 +; X86-SSE-NEXT: movw %ax, {{[0-9]+}}(%esp) +; X86-SSE-NEXT: fldcw {{[0-9]+}}(%esp) +; X86-SSE-NEXT: fistpll {{[0-9]+}}(%esp) +; X86-SSE-NEXT: fldcw {{[0-9]+}}(%esp) +; X86-SSE-NEXT: xorl %edx, %edx +; X86-SSE-NEXT: ucomisd %xmm0, %xmm1 +; X86-SSE-NEXT: setbe %dl +; X86-SSE-NEXT: shll $31, %edx +; X86-SSE-NEXT: xorl {{[0-9]+}}(%esp), %edx +; X86-SSE-NEXT: movl {{[0-9]+}}(%esp), %eax +; X86-SSE-NEXT: addl $20, %esp +; X86-SSE-NEXT: .cfi_def_cfa_offset 4 +; X86-SSE-NEXT: retl +; +; SSE-LABEL: f20u64: +; SSE: # %bb.0: # %entry ; SSE-NEXT: movsd {{.*#+}} xmm1 = mem[0],zero ; SSE-NEXT: movapd %xmm0, %xmm2 ; SSE-NEXT: cmpltsd %xmm1, %xmm2 @@ -775,49 +1180,51 @@ define i32 @f20u(double %x) #0 { ; SSE-NEXT: subsd %xmm1, %xmm0 ; SSE-NEXT: andnpd %xmm0, %xmm3 ; SSE-NEXT: orpd %xmm3, %xmm2 -; SSE-NEXT: cvttsd2si %xmm2, %ecx +; SSE-NEXT: cvttsd2si %xmm2, %rcx ; SSE-NEXT: setae %al -; SSE-NEXT: shll $31, %eax -; SSE-NEXT: xorl %ecx, %eax +; SSE-NEXT: shlq $63, %rax +; SSE-NEXT: xorq %rcx, %rax ; SSE-NEXT: retq ; -; AVX1-LABEL: f20u: +; AVX1-LABEL: f20u64: ; AVX1: # %bb.0: # %entry ; AVX1-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero ; AVX1-NEXT: vcmpltsd %xmm1, %xmm0, %xmm2 ; AVX1-NEXT: vsubsd %xmm1, %xmm0, %xmm3 ; AVX1-NEXT: vblendvpd %xmm2, %xmm0, %xmm3, %xmm2 -; AVX1-NEXT: vcvttsd2si %xmm2, %ecx +; AVX1-NEXT: vcvttsd2si %xmm2, %rcx ; AVX1-NEXT: xorl %eax, %eax ; AVX1-NEXT: vucomisd %xmm1, %xmm0 ; AVX1-NEXT: setae %al -; AVX1-NEXT: shll $31, %eax -; AVX1-NEXT: xorl %ecx, %eax +; AVX1-NEXT: shlq $63, %rax +; AVX1-NEXT: xorq %rcx, %rax ; AVX1-NEXT: retq ; -; AVX512-LABEL: f20u: +; AVX512-LABEL: f20u64: ; AVX512: # %bb.0: # %entry -; AVX512-NEXT: vmovsd {{.*#+}} xmm1 = mem[0],zero -; AVX512-NEXT: vcmpltsd %xmm1, %xmm0, %k1 -; AVX512-NEXT: vsubsd %xmm1, %xmm0, %xmm2 -; AVX512-NEXT: vmovsd %xmm0, %xmm2, %xmm2 {%k1} -; AVX512-NEXT: vcvttsd2si %xmm2, %ecx -; AVX512-NEXT: xorl %eax, %eax -; AVX512-NEXT: vucomisd %xmm1, %xmm0 -; AVX512-NEXT: setae %al -; AVX512-NEXT: shll $31, %eax -; AVX512-NEXT: xorl %ecx, %eax +; AVX512-NEXT: vcvttsd2usi %xmm0, %rax ; AVX512-NEXT: retq entry: - %result = call i32 @llvm.experimental.constrained.fptoui.i32.f64(double %x, + %result = call i64 @llvm.experimental.constrained.fptoui.i64.f64(double %x, metadata !"fpexcept.strict") #0 - ret i32 %result + ret i64 %result } ; Verify that round(42.1) isn't simplified when the rounding mode is ; unknown. ; Verify that no gross errors happen. define float @f21() #0 { +; X87-LABEL: f21: +; X87: # %bb.0: # %entry +; X87-NEXT: pushl %eax +; X87-NEXT: .cfi_def_cfa_offset 8 +; X87-NEXT: fldl {{\.LCPI.*}} +; X87-NEXT: fstps (%esp) +; X87-NEXT: flds (%esp) +; X87-NEXT: popl %eax +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; ; X86-SSE-LABEL: f21: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: pushl %eax @@ -850,6 +1257,11 @@ entry: } define double @f22(float %x) #0 { +; X87-LABEL: f22: +; X87: # %bb.0: # %entry +; X87-NEXT: flds {{[0-9]+}}(%esp) +; X87-NEXT: retl +; ; X86-SSE-LABEL: f22: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $12, %esp @@ -878,6 +1290,17 @@ entry: } define i32 @f23(double %x) #0 { +; X87-LABEL: f23: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 16 +; X87-NEXT: fldl {{[0-9]+}}(%esp) +; X87-NEXT: fstpl (%esp) +; X87-NEXT: calll lrint +; X87-NEXT: addl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; ; X86-SSE-LABEL: f23: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $12, %esp @@ -914,6 +1337,17 @@ entry: } define i32 @f24(float %x) #0 { +; X87-LABEL: f24: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 16 +; X87-NEXT: flds {{[0-9]+}}(%esp) +; X87-NEXT: fstps (%esp) +; X87-NEXT: calll lrintf +; X87-NEXT: addl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; ; X86-SSE-LABEL: f24: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $12, %esp @@ -950,6 +1384,17 @@ entry: } define i64 @f25(double %x) #0 { +; X87-LABEL: f25: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 16 +; X87-NEXT: fldl {{[0-9]+}}(%esp) +; X87-NEXT: fstpl (%esp) +; X87-NEXT: calll llrint +; X87-NEXT: addl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; ; X86-SSE-LABEL: f25: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $12, %esp @@ -986,6 +1431,17 @@ entry: } define i64 @f26(float %x) { +; X87-LABEL: f26: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 16 +; X87-NEXT: flds {{[0-9]+}}(%esp) +; X87-NEXT: fstps (%esp) +; X87-NEXT: calll llrintf +; X87-NEXT: addl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; ; X86-SSE-LABEL: f26: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $12, %esp @@ -1022,6 +1478,17 @@ entry: } define i32 @f27(double %x) #0 { +; X87-LABEL: f27: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 16 +; X87-NEXT: fldl {{[0-9]+}}(%esp) +; X87-NEXT: fstpl (%esp) +; X87-NEXT: calll lround +; X87-NEXT: addl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; ; X86-SSE-LABEL: f27: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $12, %esp @@ -1057,6 +1524,17 @@ entry: } define i32 @f28(float %x) #0 { +; X87-LABEL: f28: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 16 +; X87-NEXT: flds {{[0-9]+}}(%esp) +; X87-NEXT: fstps (%esp) +; X87-NEXT: calll lroundf +; X87-NEXT: addl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; ; X86-SSE-LABEL: f28: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $12, %esp @@ -1092,6 +1570,17 @@ entry: } define i64 @f29(double %x) #0 { +; X87-LABEL: f29: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 16 +; X87-NEXT: fldl {{[0-9]+}}(%esp) +; X87-NEXT: fstpl (%esp) +; X87-NEXT: calll llround +; X87-NEXT: addl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; ; X86-SSE-LABEL: f29: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $12, %esp @@ -1127,6 +1616,17 @@ entry: } define i64 @f30(float %x) #0 { +; X87-LABEL: f30: +; X87: # %bb.0: # %entry +; X87-NEXT: subl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 16 +; X87-NEXT: flds {{[0-9]+}}(%esp) +; X87-NEXT: fstps (%esp) +; X87-NEXT: calll llroundf +; X87-NEXT: addl $12, %esp +; X87-NEXT: .cfi_def_cfa_offset 4 +; X87-NEXT: retl +; ; X86-SSE-LABEL: f30: ; X86-SSE: # %bb.0: # %entry ; X86-SSE-NEXT: subl $12, %esp @@ -1181,8 +1681,11 @@ declare double @llvm.experimental.constrained.log10.f64(double, metadata, metada declare double @llvm.experimental.constrained.log2.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.rint.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.nearbyint.f64(double, metadata, metadata) +declare i16 @llvm.experimental.constrained.fptosi.i16.f64(double, metadata) declare i32 @llvm.experimental.constrained.fptosi.i32.f64(double, metadata) +declare i64 @llvm.experimental.constrained.fptosi.i64.f64(double, metadata) declare i32 @llvm.experimental.constrained.fptoui.i32.f64(double, metadata) +declare i64 @llvm.experimental.constrained.fptoui.i64.f64(double, metadata) declare float @llvm.experimental.constrained.fptrunc.f32.f64(double, metadata, metadata) declare double @llvm.experimental.constrained.fpext.f64.f32(float, metadata) declare i32 @llvm.experimental.constrained.lrint.i32.f64(double, metadata, metadata) |
