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Diffstat (limited to 'llvm/test/CodeGen/X86/fast-isel-shift.ll')
-rw-r--r--llvm/test/CodeGen/X86/fast-isel-shift.ll72
1 files changed, 36 insertions, 36 deletions
diff --git a/llvm/test/CodeGen/X86/fast-isel-shift.ll b/llvm/test/CodeGen/X86/fast-isel-shift.ll
index 2205976f3cb..ff6858c2b79 100644
--- a/llvm/test/CodeGen/X86/fast-isel-shift.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-shift.ll
@@ -3,7 +3,7 @@
define i8 @shl_i8(i8 %a, i8 %b) {
; CHECK-LABEL: shl_i8:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: shlb %cl, %dil
; CHECK-NEXT: movl %edi, %eax
@@ -14,7 +14,7 @@ define i8 @shl_i8(i8 %a, i8 %b) {
define i16 @shl_i16(i16 %a, i16 %b) {
; CHECK-LABEL: shl_i16:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: ## kill: %cl<def> %cx<kill>
; CHECK-NEXT: shlw %cl, %di
@@ -26,7 +26,7 @@ define i16 @shl_i16(i16 %a, i16 %b) {
define i32 @shl_i32(i32 %a, i32 %b) {
; CHECK-LABEL: shl_i32:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: ## kill: %cl<def> %ecx<kill>
; CHECK-NEXT: shll %cl, %edi
@@ -38,7 +38,7 @@ define i32 @shl_i32(i32 %a, i32 %b) {
define i64 @shl_i64(i64 %a, i64 %b) {
; CHECK-LABEL: shl_i64:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: movq %rsi, %rcx
; CHECK-NEXT: ## kill: %cl<def> %rcx<kill>
; CHECK-NEXT: shlq %cl, %rdi
@@ -50,7 +50,7 @@ define i64 @shl_i64(i64 %a, i64 %b) {
define i8 @lshr_i8(i8 %a, i8 %b) {
; CHECK-LABEL: lshr_i8:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: shrb %cl, %dil
; CHECK-NEXT: movl %edi, %eax
@@ -61,7 +61,7 @@ define i8 @lshr_i8(i8 %a, i8 %b) {
define i16 @lshr_i16(i16 %a, i16 %b) {
; CHECK-LABEL: lshr_i16:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: ## kill: %cl<def> %cx<kill>
; CHECK-NEXT: shrw %cl, %di
@@ -73,7 +73,7 @@ define i16 @lshr_i16(i16 %a, i16 %b) {
define i32 @lshr_i32(i32 %a, i32 %b) {
; CHECK-LABEL: lshr_i32:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: ## kill: %cl<def> %ecx<kill>
; CHECK-NEXT: shrl %cl, %edi
@@ -85,7 +85,7 @@ define i32 @lshr_i32(i32 %a, i32 %b) {
define i64 @lshr_i64(i64 %a, i64 %b) {
; CHECK-LABEL: lshr_i64:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: movq %rsi, %rcx
; CHECK-NEXT: ## kill: %cl<def> %rcx<kill>
; CHECK-NEXT: shrq %cl, %rdi
@@ -97,7 +97,7 @@ define i64 @lshr_i64(i64 %a, i64 %b) {
define i8 @ashr_i8(i8 %a, i8 %b) {
; CHECK-LABEL: ashr_i8:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: sarb %cl, %dil
; CHECK-NEXT: movl %edi, %eax
@@ -108,7 +108,7 @@ define i8 @ashr_i8(i8 %a, i8 %b) {
define i16 @ashr_i16(i16 %a, i16 %b) {
; CHECK-LABEL: ashr_i16:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: ## kill: %cl<def> %cx<kill>
; CHECK-NEXT: sarw %cl, %di
@@ -120,7 +120,7 @@ define i16 @ashr_i16(i16 %a, i16 %b) {
define i32 @ashr_i32(i32 %a, i32 %b) {
; CHECK-LABEL: ashr_i32:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: movl %esi, %ecx
; CHECK-NEXT: ## kill: %cl<def> %ecx<kill>
; CHECK-NEXT: sarl %cl, %edi
@@ -132,7 +132,7 @@ define i32 @ashr_i32(i32 %a, i32 %b) {
define i64 @ashr_i64(i64 %a, i64 %b) {
; CHECK-LABEL: ashr_i64:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: movq %rsi, %rcx
; CHECK-NEXT: ## kill: %cl<def> %rcx<kill>
; CHECK-NEXT: sarq %cl, %rdi
@@ -144,7 +144,7 @@ define i64 @ashr_i64(i64 %a, i64 %b) {
define i8 @shl_imm1_i8(i8 %a) {
; CHECK-LABEL: shl_imm1_i8:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: shlb $1, %dil
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
@@ -154,7 +154,7 @@ define i8 @shl_imm1_i8(i8 %a) {
define i16 @shl_imm1_i16(i16 %a) {
; CHECK-LABEL: shl_imm1_i16:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: ## kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: leal (,%rdi,2), %eax
; CHECK-NEXT: ## kill: %ax<def> %ax<kill> %eax<kill>
@@ -165,7 +165,7 @@ define i16 @shl_imm1_i16(i16 %a) {
define i32 @shl_imm1_i32(i32 %a) {
; CHECK-LABEL: shl_imm1_i32:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: ## kill: %edi<def> %edi<kill> %rdi<def>
; CHECK-NEXT: leal (,%rdi,2), %eax
; CHECK-NEXT: retq
@@ -175,7 +175,7 @@ define i32 @shl_imm1_i32(i32 %a) {
define i64 @shl_imm1_i64(i64 %a) {
; CHECK-LABEL: shl_imm1_i64:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: leaq (,%rdi,2), %rax
; CHECK-NEXT: retq
%c = shl i64 %a, 1
@@ -184,7 +184,7 @@ define i64 @shl_imm1_i64(i64 %a) {
define i8 @lshr_imm1_i8(i8 %a) {
; CHECK-LABEL: lshr_imm1_i8:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: shrb $1, %dil
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
@@ -194,7 +194,7 @@ define i8 @lshr_imm1_i8(i8 %a) {
define i16 @lshr_imm1_i16(i16 %a) {
; CHECK-LABEL: lshr_imm1_i16:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: shrw $1, %di
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
@@ -204,7 +204,7 @@ define i16 @lshr_imm1_i16(i16 %a) {
define i32 @lshr_imm1_i32(i32 %a) {
; CHECK-LABEL: lshr_imm1_i32:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: shrl $1, %edi
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
@@ -214,7 +214,7 @@ define i32 @lshr_imm1_i32(i32 %a) {
define i64 @lshr_imm1_i64(i64 %a) {
; CHECK-LABEL: lshr_imm1_i64:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: shrq $1, %rdi
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: retq
@@ -224,7 +224,7 @@ define i64 @lshr_imm1_i64(i64 %a) {
define i8 @ashr_imm1_i8(i8 %a) {
; CHECK-LABEL: ashr_imm1_i8:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: sarb $1, %dil
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
@@ -234,7 +234,7 @@ define i8 @ashr_imm1_i8(i8 %a) {
define i16 @ashr_imm1_i16(i16 %a) {
; CHECK-LABEL: ashr_imm1_i16:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: sarw $1, %di
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
@@ -244,7 +244,7 @@ define i16 @ashr_imm1_i16(i16 %a) {
define i32 @ashr_imm1_i32(i32 %a) {
; CHECK-LABEL: ashr_imm1_i32:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: sarl $1, %edi
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
@@ -254,7 +254,7 @@ define i32 @ashr_imm1_i32(i32 %a) {
define i64 @ashr_imm1_i64(i64 %a) {
; CHECK-LABEL: ashr_imm1_i64:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: sarq $1, %rdi
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: retq
@@ -264,7 +264,7 @@ define i64 @ashr_imm1_i64(i64 %a) {
define i8 @shl_imm4_i8(i8 %a) {
; CHECK-LABEL: shl_imm4_i8:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: shlb $4, %dil
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
@@ -274,7 +274,7 @@ define i8 @shl_imm4_i8(i8 %a) {
define i16 @shl_imm4_i16(i16 %a) {
; CHECK-LABEL: shl_imm4_i16:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: shlw $4, %di
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
@@ -284,7 +284,7 @@ define i16 @shl_imm4_i16(i16 %a) {
define i32 @shl_imm4_i32(i32 %a) {
; CHECK-LABEL: shl_imm4_i32:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: shll $4, %edi
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
@@ -294,7 +294,7 @@ define i32 @shl_imm4_i32(i32 %a) {
define i64 @shl_imm4_i64(i64 %a) {
; CHECK-LABEL: shl_imm4_i64:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: shlq $4, %rdi
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: retq
@@ -304,7 +304,7 @@ define i64 @shl_imm4_i64(i64 %a) {
define i8 @lshr_imm4_i8(i8 %a) {
; CHECK-LABEL: lshr_imm4_i8:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: shrb $4, %dil
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
@@ -314,7 +314,7 @@ define i8 @lshr_imm4_i8(i8 %a) {
define i16 @lshr_imm4_i16(i16 %a) {
; CHECK-LABEL: lshr_imm4_i16:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: shrw $4, %di
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
@@ -324,7 +324,7 @@ define i16 @lshr_imm4_i16(i16 %a) {
define i32 @lshr_imm4_i32(i32 %a) {
; CHECK-LABEL: lshr_imm4_i32:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: shrl $4, %edi
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
@@ -334,7 +334,7 @@ define i32 @lshr_imm4_i32(i32 %a) {
define i64 @lshr_imm4_i64(i64 %a) {
; CHECK-LABEL: lshr_imm4_i64:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: shrq $4, %rdi
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: retq
@@ -344,7 +344,7 @@ define i64 @lshr_imm4_i64(i64 %a) {
define i8 @ashr_imm4_i8(i8 %a) {
; CHECK-LABEL: ashr_imm4_i8:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: sarb $4, %dil
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
@@ -354,7 +354,7 @@ define i8 @ashr_imm4_i8(i8 %a) {
define i16 @ashr_imm4_i16(i16 %a) {
; CHECK-LABEL: ashr_imm4_i16:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: sarw $4, %di
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
@@ -364,7 +364,7 @@ define i16 @ashr_imm4_i16(i16 %a) {
define i32 @ashr_imm4_i32(i32 %a) {
; CHECK-LABEL: ashr_imm4_i32:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: sarl $4, %edi
; CHECK-NEXT: movl %edi, %eax
; CHECK-NEXT: retq
@@ -374,7 +374,7 @@ define i32 @ashr_imm4_i32(i32 %a) {
define i64 @ashr_imm4_i64(i64 %a) {
; CHECK-LABEL: ashr_imm4_i64:
-; CHECK: ## BB#0:
+; CHECK: ## %bb.0:
; CHECK-NEXT: sarq $4, %rdi
; CHECK-NEXT: movq %rdi, %rax
; CHECK-NEXT: retq
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