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Diffstat (limited to 'llvm/test/CodeGen/X86/fast-isel-select-sse.ll')
-rw-r--r--llvm/test/CodeGen/X86/fast-isel-select-sse.ll132
1 files changed, 78 insertions, 54 deletions
diff --git a/llvm/test/CodeGen/X86/fast-isel-select-sse.ll b/llvm/test/CodeGen/X86/fast-isel-select-sse.ll
index 54ef4fdc114..17d2803e9ce 100644
--- a/llvm/test/CodeGen/X86/fast-isel-select-sse.ll
+++ b/llvm/test/CodeGen/X86/fast-isel-select-sse.ll
@@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs | FileCheck %s --check-prefix=SSE
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=SSE
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -O0 | FileCheck %s --check-prefix=SSE
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -O0 -fast-isel -fast-isel-abort=1 | FileCheck %s --check-prefix=SSE
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -mattr=avx | FileCheck %s --check-prefix=AVX
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -fast-isel -fast-isel-abort=1 -mattr=avx | FileCheck %s --check-prefix=AVX
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs -mattr=avx512f | FileCheck %s --check-prefix=AVX512
@@ -12,9 +12,10 @@ define float @select_fcmp_oeq_f32(float %a, float %b, float %c, float %d) {
; SSE-LABEL: select_fcmp_oeq_f32:
; SSE: # %bb.0:
; SSE-NEXT: cmpeqss %xmm1, %xmm0
-; SSE-NEXT: andps %xmm0, %xmm2
+; SSE-NEXT: movaps %xmm0, %xmm1
+; SSE-NEXT: andps %xmm2, %xmm1
; SSE-NEXT: andnps %xmm3, %xmm0
-; SSE-NEXT: orps %xmm2, %xmm0
+; SSE-NEXT: orps %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: select_fcmp_oeq_f32:
@@ -38,9 +39,10 @@ define double @select_fcmp_oeq_f64(double %a, double %b, double %c, double %d) {
; SSE-LABEL: select_fcmp_oeq_f64:
; SSE: # %bb.0:
; SSE-NEXT: cmpeqsd %xmm1, %xmm0
-; SSE-NEXT: andpd %xmm0, %xmm2
+; SSE-NEXT: movaps %xmm0, %xmm1
+; SSE-NEXT: andpd %xmm2, %xmm1
; SSE-NEXT: andnpd %xmm3, %xmm0
-; SSE-NEXT: orpd %xmm2, %xmm0
+; SSE-NEXT: orpd %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: select_fcmp_oeq_f64:
@@ -64,9 +66,10 @@ define float @select_fcmp_ogt_f32(float %a, float %b, float %c, float %d) {
; SSE-LABEL: select_fcmp_ogt_f32:
; SSE: # %bb.0:
; SSE-NEXT: cmpltss %xmm0, %xmm1
-; SSE-NEXT: andps %xmm1, %xmm2
+; SSE-NEXT: movaps %xmm1, %xmm0
+; SSE-NEXT: andps %xmm2, %xmm0
; SSE-NEXT: andnps %xmm3, %xmm1
-; SSE-NEXT: orps %xmm2, %xmm1
+; SSE-NEXT: orps %xmm0, %xmm1
; SSE-NEXT: movaps %xmm1, %xmm0
; SSE-NEXT: retq
;
@@ -91,10 +94,11 @@ define double @select_fcmp_ogt_f64(double %a, double %b, double %c, double %d) {
; SSE-LABEL: select_fcmp_ogt_f64:
; SSE: # %bb.0:
; SSE-NEXT: cmpltsd %xmm0, %xmm1
-; SSE-NEXT: andpd %xmm1, %xmm2
+; SSE-NEXT: movaps %xmm1, %xmm0
+; SSE-NEXT: andpd %xmm2, %xmm0
; SSE-NEXT: andnpd %xmm3, %xmm1
-; SSE-NEXT: orpd %xmm2, %xmm1
-; SSE-NEXT: movapd %xmm1, %xmm0
+; SSE-NEXT: orpd %xmm0, %xmm1
+; SSE-NEXT: movaps %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: select_fcmp_ogt_f64:
@@ -118,9 +122,10 @@ define float @select_fcmp_oge_f32(float %a, float %b, float %c, float %d) {
; SSE-LABEL: select_fcmp_oge_f32:
; SSE: # %bb.0:
; SSE-NEXT: cmpless %xmm0, %xmm1
-; SSE-NEXT: andps %xmm1, %xmm2
+; SSE-NEXT: movaps %xmm1, %xmm0
+; SSE-NEXT: andps %xmm2, %xmm0
; SSE-NEXT: andnps %xmm3, %xmm1
-; SSE-NEXT: orps %xmm2, %xmm1
+; SSE-NEXT: orps %xmm0, %xmm1
; SSE-NEXT: movaps %xmm1, %xmm0
; SSE-NEXT: retq
;
@@ -145,10 +150,11 @@ define double @select_fcmp_oge_f64(double %a, double %b, double %c, double %d) {
; SSE-LABEL: select_fcmp_oge_f64:
; SSE: # %bb.0:
; SSE-NEXT: cmplesd %xmm0, %xmm1
-; SSE-NEXT: andpd %xmm1, %xmm2
+; SSE-NEXT: movaps %xmm1, %xmm0
+; SSE-NEXT: andpd %xmm2, %xmm0
; SSE-NEXT: andnpd %xmm3, %xmm1
-; SSE-NEXT: orpd %xmm2, %xmm1
-; SSE-NEXT: movapd %xmm1, %xmm0
+; SSE-NEXT: orpd %xmm0, %xmm1
+; SSE-NEXT: movaps %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: select_fcmp_oge_f64:
@@ -172,9 +178,10 @@ define float @select_fcmp_olt_f32(float %a, float %b, float %c, float %d) {
; SSE-LABEL: select_fcmp_olt_f32:
; SSE: # %bb.0:
; SSE-NEXT: cmpltss %xmm1, %xmm0
-; SSE-NEXT: andps %xmm0, %xmm2
+; SSE-NEXT: movaps %xmm0, %xmm1
+; SSE-NEXT: andps %xmm2, %xmm1
; SSE-NEXT: andnps %xmm3, %xmm0
-; SSE-NEXT: orps %xmm2, %xmm0
+; SSE-NEXT: orps %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: select_fcmp_olt_f32:
@@ -198,9 +205,10 @@ define double @select_fcmp_olt_f64(double %a, double %b, double %c, double %d) {
; SSE-LABEL: select_fcmp_olt_f64:
; SSE: # %bb.0:
; SSE-NEXT: cmpltsd %xmm1, %xmm0
-; SSE-NEXT: andpd %xmm0, %xmm2
+; SSE-NEXT: movaps %xmm0, %xmm1
+; SSE-NEXT: andpd %xmm2, %xmm1
; SSE-NEXT: andnpd %xmm3, %xmm0
-; SSE-NEXT: orpd %xmm2, %xmm0
+; SSE-NEXT: orpd %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: select_fcmp_olt_f64:
@@ -224,9 +232,10 @@ define float @select_fcmp_ole_f32(float %a, float %b, float %c, float %d) {
; SSE-LABEL: select_fcmp_ole_f32:
; SSE: # %bb.0:
; SSE-NEXT: cmpless %xmm1, %xmm0
-; SSE-NEXT: andps %xmm0, %xmm2
+; SSE-NEXT: movaps %xmm0, %xmm1
+; SSE-NEXT: andps %xmm2, %xmm1
; SSE-NEXT: andnps %xmm3, %xmm0
-; SSE-NEXT: orps %xmm2, %xmm0
+; SSE-NEXT: orps %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: select_fcmp_ole_f32:
@@ -250,9 +259,10 @@ define double @select_fcmp_ole_f64(double %a, double %b, double %c, double %d) {
; SSE-LABEL: select_fcmp_ole_f64:
; SSE: # %bb.0:
; SSE-NEXT: cmplesd %xmm1, %xmm0
-; SSE-NEXT: andpd %xmm0, %xmm2
+; SSE-NEXT: movaps %xmm0, %xmm1
+; SSE-NEXT: andpd %xmm2, %xmm1
; SSE-NEXT: andnpd %xmm3, %xmm0
-; SSE-NEXT: orpd %xmm2, %xmm0
+; SSE-NEXT: orpd %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: select_fcmp_ole_f64:
@@ -276,9 +286,10 @@ define float @select_fcmp_ord_f32(float %a, float %b, float %c, float %d) {
; SSE-LABEL: select_fcmp_ord_f32:
; SSE: # %bb.0:
; SSE-NEXT: cmpordss %xmm1, %xmm0
-; SSE-NEXT: andps %xmm0, %xmm2
+; SSE-NEXT: movaps %xmm0, %xmm1
+; SSE-NEXT: andps %xmm2, %xmm1
; SSE-NEXT: andnps %xmm3, %xmm0
-; SSE-NEXT: orps %xmm2, %xmm0
+; SSE-NEXT: orps %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: select_fcmp_ord_f32:
@@ -302,9 +313,10 @@ define double @select_fcmp_ord_f64(double %a, double %b, double %c, double %d) {
; SSE-LABEL: select_fcmp_ord_f64:
; SSE: # %bb.0:
; SSE-NEXT: cmpordsd %xmm1, %xmm0
-; SSE-NEXT: andpd %xmm0, %xmm2
+; SSE-NEXT: movaps %xmm0, %xmm1
+; SSE-NEXT: andpd %xmm2, %xmm1
; SSE-NEXT: andnpd %xmm3, %xmm0
-; SSE-NEXT: orpd %xmm2, %xmm0
+; SSE-NEXT: orpd %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: select_fcmp_ord_f64:
@@ -328,9 +340,10 @@ define float @select_fcmp_uno_f32(float %a, float %b, float %c, float %d) {
; SSE-LABEL: select_fcmp_uno_f32:
; SSE: # %bb.0:
; SSE-NEXT: cmpunordss %xmm1, %xmm0
-; SSE-NEXT: andps %xmm0, %xmm2
+; SSE-NEXT: movaps %xmm0, %xmm1
+; SSE-NEXT: andps %xmm2, %xmm1
; SSE-NEXT: andnps %xmm3, %xmm0
-; SSE-NEXT: orps %xmm2, %xmm0
+; SSE-NEXT: orps %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: select_fcmp_uno_f32:
@@ -354,9 +367,10 @@ define double @select_fcmp_uno_f64(double %a, double %b, double %c, double %d) {
; SSE-LABEL: select_fcmp_uno_f64:
; SSE: # %bb.0:
; SSE-NEXT: cmpunordsd %xmm1, %xmm0
-; SSE-NEXT: andpd %xmm0, %xmm2
+; SSE-NEXT: movaps %xmm0, %xmm1
+; SSE-NEXT: andpd %xmm2, %xmm1
; SSE-NEXT: andnpd %xmm3, %xmm0
-; SSE-NEXT: orpd %xmm2, %xmm0
+; SSE-NEXT: orpd %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: select_fcmp_uno_f64:
@@ -380,9 +394,10 @@ define float @select_fcmp_ugt_f32(float %a, float %b, float %c, float %d) {
; SSE-LABEL: select_fcmp_ugt_f32:
; SSE: # %bb.0:
; SSE-NEXT: cmpnless %xmm1, %xmm0
-; SSE-NEXT: andps %xmm0, %xmm2
+; SSE-NEXT: movaps %xmm0, %xmm1
+; SSE-NEXT: andps %xmm2, %xmm1
; SSE-NEXT: andnps %xmm3, %xmm0
-; SSE-NEXT: orps %xmm2, %xmm0
+; SSE-NEXT: orps %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: select_fcmp_ugt_f32:
@@ -406,9 +421,10 @@ define double @select_fcmp_ugt_f64(double %a, double %b, double %c, double %d) {
; SSE-LABEL: select_fcmp_ugt_f64:
; SSE: # %bb.0:
; SSE-NEXT: cmpnlesd %xmm1, %xmm0
-; SSE-NEXT: andpd %xmm0, %xmm2
+; SSE-NEXT: movaps %xmm0, %xmm1
+; SSE-NEXT: andpd %xmm2, %xmm1
; SSE-NEXT: andnpd %xmm3, %xmm0
-; SSE-NEXT: orpd %xmm2, %xmm0
+; SSE-NEXT: orpd %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: select_fcmp_ugt_f64:
@@ -432,9 +448,10 @@ define float @select_fcmp_uge_f32(float %a, float %b, float %c, float %d) {
; SSE-LABEL: select_fcmp_uge_f32:
; SSE: # %bb.0:
; SSE-NEXT: cmpnltss %xmm1, %xmm0
-; SSE-NEXT: andps %xmm0, %xmm2
+; SSE-NEXT: movaps %xmm0, %xmm1
+; SSE-NEXT: andps %xmm2, %xmm1
; SSE-NEXT: andnps %xmm3, %xmm0
-; SSE-NEXT: orps %xmm2, %xmm0
+; SSE-NEXT: orps %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: select_fcmp_uge_f32:
@@ -458,9 +475,10 @@ define double @select_fcmp_uge_f64(double %a, double %b, double %c, double %d) {
; SSE-LABEL: select_fcmp_uge_f64:
; SSE: # %bb.0:
; SSE-NEXT: cmpnltsd %xmm1, %xmm0
-; SSE-NEXT: andpd %xmm0, %xmm2
+; SSE-NEXT: movaps %xmm0, %xmm1
+; SSE-NEXT: andpd %xmm2, %xmm1
; SSE-NEXT: andnpd %xmm3, %xmm0
-; SSE-NEXT: orpd %xmm2, %xmm0
+; SSE-NEXT: orpd %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: select_fcmp_uge_f64:
@@ -484,9 +502,10 @@ define float @select_fcmp_ult_f32(float %a, float %b, float %c, float %d) {
; SSE-LABEL: select_fcmp_ult_f32:
; SSE: # %bb.0:
; SSE-NEXT: cmpnless %xmm0, %xmm1
-; SSE-NEXT: andps %xmm1, %xmm2
+; SSE-NEXT: movaps %xmm1, %xmm0
+; SSE-NEXT: andps %xmm2, %xmm0
; SSE-NEXT: andnps %xmm3, %xmm1
-; SSE-NEXT: orps %xmm2, %xmm1
+; SSE-NEXT: orps %xmm0, %xmm1
; SSE-NEXT: movaps %xmm1, %xmm0
; SSE-NEXT: retq
;
@@ -511,10 +530,11 @@ define double @select_fcmp_ult_f64(double %a, double %b, double %c, double %d) {
; SSE-LABEL: select_fcmp_ult_f64:
; SSE: # %bb.0:
; SSE-NEXT: cmpnlesd %xmm0, %xmm1
-; SSE-NEXT: andpd %xmm1, %xmm2
+; SSE-NEXT: movaps %xmm1, %xmm0
+; SSE-NEXT: andpd %xmm2, %xmm0
; SSE-NEXT: andnpd %xmm3, %xmm1
-; SSE-NEXT: orpd %xmm2, %xmm1
-; SSE-NEXT: movapd %xmm1, %xmm0
+; SSE-NEXT: orpd %xmm0, %xmm1
+; SSE-NEXT: movaps %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: select_fcmp_ult_f64:
@@ -538,9 +558,10 @@ define float @select_fcmp_ule_f32(float %a, float %b, float %c, float %d) {
; SSE-LABEL: select_fcmp_ule_f32:
; SSE: # %bb.0:
; SSE-NEXT: cmpnltss %xmm0, %xmm1
-; SSE-NEXT: andps %xmm1, %xmm2
+; SSE-NEXT: movaps %xmm1, %xmm0
+; SSE-NEXT: andps %xmm2, %xmm0
; SSE-NEXT: andnps %xmm3, %xmm1
-; SSE-NEXT: orps %xmm2, %xmm1
+; SSE-NEXT: orps %xmm0, %xmm1
; SSE-NEXT: movaps %xmm1, %xmm0
; SSE-NEXT: retq
;
@@ -565,10 +586,11 @@ define double @select_fcmp_ule_f64(double %a, double %b, double %c, double %d) {
; SSE-LABEL: select_fcmp_ule_f64:
; SSE: # %bb.0:
; SSE-NEXT: cmpnltsd %xmm0, %xmm1
-; SSE-NEXT: andpd %xmm1, %xmm2
+; SSE-NEXT: movaps %xmm1, %xmm0
+; SSE-NEXT: andpd %xmm2, %xmm0
; SSE-NEXT: andnpd %xmm3, %xmm1
-; SSE-NEXT: orpd %xmm2, %xmm1
-; SSE-NEXT: movapd %xmm1, %xmm0
+; SSE-NEXT: orpd %xmm0, %xmm1
+; SSE-NEXT: movaps %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: select_fcmp_ule_f64:
@@ -592,9 +614,10 @@ define float @select_fcmp_une_f32(float %a, float %b, float %c, float %d) {
; SSE-LABEL: select_fcmp_une_f32:
; SSE: # %bb.0:
; SSE-NEXT: cmpneqss %xmm1, %xmm0
-; SSE-NEXT: andps %xmm0, %xmm2
+; SSE-NEXT: movaps %xmm0, %xmm1
+; SSE-NEXT: andps %xmm2, %xmm1
; SSE-NEXT: andnps %xmm3, %xmm0
-; SSE-NEXT: orps %xmm2, %xmm0
+; SSE-NEXT: orps %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: select_fcmp_une_f32:
@@ -618,9 +641,10 @@ define double @select_fcmp_une_f64(double %a, double %b, double %c, double %d) {
; SSE-LABEL: select_fcmp_une_f64:
; SSE: # %bb.0:
; SSE-NEXT: cmpneqsd %xmm1, %xmm0
-; SSE-NEXT: andpd %xmm0, %xmm2
+; SSE-NEXT: movaps %xmm0, %xmm1
+; SSE-NEXT: andpd %xmm2, %xmm1
; SSE-NEXT: andnpd %xmm3, %xmm0
-; SSE-NEXT: orpd %xmm2, %xmm0
+; SSE-NEXT: orpd %xmm1, %xmm0
; SSE-NEXT: retq
;
; AVX-LABEL: select_fcmp_une_f64:
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